Merged changes from Eric Norum:

Enable 68360 watchdog.  The watchdog control register is a
    `write-once' register, so the watchdog has to be enabled in the boot
    roms if it is to be used at all.  To make the change transparent I
    added a default feed of the watchdog to the clock interrupt handler.
    This can be overridden if the application wants to handle the
    watchdog.  The only difficulty with this change is that an
    application has to either include the clock driver or handle the
    watchdog explicitely.  I don't think this is much of a problem since
    I am pretty sure that almost every application includes the clock
    driver.

c/src/lib/libbsp/m68k/gen68360/clock/ckinit.c

@@ -51,9 +51,12 @@ volatile rtems_unsigned32 Clock_driver_ticks;
 rtems_device_major_number rtems_clock_major = ~0;
 rtems_device_minor_number rtems_clock_minor;
 
+char M360DefaultWatchdogFeeder = 1;
+
 /*
  * Periodic interval timer interrupt handler
  */
+
 rtems_isr
 Clock_isr (rtems_vector_number vector)
 {
@@ -63,6 +66,16 @@ Clock_isr (rtems_vector_number vector)
 	 */
 	m360.dpram0[0];
 
+	/*
+	 * Feed the watchdog
+	 * Application code can override this by
+	 * setting M360DefaultWatchdogFeeder to zero.
+	 */
+	if (M360DefaultWatchdogFeeder) {
+		m360.swsr = 0x55;
+		m360.swsr = 0xAA;
+	}
+
 	/*
 	 * Announce the clock tick
 	 */

c/src/lib/libbsp/m68k/gen68360/include/bsp.h

@@ -121,6 +121,7 @@ void bsp_cleanup( void );
 void M360ExecuteRISC( rtems_unsigned16 command );
 void *M360AllocateBufferDescriptors( int count );
 void *M360AllocateRiscTimers( int count );
+extern char M360DefaultWatchdogFeeder;
 
 m68k_isr_entry set_vector(
   rtems_isr_entry     handler,

c/src/lib/libbsp/m68k/gen68360/startup/init68360.c

@@ -69,14 +69,15 @@ void _Init68360 (void)
 
 	/*
 	 * Step 8: Initialize system protection
-	 *	Disable watchdog FIXME: Should use watchdog!!!!
+	 *      Enable watchdog
 	 *      Watchdog causes system reset
-	 *	Slowest watchdog timeout
-	 *	Disable double bus fault monitor
-	 *	Enable bus monitor external
+	 *      Next-to-slowest watchdog timeout
+	 *          (21 seconds with 25 MHz oscillator)
+	 *      Enable double bus fault monitor
+	 *      Enable bus monitor for external cycles
 	 *      1024 clocks for external timeout
 	 */
-	m360.sypcr = 0x74;
+	 m360.sypcr = 0xEC;
 
 	/*
 	 * Step 9: Clear parameter RAM and reset communication processor module
@@ -368,14 +369,15 @@ void _Init68360 (void)
 
 	/*
 	 * Step 8: Initialize system protection
-	 *	Disable watchdog FIXME: Should use watchdog!!!!
+	 *      Enable watchdog
 	 *      Watchdog causes system reset
-	 *	Slowest watchdog timeout
+	 *      Next-to-slowest watchdog timeout
+	 *          (21 seconds with 25 MHz oscillator)
 	 *      Enable double bus fault monitor
-	 *	Enable bus monitor external
-	 *	128 clocks for external timeout
+	 *      Enable bus monitor for external cycles
+	 *      1024 clocks for external timeout
 	 */
-	m360.sypcr = 0x7F;
+	 m360.sypcr = 0xEC;
 
 	/*
 	 * Step 9: Clear parameter RAM and reset communication processor module
@@ -497,7 +499,7 @@ void _Init68360 (void)
 	/*
 	 * Step 14: More system initialization
 	 * SDCR (Serial DMA configuration register)
-	 *	Disable SDMA during FREEZE
+	 *	Enable SDMA during FREEZE
 	 *	Give SDMA priority over all interrupt handlers
 	 *	Set DMA arbiration level to 4
 	 * CICR (CPM interrupt configuration register):
@@ -510,7 +512,7 @@ void _Init68360 (void)
 	 *	Vector base 128
 	 *	SCCs priority grouped at top of table
 	 */
-	m360.sdcr = M360_SDMA_FREEZE | M360_SDMA_SISM_7 | M360_SDMA_SAID_4;
+	m360.sdcr = M360_SDMA_SISM_7 | M360_SDMA_SAID_4;
 	m360.cicr = (3 << 22) | (2 << 20) | (1 << 18) | (0 << 16) |
 						(4 << 13) | (0x1F << 8) | (128);