forked from Imagelibrary/rtems
2001-05-14 Till Straumann <strauman@slac.stanford.edu>
* bootloader/misc.c, console/Makefile.am, console/console.c, console/consoleIo.h, console/inch.c, console/polled_io.c, console/uart.c, console/uart.h, include/bsp.h, irq/Makefile.am, irq/irq.c, irq/irq.h, irq/irq_init.c, openpic/openpic.c, openpic/openpic.h, pci/Makefile.am, pci/pci.c, pci/pci.h, residual/Makefile.am, start/start.S, startup/bspstart.c, vectors/vectors.S, vectors/vectors.h, vectors/vectors_init.c: Per PR216, "libbsp/powerpc/shared" BSP has been modified considerably with the goal to make it more flexible and reusable by other BSPs. The main strategies were: - eliminate hardcoded base addresses; devices use offsets and a BSP defined base address. - separate functionality into different files (e.g. reboot from inch.c to reboot.c) which can be overridden by a 'derived' BSP. - separate initialization code into separate files (e.g. PCI bridge detection/initialization was separated from the more generic PCI access routines), also to make it easier for 'derived' BSPs to substitute their own initialization code. There are also a couple of enhancements and fixes: - IRQ handling code now has a hook for attaching a VME bridge. - OpenPIC is now explicitely initialized (polarities, senses). Eliminated the implicit assumption on the presence of an ISA PIC. - UART and console driver now supports more than 1 port. The current maximum of 2 can easily be extended by enlarging a table (it would even be easier if the ISR API was not broken by design). - fixed polled_io.c so it correctly supports console on COM2 - fixed TLB invalidation code (start.S). - exception handler prints a stack backtrace. - added BSP_pciFindDevice() to scan the pci bus for a particular vendor/device/instance.
This commit is contained in:
Joel Sherrill
@@ -14,26 +14,27 @@
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* http://www.OARcorp.com/rtems/license.html.
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*
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* $Id$
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*
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* Till Straumann, <strauman@slac.stanford.edu>, 1/2002
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* - separated bridge detection code out of this file
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*/
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#include <bsp/consoleIo.h>
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#include <libcpu/io.h>
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#include <bsp/pci.h>
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#include <bsp/residual.h>
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#include <bsp/openpic.h>
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#include <bsp.h>
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/* allow for overriding these definitions */
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#ifndef PCI_CONFIG_ADDR
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#define PCI_CONFIG_ADDR 0xcf8
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#endif
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#ifndef PCI_CONFIG_DATA
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#define PCI_CONFIG_DATA 0xcfc
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#endif
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#define PCI_INVALID_VENDORDEVICEID 0xffffffff
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#define PCI_MULTI_FUNCTION 0x80
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#define RAVEN_MPIC_IOSPACE_ENABLE 0x1
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#define RAVEN_MPIC_MEMSPACE_ENABLE 0x2
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#define RAVEN_MASTER_ENABLE 0x4
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#define RAVEN_PARITY_CHECK_ENABLE 0x40
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#define RAVEN_SYSTEM_ERROR_ENABLE 0x100
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#define RAVEN_CLEAR_EVENTS_MASK 0xf9000000
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/* define a shortcut */
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#define pci BSP_pci_configuration
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/*
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* Bit encode for PCI_CONFIG_HEADER_TYPE register
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@@ -106,7 +107,7 @@ indirect_pci_write_config_dword(unsigned char bus, unsigned char slot,
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return PCIBIOS_SUCCESSFUL;
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}
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static const pci_config_access_functions indirect_functions = {
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const pci_config_access_functions pci_indirect_functions = {
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indirect_pci_read_config_byte,
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indirect_pci_read_config_word,
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indirect_pci_read_config_dword,
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@@ -115,9 +116,9 @@ static const pci_config_access_functions indirect_functions = {
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indirect_pci_write_config_dword
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};
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pci_config pci = {(volatile unsigned char*)PCI_CONFIG_ADDR,
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pci_config BSP_pci_configuration = {(volatile unsigned char*)PCI_CONFIG_ADDR,
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(volatile unsigned char*)PCI_CONFIG_DATA,
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&indirect_functions};
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&pci_indirect_functions};
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static int
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direct_pci_read_config_byte(unsigned char bus, unsigned char slot,
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@@ -205,7 +206,7 @@ direct_pci_write_config_dword(unsigned char bus, unsigned char slot,
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return PCIBIOS_SUCCESSFUL;
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}
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static const pci_config_access_functions direct_functions = {
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const pci_config_access_functions pci_direct_functions = {
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direct_pci_read_config_byte,
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direct_pci_read_config_word,
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direct_pci_read_config_dword,
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@@ -215,99 +216,12 @@ static const pci_config_access_functions direct_functions = {
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};
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void detect_host_bridge()
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{
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PPC_DEVICE *hostbridge;
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unsigned int id0;
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unsigned int tmp;
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/*
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* This code assumes that the host bridge is located at
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* bus 0, dev 0, func 0 AND that the old pre PCI 2.1
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* standart devices detection mecahnism that was used on PC
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* (still used in BSD source code) works.
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*/
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hostbridge=residual_find_device(&residualCopy, PROCESSORDEVICE, NULL,
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BridgeController,
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PCIBridge, -1, 0);
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if (hostbridge) {
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if (hostbridge->DeviceId.Interface==PCIBridgeIndirect) {
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pci.pci_functions=&indirect_functions;
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/* Should be extracted from residual data,
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* indeed MPC106 in CHRP mode is different,
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* but we should not use residual data in
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* this case anyway.
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*/
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pci.pci_config_addr = ((volatile unsigned char *)
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(ptr_mem_map->io_base+0xcf8));
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pci.pci_config_data = ptr_mem_map->io_base+0xcfc;
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} else if(hostbridge->DeviceId.Interface==PCIBridgeDirect) {
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pci.pci_functions=&direct_functions;
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pci.pci_config_data=(unsigned char *) 0x80800000;
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} else {
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}
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} else {
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/* Let us try by experimentation at our own risk! */
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pci.pci_functions = &direct_functions;
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/* On all direct bridges I know the host bridge itself
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* appears as device 0 function 0.
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*/
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pci_read_config_dword(0, 0, 0, PCI_VENDOR_ID, &id0);
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if (id0==~0U) {
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pci.pci_functions = &indirect_functions;
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pci.pci_config_addr = ((volatile unsigned char*)
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(ptr_mem_map->io_base+0xcf8));
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pci.pci_config_data = ((volatile unsigned char*)ptr_mem_map->io_base+0xcfc);
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}
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/* Here we should check that the host bridge is actually
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* present, but if it not, we are in such a desperate
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* situation, that we probably can't even tell it.
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*/
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}
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pci_read_config_dword(0, 0, 0, 0, &id0);
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if(id0 == PCI_VENDOR_ID_MOTOROLA +
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(PCI_DEVICE_ID_MOTOROLA_RAVEN<<16)) {
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/*
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* We have a Raven bridge. We will get information about its settings
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*/
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pci_read_config_dword(0, 0, 0, PCI_COMMAND, &id0);
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#ifdef SHOW_RAVEN_SETTING
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printk("RAVEN PCI command register = %x\n",id0);
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#endif
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id0 |= RAVEN_CLEAR_EVENTS_MASK;
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pci_write_config_dword(0, 0, 0, PCI_COMMAND, id0);
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pci_read_config_dword(0, 0, 0, PCI_COMMAND, &id0);
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#ifdef SHOW_RAVEN_SETTING
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printk("After error clearing RAVEN PCI command register = %x\n",id0);
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#endif
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if (id0 & RAVEN_MPIC_IOSPACE_ENABLE) {
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pci_read_config_dword(0, 0, 0,PCI_BASE_ADDRESS_0, &tmp);
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#ifdef SHOW_RAVEN_SETTING
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printk("Raven MPIC is accessed via IO Space Access at address : %x\n",(tmp & ~0x1));
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#endif
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}
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if (id0 & RAVEN_MPIC_MEMSPACE_ENABLE) {
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pci_read_config_dword(0, 0, 0,PCI_BASE_ADDRESS_1, &tmp);
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#ifdef SHOW_RAVEN_SETTING
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printk("Raven MPIC is accessed via memory Space Access at address : %x\n", tmp);
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#endif
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OpenPIC=(volatile struct OpenPIC *) (tmp + PREP_ISA_MEM_BASE);
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printk("OpenPIC found at %p.\n",
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OpenPIC);
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}
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}
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if (OpenPIC == (volatile struct OpenPIC *)0) {
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BSP_panic("OpenPic Not found\n");
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}
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}
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/*
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* This routine determines the maximum bus number in the system
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*/
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void InitializePCI()
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{
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extern void detect_host_bridge();
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unsigned char ucSlotNumber, ucFnNumber, ucNumFuncs;
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unsigned char ucHeader;
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unsigned char ucMaxSubordinate;
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