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bsp/xilinx-zynq: Provide BSP variants

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This commit is contained in:
Ric Claus
2013-07-13 13:58:27 -07:00
committed by Sebastian Huber
parent 51a58e0c83
commit 691e0eff5d
13 changed files with 96 additions and 4 deletions
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11
c/src/lib/libbsp/arm/xilinx-zynq/Makefile.am
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@@ -58,10 +58,13 @@ libbspstart_a_SOURCES = ../shared/start/start.S
project_lib_DATA = start.$(OBJEXT)
project_lib_DATA += startup/linkcmds
EXTRA_DIST =
EXTRA_DIST += startup/linkcmds.xilinx_zynq_a9_qemu
EXTRA_DIST += startup/linkcmds.xilinx_zynq_a9_qemu_smp
project_lib_DATA += startup/linkcmds.xilinx_zynq
project_lib_DATA += startup/linkcmds.xilinx_zynq_a9_qemu
project_lib_DATA += startup/linkcmds.xilinx_zynq_a9_qemu_smp
project_lib_DATA += startup/linkcmds.xilinx_zynq_zc702
project_lib_DATA += startup/linkcmds.xilinx_zynq_zc702_smp
project_lib_DATA += startup/linkcmds.xilinx_zynq_zedboard
project_lib_DATA += startup/linkcmds.xilinx_zynq_zedboard_smp
###############################################################################
# LibBSP #

2
c/src/lib/libbsp/arm/xilinx-zynq/configure.ac
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@@ -24,6 +24,8 @@ AM_CONDITIONAL(HAS_NETWORKING,test "$HAS_NETWORKING" = "yes")
RTEMS_BSPOPTS_SET([BSP_START_RESET_VECTOR],[*],[])
RTEMS_BSPOPTS_HELP([BSP_START_RESET_VECTOR],[reset vector address for BSP start])
RTEMS_BSPOPTS_SET([BSP_ARM_A9MPCORE_PERIPHCLK],[xilinx_zynq_zc702*],[666666667U])
RTEMS_BSPOPTS_SET([BSP_ARM_A9MPCORE_PERIPHCLK],[xilinx_zynq_zedboard*],[666666667U])
RTEMS_BSPOPTS_SET([BSP_ARM_A9MPCORE_PERIPHCLK],[*],[100000000U])
RTEMS_BSPOPTS_HELP([BSP_ARM_A9MPCORE_PERIPHCLK],[ARM Cortex-A9 MPCore PERIPHCLK clock frequency in Hz])

7
c/src/lib/libbsp/arm/xilinx-zynq/make/custom/xilinx_zynq.inc Normal file
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@@ -0,0 +1,7 @@
include $(RTEMS_ROOT)/make/custom/default.cfg
RTEMS_CPU = arm
CPU_CFLAGS = -march=armv7-a -mthumb -mfpu=neon -mfloat-abi=hard -mtune=cortex-a9
CFLAGS_OPTIMIZE_V ?= -O2 -g

1
c/src/lib/libbsp/arm/xilinx-zynq/make/custom/xilinx_zynq_zc702.cfg Normal file
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@@ -0,0 +1 @@
include $(RTEMS_ROOT)/make/custom/xilinx_zynq.inc

1
c/src/lib/libbsp/arm/xilinx-zynq/make/custom/xilinx_zynq_zc702_smp.cfg Normal file
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@@ -0,0 +1 @@
include $(RTEMS_ROOT)/make/custom/xilinx_zynq.inc

1
c/src/lib/libbsp/arm/xilinx-zynq/make/custom/xilinx_zynq_zedboard.cfg Normal file
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@@ -0,0 +1 @@
include $(RTEMS_ROOT)/make/custom/xilinx_zynq.inc

1
c/src/lib/libbsp/arm/xilinx-zynq/make/custom/xilinx_zynq_zedboard_smp.cfg Normal file
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@@ -0,0 +1 @@
include $(RTEMS_ROOT)/make/custom/xilinx_zynq.inc

28
c/src/lib/libbsp/arm/xilinx-zynq/preinstall.am
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@@ -142,3 +142,31 @@ $(PROJECT_LIB)/linkcmds: startup/linkcmds $(PROJECT_LIB)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds
TMPINSTALL_FILES += $(PROJECT_LIB)/linkcmds
$(PROJECT_LIB)/linkcmds.xilinx_zynq: startup/linkcmds.xilinx_zynq $(PROJECT_LIB)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.xilinx_zynq
TMPINSTALL_FILES += $(PROJECT_LIB)/linkcmds.xilinx_zynq
$(PROJECT_LIB)/linkcmds.xilinx_zynq_a9_qemu: startup/linkcmds.xilinx_zynq_a9_qemu $(PROJECT_LIB)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.xilinx_zynq_a9_qemu
TMPINSTALL_FILES += $(PROJECT_LIB)/linkcmds.xilinx_zynq_a9_qemu
$(PROJECT_LIB)/linkcmds.xilinx_zynq_a9_qemu_smp: startup/linkcmds.xilinx_zynq_a9_qemu_smp $(PROJECT_LIB)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.xilinx_zynq_a9_qemu_smp
TMPINSTALL_FILES += $(PROJECT_LIB)/linkcmds.xilinx_zynq_a9_qemu_smp
$(PROJECT_LIB)/linkcmds.xilinx_zynq_zc702: startup/linkcmds.xilinx_zynq_zc702 $(PROJECT_LIB)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.xilinx_zynq_zc702
TMPINSTALL_FILES += $(PROJECT_LIB)/linkcmds.xilinx_zynq_zc702
$(PROJECT_LIB)/linkcmds.xilinx_zynq_zc702_smp: startup/linkcmds.xilinx_zynq_zc702_smp $(PROJECT_LIB)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.xilinx_zynq_zc702_smp
TMPINSTALL_FILES += $(PROJECT_LIB)/linkcmds.xilinx_zynq_zc702_smp
$(PROJECT_LIB)/linkcmds.xilinx_zynq_zedboard: startup/linkcmds.xilinx_zynq_zedboard $(PROJECT_LIB)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.xilinx_zynq_zedboard
TMPINSTALL_FILES += $(PROJECT_LIB)/linkcmds.xilinx_zynq_zedboard
$(PROJECT_LIB)/linkcmds.xilinx_zynq_zedboard_smp: startup/linkcmds.xilinx_zynq_zedboard_smp $(PROJECT_LIB)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.xilinx_zynq_zedboard_smp
TMPINSTALL_FILES += $(PROJECT_LIB)/linkcmds.xilinx_zynq_zedboard_smp

26
c/src/lib/libbsp/arm/xilinx-zynq/startup/linkcmds.xilinx_zynq Normal file
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@@ -0,0 +1,26 @@
REGION_ALIAS ("REGION_START", RAM);
REGION_ALIAS ("REGION_VECTOR", RAM);
REGION_ALIAS ("REGION_TEXT", RAM);
REGION_ALIAS ("REGION_TEXT_LOAD", RAM);
REGION_ALIAS ("REGION_RODATA", RAM);
REGION_ALIAS ("REGION_RODATA_LOAD", RAM);
REGION_ALIAS ("REGION_DATA", RAM);
REGION_ALIAS ("REGION_DATA_LOAD", RAM);
REGION_ALIAS ("REGION_FAST_TEXT", RAM);
REGION_ALIAS ("REGION_FAST_TEXT_LOAD", RAM);
REGION_ALIAS ("REGION_FAST_DATA", RAM);
REGION_ALIAS ("REGION_FAST_DATA_LOAD", RAM);
REGION_ALIAS ("REGION_BSS", RAM);
REGION_ALIAS ("REGION_WORK", RAM);
REGION_ALIAS ("REGION_STACK", RAM);
bsp_stack_irq_size = DEFINED (bsp_stack_irq_size) ? bsp_stack_irq_size : 4096;
bsp_stack_abt_size = DEFINED (bsp_stack_abt_size) ? bsp_stack_abt_size : 1024;
bsp_section_rwbarrier_align = DEFINED (bsp_section_rwbarrier_align) ? bsp_section_rwbarrier_align : 1M;
bsp_vector_table_in_start_section = 1;
bsp_translation_table_base = ORIGIN (RAM_MMU);
INCLUDE linkcmds.armv4

8
c/src/lib/libbsp/arm/xilinx-zynq/startup/linkcmds.xilinx_zynq_zc702 Normal file
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@@ -0,0 +1,8 @@
MEMORY {
RAM_INT_0 : ORIGIN = 0x00000000, LENGTH = 64k + 64k + 64k
RAM_INT_1 : ORIGIN = 0xFFFF0000, LENGTH = 64k - 512
RAM_MMU : ORIGIN = 0x00100000, LENGTH = 16k
RAM : ORIGIN = 0x00104000, LENGTH = 1024M - 1M - 16k
}
INCLUDE linkcmds.xilinx_zynq

3
c/src/lib/libbsp/arm/xilinx-zynq/startup/linkcmds.xilinx_zynq_zc702_smp Normal file
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@@ -0,0 +1,3 @@
bsp_processor_count = DEFINED (bsp_processor_count) ? bsp_processor_count : 2;
INCLUDE linkcmds.xilinx_zynq_zc702

8
c/src/lib/libbsp/arm/xilinx-zynq/startup/linkcmds.xilinx_zynq_zedboard Normal file
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@@ -0,0 +1,8 @@
MEMORY {
RAM_INT_0 : ORIGIN = 0x00000000, LENGTH = 64k + 64k + 64k
RAM_INT_1 : ORIGIN = 0xFFFF0000, LENGTH = 64k - 512
RAM_MMU : ORIGIN = 0x00100000, LENGTH = 16k
RAM : ORIGIN = 0x00104000, LENGTH = 512M - 1M - 16k
}
INCLUDE linkcmds.xilinx_zynq

3
c/src/lib/libbsp/arm/xilinx-zynq/startup/linkcmds.xilinx_zynq_zedboard_smp Normal file
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@@ -0,0 +1,3 @@
bsp_processor_count = DEFINED (bsp_processor_count) ? bsp_processor_count : 2;
INCLUDE linkcmds.xilinx_zynq_zedboard