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PR2041: sparc64: vector number not included in CPU_Interrupt_frame

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Add the trap vector to the interrupt frame. Also rename the assembly
macro that accesses the field to be consistent with similar macros.
This commit is contained in:
Gedare Bloom
2012-03-14 13:06:13 -04:00
parent 4868c7718f
commit 67baf6071d
2 changed files with 4 additions and 3 deletions
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4
c/src/lib/libcpu/sparc64/shared/score/interrupt.S
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@@ -118,7 +118,7 @@ PUBLIC(_ISR_Handler)
stx %g3, [%sp + STACK_BIAS + ISF_PIL_OFFSET] stx %g3, [%sp + STACK_BIAS + ISF_PIL_OFFSET]
stx %g4, [%sp + STACK_BIAS + ISF_TPC_OFFSET] stx %g4, [%sp + STACK_BIAS + ISF_TPC_OFFSET]
stx %g5, [%sp + STACK_BIAS + ISF_TNPC_OFFSET] stx %g5, [%sp + STACK_BIAS + ISF_TNPC_OFFSET]
stx %g2, [%sp + STACK_BIAS + ISF_TVEC_NUM] stx %g2, [%sp + STACK_BIAS + ISF_TVEC_OFFSET]
rd %y, %g4 ! save y rd %y, %g4 ! save y
stx %g4, [%sp + STACK_BIAS + ISF_Y_OFFSET] stx %g4, [%sp + STACK_BIAS + ISF_Y_OFFSET]
@@ -522,7 +522,7 @@ dispatchAgain:
ldx [%sp + STACK_BIAS + ISF_TPC_OFFSET], %g4 ldx [%sp + STACK_BIAS + ISF_TPC_OFFSET], %g4
ldx [%sp + STACK_BIAS + ISF_TNPC_OFFSET], %g5 ldx [%sp + STACK_BIAS + ISF_TNPC_OFFSET], %g5
ldx [%sp + STACK_BIAS + ISF_TSTATE_OFFSET], %g1 ldx [%sp + STACK_BIAS + ISF_TSTATE_OFFSET], %g1
ldx [%sp + STACK_BIAS + ISF_TVEC_NUM], %g2 ldx [%sp + STACK_BIAS + ISF_TVEC_OFFSET], %g2
wrpr %g0, %g3, %pil wrpr %g0, %g3, %pil
wrpr %g0, %g4, %tpc wrpr %g0, %g4, %tpc
wrpr %g0, %g5, %tnpc wrpr %g0, %g5, %tnpc

3
cpukit/score/cpu/sparc64/rtems/score/cpu.h
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@@ -519,6 +519,7 @@ typedef struct {
uint64_t o5; uint64_t o5;
uint64_t o6_sp; uint64_t o6_sp;
uint64_t o7; uint64_t o7;
uint64_t tvec;
} CPU_Interrupt_frame; } CPU_Interrupt_frame;
#endif /* ASM */ #endif /* ASM */
@@ -548,7 +549,7 @@ typedef struct {
#define ISF_O5_OFFSET CPU_MINIMUM_STACK_FRAME_SIZE + 0x88 #define ISF_O5_OFFSET CPU_MINIMUM_STACK_FRAME_SIZE + 0x88
#define ISF_O6_SP_OFFSET CPU_MINIMUM_STACK_FRAME_SIZE + 0x90 #define ISF_O6_SP_OFFSET CPU_MINIMUM_STACK_FRAME_SIZE + 0x90
#define ISF_O7_OFFSET CPU_MINIMUM_STACK_FRAME_SIZE + 0x98 #define ISF_O7_OFFSET CPU_MINIMUM_STACK_FRAME_SIZE + 0x98
#define ISF_TVEC_NUM CPU_MINIMUM_STACK_FRAME_SIZE + 0xA0 #define ISF_TVEC_OFFSET CPU_MINIMUM_STACK_FRAME_SIZE + 0xA0
#define CONTEXT_CONTROL_INTERRUPT_FRAME_SIZE CPU_MINIMUM_STACK_FRAME_SIZE + 0xA8 #define CONTEXT_CONTROL_INTERRUPT_FRAME_SIZE CPU_MINIMUM_STACK_FRAME_SIZE + 0xA8
#ifndef ASM #ifndef ASM