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bugfixes for mpc8349eamds BSP

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This commit is contained in:
Thomas Doerfler
2008-07-17 14:39:17 +00:00
parent ecb869f738
commit 677cf05fe1
5 changed files with 22 additions and 5 deletions
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8
c/src/lib/libbsp/powerpc/gen83xx/ChangeLog
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@@ -1,7 +1,15 @@
<<<<<<< ChangeLog
2008-05-15 Thomas Doerfler <Thomas.Doerfler@embedded-brains.de>
* network/network.c:
mpc8249eamds uses gmii mode
=======
2008-07-17 Ralf Corsépius <ralf.corsepius@rtems.org> 2008-07-17 Ralf Corsépius <ralf.corsepius@rtems.org>
* configure.ac: Remove RTEMS_AMPOLISH3. * configure.ac: Remove RTEMS_AMPOLISH3.
>>>>>>> 1.31
2008-07-14 Sebastian Huber <sebastian.huber@embedded-brains.de> 2008-07-14 Sebastian Huber <sebastian.huber@embedded-brains.de>
* irq/irq_init.c, irq/irq.h, startup/linkcmds: * irq/irq_init.c, irq/irq.h, startup/linkcmds:

6
c/src/lib/libbsp/powerpc/gen83xx/network/network.c
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@@ -35,7 +35,7 @@
#elif defined( MPC8349EAMDS) #elif defined( MPC8349EAMDS)
#define TSEC_IFMODE TSEC_IFMODE_RGMII #define TSEC_IFMODE TSEC_IFMODE_GMII
#elif defined( HSC_CM01) #elif defined( HSC_CM01)
@@ -80,9 +80,9 @@ int BSP_tsec_attach
if (unitNumber == 1) { if (unitNumber == 1) {
/* /*
* init system I/O configuration registers * init system I/O configuration registers
* to ensure proper pin functions * to ensure proper pin functions for TSEC1_RX_ER and TSEC1_TX_ER
*/ */
mpc83xx.syscon.sicrh = mpc83xx.syscon.sicrh & ~0x1f800000; mpc83xx.syscon.sicrh = mpc83xx.syscon.sicrh & ~0x02800000;
/* /*
* init port registers (GPIO2DIR) for TSEC1 * init port registers (GPIO2DIR) for TSEC1
*/ */

9
c/src/lib/libcpu/powerpc/ChangeLog
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@@ -1,3 +1,12 @@
2008-07-17 Thomas Doerfler <thomas.doerfler@embedded-brains.de>
* rtems/powerpc/powerpc.h:
ppc405 uses definitions distinct from ppc403 now
* shared/src/cache_.h:
use correct powerpc.h to get cache attributes
2008-07-17 Thomas Doerfler <thomas.doerfler@embedded-brains.de> 2008-07-17 Thomas Doerfler <thomas.doerfler@embedded-brains.de>
* shared/include/powerpc-utility.h: * shared/include/powerpc-utility.h:

2
c/src/lib/libcpu/powerpc/rtems/powerpc/powerpc.h
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@@ -107,7 +107,7 @@ extern "C" {
* predefines. * predefines.
*/ */
#if defined(ppc403) || defined(ppc405) #if defined(ppc403)
/* /*
* IBM 403 * IBM 403
* *

2
c/src/lib/libcpu/powerpc/shared/src/cache_.h
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@@ -9,7 +9,7 @@
#ifndef LIBCPU_POWERPC_CACHE_H #ifndef LIBCPU_POWERPC_CACHE_H
#define LIBCPU_POWERPC_CACHE_H #define LIBCPU_POWERPC_CACHE_H
#include <rtems/score/powerpc.h> #include <rtems/powerpc/powerpc.h>
/* Provide the CPU defines only if we have a cache */ /* Provide the CPU defines only if we have a cache */
#if PPC_CACHE_ALIGNMENT != PPC_NO_CACHE_ALIGNMENT #if PPC_CACHE_ALIGNMENT != PPC_NO_CACHE_ALIGNMENT