forked from Imagelibrary/rtems
2004-03-30 Ralf Corsepius <ralf_corsepius@rtems.org>
* mpc505/timer/timer.c, mpc5xx/timer/timer.c, mpc6xx/clock/c_clock.c, mpc6xx/timer/timer.c, mpc8260/clock/clock.c, mpc8260/console-generic/console-generic.c, mpc8260/cpm/cp.c, mpc8260/cpm/dpram.c, mpc8260/include/cpm.h, mpc8260/include/mmu.h, mpc8260/include/mpc8260.h, mpc8260/mmu/mmu.c, mpc8260/timer/timer.c, mpc8xx/clock/clock.c, mpc8xx/console-generic/console-generic.c, mpc8xx/cpm/cp.c, mpc8xx/cpm/dpram.c, mpc8xx/include/cpm.h, mpc8xx/include/mmu.h, mpc8xx/include/mpc8xx.h, mpc8xx/mmu/mmu.c, mpc8xx/timer/timer.c, ppc403/clock/clock.c, ppc403/console/console.c, ppc403/console/console405.c, ppc403/ictrl/ictrl.c, ppc403/ictrl/ictrl.h, ppc403/timer/timer.c, ppc403/tty_drv/tty_drv.c, rtems/powerpc/cache.h, shared/src/cache.c: Convert to using c99 fixed size types.
This commit is contained in:
@@ -1,3 +1,19 @@
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2004-03-30 Ralf Corsepius <ralf_corsepius@rtems.org>
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* mpc505/timer/timer.c, mpc5xx/timer/timer.c,
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mpc6xx/clock/c_clock.c, mpc6xx/timer/timer.c, mpc8260/clock/clock.c,
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mpc8260/console-generic/console-generic.c, mpc8260/cpm/cp.c,
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mpc8260/cpm/dpram.c, mpc8260/include/cpm.h, mpc8260/include/mmu.h,
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mpc8260/include/mpc8260.h, mpc8260/mmu/mmu.c, mpc8260/timer/timer.c,
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mpc8xx/clock/clock.c, mpc8xx/console-generic/console-generic.c,
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mpc8xx/cpm/cp.c, mpc8xx/cpm/dpram.c, mpc8xx/include/cpm.h,
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mpc8xx/include/mmu.h, mpc8xx/include/mpc8xx.h, mpc8xx/mmu/mmu.c,
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mpc8xx/timer/timer.c, ppc403/clock/clock.c,
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ppc403/console/console.c, ppc403/console/console405.c,
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ppc403/ictrl/ictrl.c, ppc403/ictrl/ictrl.h, ppc403/timer/timer.c,
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ppc403/tty_drv/tty_drv.c, rtems/powerpc/cache.h, shared/src/cache.c:
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Convert to using c99 fixed size types.
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2004-03-26 Ralf Corsepius <ralf_corsepius@rtems.org>
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* configure.ac: Add 2nd argument (rtems_updir) to RTEMS_TOP.
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@@ -42,7 +42,7 @@ void Timer_initialize( void )
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int Read_timer( void )
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{
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rtems_unsigned32 value;
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uint32_t value;
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asm volatile ( " mftb %0": "=r" (value) );
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return value - lastInitValue;
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}
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@@ -47,7 +47,7 @@ void Timer_initialize( void )
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int Read_timer( void )
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{
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rtems_unsigned32 value;
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uint32_t value;
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asm volatile ( " mftb %0": "=r" (value) );
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return value - lastInitValue;
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}
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@@ -33,13 +33,13 @@ extern int BSP_connect_clock_handler (void);
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* Clock ticks since initialization
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*/
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volatile rtems_unsigned32 Clock_driver_ticks;
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volatile uint32_t Clock_driver_ticks;
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/*
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* This is the value programmed into the count down timer.
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*/
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rtems_unsigned32 Clock_Decrementer_value;
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uint32_t Clock_Decrementer_value;
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/*
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* These are set by clock driver during its init
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@@ -92,7 +92,7 @@ void clockIsr()
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int clockIsOn(void* unused)
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{
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unsigned32 msr_value;
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uint32_t msr_value;
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_CPU_MSR_GET( msr_value );
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if (msr_value & MSR_EE) return 1;
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@@ -19,7 +19,7 @@
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#include <rtems.h>
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#include <bsp.h>
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rtems_unsigned64 Timer_driver_Start_time;
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uint64_t Timer_driver_Start_time;
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rtems_boolean Timer_driver_Find_average_overhead = 0;
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unsigned clicks_overhead = 0;
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@@ -30,9 +30,9 @@ unsigned clicks_overhead = 0;
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int Timer_get_clicks_overhead()
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{
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rtems_unsigned64 clicks;
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uint64_t clicks;
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PPC_Set_timebase_register((unsigned64) 0);
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PPC_Set_timebase_register((uint64_t ) 0);
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clicks = PPC_Get_timebase_register();
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assert(clicks <= 0xffffffff);
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clicks_overhead = (unsigned) clicks;
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@@ -50,7 +50,7 @@ void Timer_initialize()
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*/
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if (clicks_overhead == 0) clicks_overhead = Timer_get_clicks_overhead();
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PPC_Set_timebase_register((unsigned64) 0);
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PPC_Set_timebase_register((uint64_t ) 0);
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}
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@@ -60,16 +60,16 @@ void Timer_initialize()
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int Read_timer()
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{
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rtems_unsigned64 total64;
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rtems_unsigned32 total;
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uint64_t total64;
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uint32_t total;
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/* approximately CLOCK_SPEED clicks per microsecond */
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total64 = PPC_Get_timebase_register();
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assert( total64 <= 0xffffffff ); /* fits into a unsigned32 */
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assert( total64 <= 0xffffffff ); /* fits into a uint32_t */
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total = (rtems_unsigned32) total64;
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total = (uint32_t ) total64;
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if ( Timer_driver_Find_average_overhead == 1 )
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return total; /* in "clicks" of the decrementer units */
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@@ -79,7 +79,7 @@ int Read_timer()
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unsigned long long Read_long_timer()
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{
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rtems_unsigned64 total64;
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uint64_t total64;
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total64 = PPC_Get_timebase_register();
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return BSP_Convert_decrementer(total64 - clicks_overhead);
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@@ -43,14 +43,14 @@
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#include <mpc8260.h>
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#include <bsp/irq.h>
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volatile rtems_unsigned32 Clock_driver_ticks;
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volatile uint32_t Clock_driver_ticks;
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extern int BSP_get_clock_irq_level();
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extern int BSP_connect_clock_handler(rtems_isr_entry);
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extern int BSP_disconnect_clock_handler();
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void Clock_exit( void );
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rtems_unsigned32 decrementer_value;
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uint32_t decrementer_value;
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volatile int ClockInitialised = 0;
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@@ -102,7 +102,7 @@ void clockOn(void* unused)
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#if 0
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unsigned desiredLevel;
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rtems_unsigned32 pit_value;
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uint32_t pit_value;
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pit_value = (rtems_configuration_get_microseconds_per_tick() *
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rtems_cpu_configuration_get_clicks_per_usec()) - 1 ;
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@@ -118,7 +118,7 @@ static int
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m8xx_smc_set_attributes (int minor, const struct termios *t)
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{
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int baud, brg=0, csize=0, ssize, psize;
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rtems_unsigned16 clen=0, cstopb, parenb, parodd, cread;
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uint16_t clen=0, cstopb, parenb, parodd, cread;
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/* Baud rate */
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switch (t->c_cflag & CBAUD) {
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@@ -232,7 +232,7 @@ static int
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m8xx_scc_set_attributes (int minor, const struct termios *t)
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{
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int baud, brg=0;
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rtems_unsigned16 csize=0, cstopb, parenb, parodd;
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uint16_t csize=0, cstopb, parenb, parodd;
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/* Baud rate */
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switch (t->c_cflag & CBAUD) {
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@@ -20,9 +20,9 @@
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* Send a command to the CPM RISC processer
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*/
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void m8xx_cp_execute_cmd( unsigned32 command )
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void m8xx_cp_execute_cmd( uint32_t command )
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{
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rtems_unsigned16 lvl;
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uint16_t lvl;
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rtems_interrupt_disable(lvl);
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while (m8260.cpcr & M8260_CR_FLG) {
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@@ -31,7 +31,7 @@ void rtems_panic(char *, int);
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* - Dual-Port RAM section 3
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*/
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static struct {
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unsigned8 *base;
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uint8_t *base;
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unsigned int size;
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unsigned int used;
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} dpram_regions[] = {
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@@ -96,7 +96,7 @@ extern "C" {
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/* Functions */
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void m8xx_cp_execute_cmd( unsigned32 command );
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void m8xx_cp_execute_cmd( uint32_t command );
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void *m8xx_dpram_allocate( unsigned int byte_count );
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#define m8xx_bd_allocate(count) \
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@@ -23,9 +23,9 @@ extern "C" {
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* Buffers in the MMU of an MPC8260.
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*/
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typedef struct {
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unsigned32 mmu_epn; /* Effective Page Number */
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unsigned32 mmu_twc; /* Tablewalk Control Register */
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unsigned32 mmu_rpn; /* Real Page Number */
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uint32_t mmu_epn; /* Effective Page Number */
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uint32_t mmu_twc; /* Tablewalk Control Register */
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uint32_t mmu_rpn; /* Real Page Number */
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} MMU_TLB_table_t;
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/*
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File diff suppressed because it is too large
Load Diff
@@ -40,7 +40,7 @@ void mmu_init( void )
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#if 0
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/* so far we leave mmu uninitialised */
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register unsigned32 reg1, i;
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register uint32_t reg1, i;
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/*
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* Initialize the TLBs
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@@ -50,7 +50,7 @@
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#include <rtems.h>
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#include <mpc8260.h>
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static volatile rtems_unsigned32 Timer_starting;
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static volatile uint32_t Timer_starting;
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static rtems_boolean Timer_driver_Find_average_overhead;
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extern rtems_cpu_table Cpu_table;
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@@ -63,9 +63,9 @@ extern rtems_cpu_table Cpu_table;
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/*
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* This is so small that this code will be reproduced where needed.
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*/
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static inline rtems_unsigned32 get_itimer(void)
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static inline uint32_t get_itimer(void)
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{
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rtems_unsigned32 ret;
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uint32_t ret;
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asm volatile ("mftb %0" : "=r" ((ret))); /* TBLO */
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@@ -87,8 +87,8 @@ void Timer_initialize(void)
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int Read_timer(void)
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{
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rtems_unsigned32 clicks;
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rtems_unsigned32 total;
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uint32_t clicks;
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uint32_t total;
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clicks = get_itimer();
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@@ -42,7 +42,7 @@
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#include <stdlib.h> /* for atexit() */
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#include <mpc8xx.h>
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volatile rtems_unsigned32 Clock_driver_ticks;
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volatile uint32_t Clock_driver_ticks;
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extern volatile m8xx_t m8xx;
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extern int BSP_get_clock_irq_level();
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extern int BSP_connect_clock_handler(rtems_isr_entry);
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@@ -70,7 +70,7 @@ rtems_isr Clock_isr(rtems_vector_number vector)
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void clockOn(void* unused)
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{
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unsigned desiredLevel;
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rtems_unsigned32 pit_value;
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uint32_t pit_value;
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pit_value = (rtems_configuration_get_microseconds_per_tick() *
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rtems_cpu_configuration_get_clicks_per_usec()) - 1 ;
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@@ -181,7 +181,7 @@ static int
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m8xx_smc_set_attributes (int minor, const struct termios *t)
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{
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int baud, brg=0, csize=0, ssize, psize;
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rtems_unsigned16 clen=0, cstopb, parenb, parodd, cread;
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uint16_t clen=0, cstopb, parenb, parodd, cread;
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/* Baud rate */
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switch (t->c_cflag & CBAUD) {
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@@ -277,7 +277,7 @@ static int
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m8xx_scc_set_attributes (int minor, const struct termios *t)
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{
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int baud, brg=0;
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rtems_unsigned16 csize=0, cstopb, parenb, parodd;
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uint16_t csize=0, cstopb, parenb, parodd;
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/* Baud rate */
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switch (t->c_cflag & CBAUD) {
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@@ -20,9 +20,9 @@
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* Send a command to the CPM RISC processer
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*/
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void m8xx_cp_execute_cmd( unsigned16 command )
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void m8xx_cp_execute_cmd( uint16_t command )
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{
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rtems_unsigned16 lvl;
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uint16_t lvl;
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rtems_interrupt_disable(lvl);
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while (m8xx.cpcr & M8xx_CR_FLG) {
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@@ -28,7 +28,7 @@ extern void rtems_panic(char *, int);
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* - Dual-Port RAM section 4
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*/
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static struct {
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unsigned8 *base;
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uint8_t *base;
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unsigned int size;
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unsigned int used;
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} dpram_regions[] = {
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@@ -20,7 +20,7 @@ extern "C" {
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/* Functions */
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void m8xx_cp_execute_cmd( unsigned16 command );
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void m8xx_cp_execute_cmd( uint16_t command );
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void *m8xx_dpram_allocate( unsigned int byte_count );
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#define m8xx_bd_allocate(count) \
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@@ -23,9 +23,9 @@ extern "C" {
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* Buffers in the MMU of an MPC8xx.
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*/
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typedef struct {
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unsigned32 mmu_epn; /* Effective Page Number */
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unsigned32 mmu_twc; /* Tablewalk Control Register */
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unsigned32 mmu_rpn; /* Real Page Number */
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uint32_t mmu_epn; /* Effective Page Number */
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uint32_t mmu_twc; /* Tablewalk Control Register */
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uint32_t mmu_rpn; /* Real Page Number */
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} MMU_TLB_table_t;
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/*
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File diff suppressed because it is too large
Load Diff
@@ -34,7 +34,7 @@
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*/
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void mmu_init( void )
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{
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register unsigned32 reg1, i;
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register uint32_t reg1, i;
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/*
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* Initialize the TLBs
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@@ -45,15 +45,15 @@
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#include <rtems.h>
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#include <mpc8xx.h>
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static volatile rtems_unsigned32 Timer_starting;
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static volatile uint32_t Timer_starting;
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static rtems_boolean Timer_driver_Find_average_overhead;
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/*
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* This is so small that this code will be reproduced where needed.
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*/
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static inline rtems_unsigned32 get_itimer(void)
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static inline uint32_t get_itimer(void)
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{
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rtems_unsigned32 ret;
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uint32_t ret;
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asm volatile ("mftb %0" : "=r" ((ret))); /* TBLO */
|
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|
||||
@@ -79,8 +79,8 @@ void Timer_initialize(void)
|
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|
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int Read_timer(void)
|
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{
|
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rtems_unsigned32 clicks;
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rtems_unsigned32 total;
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uint32_t clicks;
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uint32_t total;
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clicks = get_itimer();
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@@ -43,8 +43,8 @@
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#include <stdlib.h> /* for atexit() */
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volatile rtems_unsigned32 Clock_driver_ticks;
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static rtems_unsigned32 pit_value, tick_time;
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volatile uint32_t Clock_driver_ticks;
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static uint32_t pit_value, tick_time;
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static rtems_boolean auto_restart;
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void Clock_exit( void );
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@@ -62,9 +62,9 @@ rtems_isr_entry set_vector( /* returns old vector */
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rtems_device_major_number rtems_clock_major = ~0;
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rtems_device_minor_number rtems_clock_minor;
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static inline rtems_unsigned32 get_itimer(void)
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static inline uint32_t get_itimer(void)
|
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{
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register rtems_unsigned32 rc;
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register uint32_t rc;
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||||
#ifndef ppc405 /* this is a ppc403 */
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asm volatile ("mfspr %0, 0x3dd" : "=r" ((rc))); /* TBLO */
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@@ -82,10 +82,10 @@ static inline rtems_unsigned32 get_itimer(void)
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rtems_isr
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Clock_isr(rtems_vector_number vector)
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{
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||||
rtems_unsigned32 clicks_til_next_interrupt;
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||||
uint32_t clicks_til_next_interrupt;
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||||
if (!auto_restart)
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{
|
||||
rtems_unsigned32 itimer_value;
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||||
uint32_t itimer_value;
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||||
/*
|
||||
* setup for next interrupt; making sure the new value is reasonably
|
||||
* in the future.... in case we lost out on an interrupt somehow
|
||||
@@ -141,10 +141,10 @@ Clock_isr(rtems_vector_number vector)
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||||
void Install_clock(rtems_isr_entry clock_isr)
|
||||
{
|
||||
rtems_isr_entry previous_isr;
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||||
rtems_unsigned32 iocr;
|
||||
register rtems_unsigned32 tcr;
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||||
uint32_t iocr;
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||||
register uint32_t tcr;
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||||
#ifdef ppc403
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||||
rtems_unsigned32 pvr;
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uint32_t pvr;
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||||
#endif /* ppc403 */
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||||
|
||||
Clock_driver_ticks = 0;
|
||||
@@ -225,7 +225,7 @@ void
|
||||
ReInstall_clock(rtems_isr_entry new_clock_isr)
|
||||
{
|
||||
rtems_isr_entry previous_isr;
|
||||
rtems_unsigned32 isrlevel = 0;
|
||||
uint32_t isrlevel = 0;
|
||||
|
||||
rtems_interrupt_disable(isrlevel);
|
||||
|
||||
@@ -246,7 +246,7 @@ ReInstall_clock(rtems_isr_entry new_clock_isr)
|
||||
void
|
||||
Clock_exit(void)
|
||||
{
|
||||
register rtems_unsigned32 tcr;
|
||||
register uint32_t tcr;
|
||||
|
||||
asm volatile ("mfspr %0, 0x3da" : "=r" ((tcr))); /* TCR */
|
||||
|
||||
|
||||
@@ -206,9 +206,9 @@ spiStopRemoteTx (int minor)
|
||||
}
|
||||
|
||||
void
|
||||
spiBaudSet(unsigned32 baudrate)
|
||||
spiBaudSet(uint32_t baudrate)
|
||||
{
|
||||
unsigned32 tmp;
|
||||
uint32_t tmp;
|
||||
tmp = rtems_cpu_configuration_get_serial_per_sec() / baudrate;
|
||||
tmp = ((tmp) >> 4) - 1;
|
||||
port->BRDL = tmp & 0xff;
|
||||
|
||||
@@ -191,9 +191,9 @@ int round(double x)
|
||||
}
|
||||
|
||||
void
|
||||
spiBaudSet(unsigned32 baudrate)
|
||||
spiBaudSet(uint32_t baudrate)
|
||||
{
|
||||
unsigned32 tmp;
|
||||
uint32_t tmp;
|
||||
|
||||
tmp = round( (double)rtems_cpu_configuration_get_serial_per_sec() / (baudrate * 16) );
|
||||
|
||||
|
||||
@@ -45,7 +45,7 @@ rtems_isr_entry ictrl_vector_table[PPC_IRQ_EXT_MAX];
|
||||
*/
|
||||
#if defined(ppc405)
|
||||
RTEMS_INLINE_ROUTINE void
|
||||
clr_exisr(unsigned32 mask)
|
||||
clr_exisr(uint32_t mask)
|
||||
{
|
||||
asm volatile ("mtdcr 0xC0,%0"::"r" (mask));/*EXISR*/
|
||||
}
|
||||
@@ -53,10 +53,10 @@ clr_exisr(unsigned32 mask)
|
||||
/*
|
||||
* get value of EXISR
|
||||
*/
|
||||
RTEMS_INLINE_ROUTINE unsigned32
|
||||
RTEMS_INLINE_ROUTINE uint32_t
|
||||
get_exisr(void)
|
||||
{
|
||||
unsigned32 val;
|
||||
uint32_t val;
|
||||
|
||||
asm volatile ("mfdcr %0,0xC0":"=r" (val));/*EXISR*/
|
||||
return val;
|
||||
@@ -65,10 +65,10 @@ get_exisr(void)
|
||||
/*
|
||||
* get value of EXIER
|
||||
*/
|
||||
RTEMS_INLINE_ROUTINE unsigned32
|
||||
RTEMS_INLINE_ROUTINE uint32_t
|
||||
get_exier(void)
|
||||
{
|
||||
unsigned32 val;
|
||||
uint32_t val;
|
||||
asm volatile ("mfdcr %0,0xC2":"=r" (val));/*EXIER*/
|
||||
return val;
|
||||
}
|
||||
@@ -77,7 +77,7 @@ get_exier(void)
|
||||
* set value of EXIER
|
||||
*/
|
||||
RTEMS_INLINE_ROUTINE void
|
||||
set_exier(unsigned32 val)
|
||||
set_exier(uint32_t val)
|
||||
{
|
||||
asm volatile ("mtdcr 0xC2,%0"::"r" (val));/*EXIER*/
|
||||
}
|
||||
@@ -85,7 +85,7 @@ set_exier(unsigned32 val)
|
||||
#else /* not ppc405 */
|
||||
|
||||
RTEMS_INLINE_ROUTINE void
|
||||
clr_exisr(unsigned32 mask)
|
||||
clr_exisr(uint32_t mask)
|
||||
{
|
||||
asm volatile ("mtdcr 0x40,%0"::"r" (mask));/*EXISR*/
|
||||
}
|
||||
@@ -93,10 +93,10 @@ clr_exisr(unsigned32 mask)
|
||||
/*
|
||||
* get value of EXISR
|
||||
*/
|
||||
RTEMS_INLINE_ROUTINE unsigned32
|
||||
RTEMS_INLINE_ROUTINE uint32_t
|
||||
get_exisr(void)
|
||||
{
|
||||
unsigned32 val;
|
||||
uint32_t val;
|
||||
|
||||
asm volatile ("mfdcr %0,0x40":"=r" (val));/*EXISR*/
|
||||
return val;
|
||||
@@ -105,10 +105,10 @@ get_exisr(void)
|
||||
/*
|
||||
* get value of EXIER
|
||||
*/
|
||||
RTEMS_INLINE_ROUTINE unsigned32
|
||||
RTEMS_INLINE_ROUTINE uint32_t
|
||||
get_exier(void)
|
||||
{
|
||||
unsigned32 val;
|
||||
uint32_t val;
|
||||
asm volatile ("mfdcr %0,0x42":"=r" (val));/*EXIER*/
|
||||
return val;
|
||||
}
|
||||
@@ -117,7 +117,7 @@ get_exier(void)
|
||||
* set value of EXIER
|
||||
*/
|
||||
RTEMS_INLINE_ROUTINE void
|
||||
set_exier(unsigned32 val)
|
||||
set_exier(uint32_t val)
|
||||
{
|
||||
asm volatile ("mtdcr 0x42,%0"::"r" (val));/*EXIER*/
|
||||
}
|
||||
@@ -126,9 +126,9 @@ set_exier(unsigned32 val)
|
||||
* enable an external interrupt, make this interrupt consistent
|
||||
*/
|
||||
RTEMS_INLINE_ROUTINE void
|
||||
enable_ext_irq( unsigned32 mask)
|
||||
enable_ext_irq( uint32_t mask)
|
||||
{
|
||||
unsigned32 isrlvl;
|
||||
uint32_t isrlvl;
|
||||
_CPU_ISR_Disable(isrlvl);
|
||||
set_exier(get_exier() | ((mask)&PPC_EXI_MASK));
|
||||
_CPU_ISR_Enable(isrlvl);
|
||||
@@ -138,9 +138,9 @@ enable_ext_irq( unsigned32 mask)
|
||||
* disable an external interrupt, make this interrupt consistent
|
||||
*/
|
||||
RTEMS_INLINE_ROUTINE void
|
||||
disable_ext_irq( unsigned32 mask)
|
||||
disable_ext_irq( uint32_t mask)
|
||||
{
|
||||
unsigned32 isrlvl;
|
||||
uint32_t isrlvl;
|
||||
_CPU_ISR_Disable(isrlvl);
|
||||
set_exier(get_exier() & ~(mask) & PPC_EXI_MASK);
|
||||
_CPU_ISR_Enable(isrlvl);
|
||||
@@ -155,7 +155,7 @@ disable_ext_irq( unsigned32 mask)
|
||||
*
|
||||
*/
|
||||
void
|
||||
ictrl_spurious_handler(unsigned32 spurious_mask,
|
||||
ictrl_spurious_handler(uint32_t spurious_mask,
|
||||
CPU_Interrupt_frame *cpu_frame)
|
||||
{
|
||||
int v;
|
||||
@@ -183,7 +183,7 @@ ictrl_spurious_handler(unsigned32 spurious_mask,
|
||||
void
|
||||
ictrl_isr(rtems_vector_number vector,CPU_Interrupt_frame *cpu_frame)
|
||||
{
|
||||
unsigned32 istat,
|
||||
uint32_t istat,
|
||||
mask,
|
||||
global_vec;
|
||||
int exvec;
|
||||
@@ -223,7 +223,7 @@ ictrl_isr(rtems_vector_number vector,CPU_Interrupt_frame *cpu_frame)
|
||||
*/
|
||||
rtems_status_code
|
||||
ictrl_set_vector(rtems_isr_entry new_handler,
|
||||
unsigned32 vector,
|
||||
uint32_t vector,
|
||||
rtems_isr_entry *old_handler
|
||||
)
|
||||
{
|
||||
|
||||
@@ -78,7 +78,7 @@ extern "C" {
|
||||
*/
|
||||
rtems_status_code
|
||||
ictrl_set_vector(rtems_isr_entry new_handler,
|
||||
unsigned32 vector,
|
||||
uint32_t vector,
|
||||
rtems_isr_entry *old_handler
|
||||
);
|
||||
/*
|
||||
|
||||
@@ -38,15 +38,15 @@
|
||||
|
||||
#include <rtems.h>
|
||||
|
||||
static volatile rtems_unsigned32 Timer_starting;
|
||||
static volatile uint32_t Timer_starting;
|
||||
static rtems_boolean Timer_driver_Find_average_overhead;
|
||||
|
||||
/*
|
||||
* This is so small that this code will be reproduced where needed.
|
||||
*/
|
||||
static inline rtems_unsigned32 get_itimer(void)
|
||||
static inline uint32_t get_itimer(void)
|
||||
{
|
||||
rtems_unsigned32 ret;
|
||||
uint32_t ret;
|
||||
|
||||
#ifndef ppc405
|
||||
asm volatile ("mfspr %0, 0x3dd" : "=r" ((ret))); /* TBLO */
|
||||
@@ -61,7 +61,7 @@ static inline rtems_unsigned32 get_itimer(void)
|
||||
|
||||
void Timer_initialize()
|
||||
{
|
||||
rtems_unsigned32 iocr;
|
||||
uint32_t iocr;
|
||||
|
||||
#ifndef ppc405
|
||||
asm volatile ("mfdcr %0, 0xa0" : "=r" (iocr)); /* IOCR */
|
||||
@@ -84,8 +84,8 @@ void Timer_initialize()
|
||||
|
||||
int Read_timer()
|
||||
{
|
||||
rtems_unsigned32 clicks;
|
||||
rtems_unsigned32 total;
|
||||
uint32_t clicks;
|
||||
uint32_t total;
|
||||
|
||||
clicks = get_itimer();
|
||||
|
||||
|
||||
@@ -150,9 +150,9 @@ int tty0_round(double x)
|
||||
}
|
||||
|
||||
void
|
||||
tty0BaudSet(unsigned32 baudrate)
|
||||
tty0BaudSet(uint32_t baudrate)
|
||||
{
|
||||
unsigned32 tmp;
|
||||
uint32_t tmp;
|
||||
|
||||
tmp = tty0_round( (double)rtems_cpu_configuration_get_serial_per_sec() / (baudrate * 16) );
|
||||
|
||||
|
||||
@@ -12,7 +12,7 @@
|
||||
#if (PPC_D_CACHE != 0)
|
||||
#define _CPU_Data_Cache_Block_Flush( _address ) \
|
||||
do { register void *__address = (_address); \
|
||||
register unsigned32 _zero = 0; \
|
||||
register uint32_t _zero = 0; \
|
||||
asm volatile ( "dcbf %0,%1" : \
|
||||
"=r" (_zero), "=r" (__address) : \
|
||||
"0" (_zero), "1" (__address) \
|
||||
@@ -28,7 +28,7 @@
|
||||
#if (PPC_D_CACHE != 0)
|
||||
#define _CPU_Data_Cache_Block_Invalidate( _address ) \
|
||||
do { register void *__address = (_address); \
|
||||
register unsigned32 _zero = 0; \
|
||||
register uint32_t _zero = 0; \
|
||||
asm volatile ( "dcbi %0,%1" : \
|
||||
"=r" (_zero), "=r" (__address) : \
|
||||
"0" (_zero), "1" (__address) \
|
||||
|
||||
@@ -47,7 +47,7 @@
|
||||
void _CPU_cache_enable_data (
|
||||
void )
|
||||
{
|
||||
unsigned32 value;
|
||||
uint32_t value;
|
||||
PPC_Get_HID0( value );
|
||||
value |= 0x00004000; /* set DCE bit */
|
||||
PPC_Set_HID0( value );
|
||||
@@ -56,7 +56,7 @@ void _CPU_cache_enable_data (
|
||||
void _CPU_cache_disable_data (
|
||||
void )
|
||||
{
|
||||
unsigned32 value;
|
||||
uint32_t value;
|
||||
PPC_Get_HID0( value );
|
||||
value &= 0xFFFFBFFF; /* clear DCE bit */
|
||||
PPC_Set_HID0( value );
|
||||
@@ -65,7 +65,7 @@ void _CPU_cache_disable_data (
|
||||
void _CPU_cache_enable_instruction (
|
||||
void )
|
||||
{
|
||||
unsigned32 value;
|
||||
uint32_t value;
|
||||
PPC_Get_HID0( value );
|
||||
value |= 0x00008000; /* Set ICE bit */
|
||||
PPC_Set_HID0( value );
|
||||
@@ -74,7 +74,7 @@ void _CPU_cache_enable_instruction (
|
||||
void _CPU_cache_disable_instruction (
|
||||
void )
|
||||
{
|
||||
unsigned32 value;
|
||||
uint32_t value;
|
||||
PPC_Get_HID0( value );
|
||||
value &= 0xFFFF7FFF; /* Clear ICE bit */
|
||||
PPC_Set_HID0( value );
|
||||
@@ -108,7 +108,7 @@ void _CPU_cache_unfreeze_data ( void ) {}
|
||||
|
||||
void _CPU_cache_enable_data ( void )
|
||||
{
|
||||
unsigned32 r1;
|
||||
uint32_t r1;
|
||||
r1 = (0x2<<24);
|
||||
mtspr( 568, r1 );
|
||||
isync;
|
||||
@@ -116,7 +116,7 @@ void _CPU_cache_enable_data ( void )
|
||||
|
||||
void _CPU_cache_disable_data ( void )
|
||||
{
|
||||
unsigned32 r1;
|
||||
uint32_t r1;
|
||||
r1 = (0x4<<24);
|
||||
mtspr( 568, r1 );
|
||||
isync;
|
||||
@@ -135,7 +135,7 @@ void _CPU_cache_unfreeze_instruction ( void ) {}
|
||||
|
||||
void _CPU_cache_enable_instruction ( void )
|
||||
{
|
||||
unsigned32 r1;
|
||||
uint32_t r1;
|
||||
r1 = (0x2<<24);
|
||||
mtspr( 560, r1 );
|
||||
isync;
|
||||
@@ -143,7 +143,7 @@ void _CPU_cache_enable_instruction ( void )
|
||||
|
||||
void _CPU_cache_disable_instruction ( void )
|
||||
{
|
||||
unsigned32 r1;
|
||||
uint32_t r1;
|
||||
r1 = (0x4<<24);
|
||||
mtspr( 560, r1 );
|
||||
isync;
|
||||
|
||||
Reference in New Issue
Block a user