RTOS/rtems
1
0
Fork 0
forked from Imagelibrary/rtems
Code Pull Requests Activity

2010-06-28 Joel Sherrill <joel.sherrill@oarcorp.com>

Browse Source 
PR 1573/cpukit
	* shared/score/interrupt.S: Add a per cpu data structure which contains
	the information required by RTEMS for each CPU core. This
	encapsulates information such as thread executing, heir, idle and
	dispatch needed.
This commit is contained in:
Joel Sherrill
2010-06-29 00:39:44 +00:00
parent 61b1c413b7
commit 646e7b0d2a
2 changed files with 13 additions and 35 deletions
Download Patch File Download Diff File Expand all files Collapse all files

8
c/src/lib/libcpu/sparc64/ChangeLog
View File

@@ -1,3 +1,11 @@
2010-06-28 Joel Sherrill <joel.sherrill@oarcorp.com>
PR 1573/cpukit
* shared/score/interrupt.S: Add a per cpu data structure which contains
the information required by RTEMS for each CPU core. This
encapsulates information such as thread executing, heir, idle and
dispatch needed.
2010-06-17 Joel Sherrill <joel.sherrill@oarcorp.com> 2010-06-17 Joel Sherrill <joel.sherrill@oarcorp.com>
* .cvsignore, ChangeLog, Makefile.am, configure.ac, preinstall.am, * .cvsignore, ChangeLog, Makefile.am, configure.ac, preinstall.am,

40
c/src/lib/libcpu/sparc64/shared/score/interrupt.S
View File

@@ -26,6 +26,7 @@
*/ */
#include <rtems/asm.h> #include <rtems/asm.h>
#include <rtems/score/percpu.h>
/* /*
@@ -178,7 +179,7 @@ PUBLIC(_ISR_Handler)
setx SYM(_Thread_Dispatch_disable_level), %o5, %g3 setx SYM(_Thread_Dispatch_disable_level), %o5, %g3
lduw [%g3], %g5 lduw [%g3], %g5
setx SYM(_ISR_Nest_level), %o5, %g6 setx ISR_NEST_LEVEL, %o5, %g6
lduw [%g6], %g4 lduw [%g6], %g4
add %g5, 1, %g5 add %g5, 1, %g5
@@ -345,7 +346,7 @@ PUBLIC(_ISR_Handler)
bnz simple_return ! Yes, then do a "simple" exit bnz simple_return ! Yes, then do a "simple" exit
nop nop
setx SYM(_Context_Switch_necessary), %o5, %g7 setx DISPATCH_NEEDED, %o5, %g7
/* /*
@@ -359,21 +360,6 @@ PUBLIC(_ISR_Handler)
bnz SYM(_ISR_Dispatch) ! yes, then invoke the dispatcher bnz SYM(_ISR_Dispatch) ! yes, then invoke the dispatcher
nop nop
/*
* Finally, check to see if signals were sent to the currently
* executing task. If so, we need to invoke the interrupt dispatcher.
*/
setx SYM(_ISR_Signals_to_thread_executing), %o5, %g5
ldub [%g5], %o5
orcc %o5, %g0, %g0 ! Were signals sent to the currently
! executing thread?
bz simple_return ! yes, then invoke the dispatcher
! use the delay slot to clear the signals
! to the currently executing task flag
stb %g0, [%g5]
/* /*
* Invoke interrupt dispatcher. * Invoke interrupt dispatcher.
*/ */
@@ -408,31 +394,15 @@ PUBLIC(_ISR_Dispatch)
* _Thread_Dispatch before leaving this ISR Dispatch context. * _Thread_Dispatch before leaving this ISR Dispatch context.
*/ */
setx SYM(_Context_Switch_necessary), %o5, %o1 setx DISPATCH_NEEDED, %o5, %o1
ldub [%o1], %o2 ldub [%o1], %o2
! NOTE: Use some of delay slot to start loading this
setx SYM(_ISR_Signals_to_thread_executing), %o5, %o1
ldub [%o1], %o3
orcc %o2, %g0, %g0 ! Is thread switch necessary? orcc %o2, %g0, %g0 ! Is thread switch necessary?
bnz dispatchAgain ! yes, then invoke the dispatcher AGAIN
! NOTE: Use the delay slot to catch the orcc below
/*
* Finally, check to see if signals were sent to the currently
* executing task. If so, we need to invoke the interrupt dispatcher.
*/
! NOTE: Delay slots above were used to perform the load AND
! this orcc falls into the delay slot for bnz above
orcc %o3, %g0, %g0 ! Were signals sent to the currently
! executing thread?
bz allow_nest_again ! No, then clear out and return bz allow_nest_again ! No, then clear out and return
nop nop
! Yes, then invoke the dispatcher ! Yes, then invoke the dispatcher
dispatchAgain: dispatchAgain:
mov 3, %g4 ! syscall (enable interrupts) mov 3, %g4 ! syscall (enable interrupts)
ta 0 ! syscall (enable interrupts) ta 0 ! syscall (enable interrupts)
ba isr_dispatch ba isr_dispatch