RTOS/rtems
1
0
Fork 0
forked from Imagelibrary/rtems
Code Pull Requests Activity

bsp/stm32h7: cleanup osc, clk, per files for stm32h7b3i-dk board

Browse Source 
Sponsored-By:	Precidata
This commit is contained in:
Karel Gardas
2022-05-15 22:10:39 +02:00
committed by Sebastian Huber
parent 7234516cc5
commit 63e327f9fb
3 changed files with 0 additions and 54 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
bsps/arm/stm32h7/boards/stm/stm32h7b3i-dk/stm32h7-config-clk.c
View File

@@ -37,11 +37,7 @@ const RCC_ClkInitTypeDef stm32h7_config_clocks = {
| RCC_CLOCKTYPE_D3PCLK1 | RCC_CLOCKTYPE_D1PCLK1,
.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK,
.SYSCLKDivider = RCC_SYSCLK_DIV1,
#ifdef STM32H7B3xxQ
.AHBCLKDivider = RCC_HCLK_DIV1,
#else
.AHBCLKDivider = RCC_HCLK_DIV2,
#endif
.APB3CLKDivider = RCC_APB3_DIV2,
.APB1CLKDivider = RCC_APB1_DIV2,
.APB2CLKDivider = RCC_APB2_DIV2,

20
bsps/arm/stm32h7/boards/stm/stm32h7b3i-dk/stm32h7-config-osc.c
View File

@@ -32,7 +32,6 @@
#include <stm32h7/hal.h>
const RCC_OscInitTypeDef stm32h7_config_oscillator = {
#ifdef STM32H7B3xxQ
.OscillatorType = RCC_OSCILLATORTYPE_HSE,
.HSEState = RCC_HSE_ON,
.HSIState = RCC_HSI_OFF,
@@ -47,23 +46,4 @@ const RCC_OscInitTypeDef stm32h7_config_oscillator = {
.PLL.PLLQ = 2,
.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE,
.PLL.PLLRGE = RCC_PLL1VCIRANGE_1,
#else
.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE
| RCC_OSCILLATORTYPE_LSE | RCC_OSCILLATORTYPE_HSI48,
.HSEState = RCC_HSE_ON,
.LSEState = RCC_LSE_ON,
.HSIState = RCC_HSI_DIV1,
.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT,
.HSI48State = RCC_HSI48_ON,
.PLL.PLLState = RCC_PLL_ON,
.PLL.PLLSource = RCC_PLLSOURCE_HSE,
.PLL.PLLM = 5,
.PLL.PLLN = 192,
.PLL.PLLP = 2,
.PLL.PLLQ = 12,
.PLL.PLLR = 2,
.PLL.PLLRGE = RCC_PLL1VCIRANGE_2,
.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE,
.PLL.PLLFRACN = 0
#endif
};

30
bsps/arm/stm32h7/boards/stm/stm32h7b3i-dk/stm32h7-config-per.c
View File

@@ -32,7 +32,6 @@
#include <stm32h7/hal.h>
const RCC_PeriphCLKInitTypeDef stm32h7_config_peripheral_clocks = {
#ifdef STM32H7B3xxQ
/* for stm32h7b3i-dk BSP we provide only minimalistic peripheral
configuration just to make available U(S)ARTs working */
.PeriphClockSelection = RCC_PERIPHCLK_USART3
@@ -47,33 +46,4 @@ const RCC_PeriphCLKInitTypeDef stm32h7_config_peripheral_clocks = {
.PLL2.PLL2FRACN = 0,
.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_D2PCLK1,
.Usart16ClockSelection = RCC_USART16CLKSOURCE_D2PCLK2,
#else
.PeriphClockSelection = RCC_PERIPHCLK_RTC | RCC_PERIPHCLK_USART3
| RCC_PERIPHCLK_FDCAN | RCC_PERIPHCLK_USART1 | RCC_PERIPHCLK_I2C1
| RCC_PERIPHCLK_USB | RCC_PERIPHCLK_FMC | RCC_PERIPHCLK_RNG,
.PLL2.PLL2M = 3,
.PLL2.PLL2N = 48,
.PLL2.PLL2P = 1,
.PLL2.PLL2Q = 2,
.PLL2.PLL2R = 2,
.PLL2.PLL2RGE = RCC_PLL2VCIRANGE_3,
.PLL2.PLL2VCOSEL = RCC_PLL2VCOWIDE,
.PLL2.PLL2FRACN = 0,
.PLL3.PLL3M = 25,
.PLL3.PLL3N = 192,
.PLL3.PLL3P = 2,
.PLL3.PLL3Q = 4,
.PLL3.PLL3R = 2,
.PLL3.PLL3RGE = RCC_PLL3VCIRANGE_0,
.PLL3.PLL3VCOSEL = RCC_PLL3VCOWIDE,
.PLL3.PLL3FRACN = 0,
.FmcClockSelection = RCC_FMCCLKSOURCE_PLL2,
.FdcanClockSelection = RCC_FDCANCLKSOURCE_PLL,
.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_D2PCLK1,
.Usart16ClockSelection = RCC_USART16CLKSOURCE_D2PCLK2,
.I2c123ClockSelection = RCC_I2C123CLKSOURCE_D2PCLK1,
.UsbClockSelection = RCC_USBCLKSOURCE_PLL3,
.RTCClockSelection = RCC_RTCCLKSOURCE_LSE,
.RngClockSelection = RCC_RNGCLKSOURCE_HSI48
#endif
};