RTOS/rtems
1
0
Fork 0
forked from Imagelibrary/rtems
Code Pull Requests Activity

New port of RTEMS to TI C3x and C4x.

Browse Source
This commit is contained in:
Joel Sherrill
2000-02-22 18:39:52 +00:00
parent 9f9efbca8d
commit 61ba976360
61 changed files with 8708 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

48
c/src/exec/score/cpu/c4x/Makefile.am Normal file
View File

@@ -0,0 +1,48 @@
##
## $Id$
##
AUTOMAKE_OPTIONS = foreign 1.4
ACLOCAL_AMFLAGS = -I $(RTEMS_TOPdir)/aclocal
SUBDIRS = rtems
C_FILES = cpu.c irq.c
C_O_FILES = $(C_FILES:%.c=$(ARCH)/%.o)
H_FILES = asm.h c4xio.h
S_FILES = cpu_asm.S
S_O_FILES = $(S_FILES:%.S=$(ARCH)/%.o)
REL = $(ARCH)/rtems-cpu.rel
include $(RTEMS_ROOT)/make/custom/@RTEMS_BSP@.cfg
include $(top_srcdir)/../../../../../../automake/lib.am
rtems_cpu_rel_OBJECTS = $(C_O_FILES) $(S_O_FILES)
$(PROJECT_INCLUDE):
$(mkinstalldirs) $@
$(PROJECT_INCLUDE)/%.h: %.h
$(INSTALL_DATA) $< $@
$(PROJECT_RELEASE)/lib/rtems$(LIB_VARIANT).o: $(ARCH)/rtems.o
$(INSTALL_DATA) $< $@
$(REL): $(rtems_cpu_rel_OBJECTS)
$(make-rel)
PREINSTALL_FILES += $(PROJECT_INCLUDE) $(H_FILES:%=$(PROJECT_INCLUDE)/%)
TMPINSTALL_FILES += $(PROJECT_RELEASE)/lib/rtems$(LIB_VARIANT).o
all-local: $(ARCH) $(PREINSTALL_FILES) $(rtems_cpu_rel_OBJECTS) $(REL) $(TMPINSTALL_FILES)
.PRECIOUS: $(REL)
EXTRA_DIST = asm.h cpu.c irq.c cpu_asm.S c4xio.h rtems.c
include $(top_srcdir)/../../../../../../automake/subdirs.am
include $(top_srcdir)/../../../../../../automake/local.am

101
c/src/exec/score/cpu/c4x/asm.h Normal file
View File

@@ -0,0 +1,101 @@
/* asm.h
*
* This include file attempts to address the problems
* caused by incompatible flavors of assemblers and
* toolsets. It primarily addresses variations in the
* use of leading underscores on symbols and the requirement
* that register names be preceded by a %.
*
*
* NOTE: The spacing in the use of these macros
* is critical to them working as advertised.
*
* COPYRIGHT:
*
* This file is based on similar code found in newlib available
* from ftp.cygnus.com. The file which was used had no copyright
* notice. This file is freely distributable as long as the source
* of the file is noted. This file is:
*
* COPYRIGHT (c) 1994-1997.
* On-Line Applications Research Corporation (OAR).
*
* $Id$
*/
#ifndef __C4X_ASM_h
#define __C4X_ASM_h
/*
* Indicate we are in an assembly file and get the basic CPU definitions.
*/
#ifndef ASM
#define ASM
#endif
#include <rtems/score/targopts.h>
#include <rtems/score/c4x.h>
/*
* Recent versions of GNU cpp define variables which indicate the
* need for underscores and percents. If not using GNU cpp or
* the version does not support this, then you will obviously
* have to define these as appropriate.
*/
#ifndef __USER_LABEL_PREFIX__
#define __USER_LABEL_PREFIX__ _
#endif
#ifndef __REGISTER_PREFIX__
#define __REGISTER_PREFIX__
#endif
/* ANSI concatenation macros. */
#define CONCAT1(a, b) CONCAT2(a, b)
#define CONCAT2(a, b) a ## b
/* Use the right prefix for global labels. */
#define SYM(x) CONCAT1 (__USER_LABEL_PREFIX__, x)
/* Use the right prefix for registers. */
#define REG(x) CONCAT1 (__REGISTER_PREFIX__, x)
/*
* define macros for all of the registers on this CPU
*
* EXAMPLE: #define d0 REG (d0)
*/
/*
* Define macros to handle section beginning and ends.
*/
#define BEGIN_CODE_DCL .text
#define END_CODE_DCL
#define BEGIN_DATA_DCL .data
#define END_DATA_DCL
#define BEGIN_CODE .text
#define END_CODE
#define BEGIN_DATA
#define END_DATA
#define BEGIN_BSS
#define END_BSS
#define END
/*
* Following must be tailor for a particular flavor of the C compiler.
* They may need to put underscores in front of the symbols.
*/
#define PUBLIC(sym) .globl SYM (sym)
#define EXTERN(sym) .globl SYM (sym)
#endif
/* end of include file */

52
c/src/exec/score/cpu/c4x/c4xio.h Normal file
View File

@@ -0,0 +1,52 @@
/*
* C4X IO Information
*
* $Id$
*/
#ifndef __C4XIO_h
#define __C4XIO_h
/*
* The following section of C4x timer code is based on C40 specific
* timer code from Ran Cabell <rcabell@norfolk.infi.net>. The
* only C3x/C4x difference spotted was the address of the timer.
* The names have been changed to be more RTEMS like.
*/
struct c4x_timer {
volatile int tcontrol;
volatile int r1[3];
volatile int tcounter;
volatile int r2[3];
volatile int tperiod;
};
#ifdef _TMS320C40
#define C4X_TIMER_0 ((struct c4x_timer*)0x100020)
#else
#define C4X_TIMER_0 ((struct c4x_timer*)0x808020)
#define C4X_TIMER_1 ((struct c4x_timer*)0x808030)
#endif
#define c4x_timer_start( _timer ) \
_timer->tcontrol=0x02c1
#define c4x_timer_stop( _timer ) _timer->tcontrol = 0
#define c4x_timer_get_counter( _timer ) (volatile int)(_timer->tcounter)
#define c4x_timer_set_counter( _timer, _value ) \
do { \
(volatile int)(_timer->tcounter) = _value; \
} while (0);
#define c4x_timer_get_period( _timer ) (volatile int)(_timer->tperiod)
#define c4x_timer_set_period( _timer, _value ) \
do { \
(volatile int)(_timer->tperiod) = _value; \
} while (0);
#endif
/* end if include file */

34
c/src/exec/score/cpu/c4x/configure.in Normal file
View File

@@ -0,0 +1,34 @@
dnl Process this file with autoconf to produce a configure script.
dnl
dnl $Id$
AC_PREREQ(2.13)
AC_INIT(cpu_asm.S)
RTEMS_TOP(../../../../../..)
AC_CONFIG_AUX_DIR(../../../../../..)
RTEMS_CANONICAL_TARGET_CPU
AM_INIT_AUTOMAKE(rtems-c-src-exec-score-cpu-c4x,$RTEMS_VERSION,no)
AM_MAINTAINER_MODE
RTEMS_ENV_RTEMSBSP
RTEMS_CHECK_CPU
RTEMS_CANONICAL_HOST
RTEMS_PROJECT_ROOT
RTEMS_PROG_CC_FOR_TARGET
RTEMS_CANONICALIZE_TOOLS
RTEMS_CHECK_NEWLIB
# Check if there is custom/*.cfg for this BSP
RTEMS_CHECK_CUSTOM_BSP(RTEMS_BSP)
# Explicitly list all Makefiles here
AC_OUTPUT(
Makefile
rtems/Makefile
rtems/score/Makefile)

199
c/src/exec/score/cpu/c4x/cpu.c Normal file
View File

@@ -0,0 +1,199 @@
/*
* XXX CPU Dependent Source
*
*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#include <rtems/system.h>
#include <rtems/score/isr.h>
#include <rtems/score/wkspace.h>
/* _CPU_Initialize
*
* This routine performs processor dependent initialization.
*
* INPUT PARAMETERS:
* cpu_table - CPU table to initialize
* thread_dispatch - address of disptaching routine
*
* C4x Specific Information:
*
*/
void _CPU_Initialize(
rtems_cpu_table *cpu_table,
void (*thread_dispatch) /* ignored on this CPU */
)
{
#if 0
/*
* The thread_dispatch argument is the address of the entry point
* for the routine called at the end of an ISR once it has been
* decided a context switch is necessary. On some compilation
* systems it is difficult to call a high-level language routine
* from assembly. This allows us to trick these systems.
*
* If you encounter this problem save the entry point in a CPU
* dependent variable.
*/
_CPU_Thread_dispatch_pointer = thread_dispatch;
#endif
#if (CPU_HARDWARE_FP == TRUE)
/*
* If there is not an easy way to initialize the FP context
* during Context_Initialize, then it is usually easier to
* save an "uninitialized" FP context here and copy it to
* the task's during Context_Initialize.
*/
/* FP context initialization support goes here */
#endif
_CPU_Table = *cpu_table;
}
/*PAGE
*
* _CPU_ISR_install_raw_handler
*
* C4x Specific Information:
*
*/
void _CPU_ISR_install_raw_handler(
unsigned32 vector,
proc_ptr new_handler,
proc_ptr *old_handler
)
{
void **ittp;
/*
* This is where we install the interrupt handler into the "raw" interrupt
* table used by the CPU to dispatch interrupt handlers.
*/
ittp = c4x_get_ittp();
*old_handler = ittp[ vector ];
ittp[ vector ] = new_handler;
}
/*XXX */
#define C4X_CACHE 1
#define C4X_BASE_ST (C4X_CACHE==1) ? 0x4800 : 0x4000
void _CPU_Context_Initialize(
Context_Control *_the_context,
void *_stack_base,
unsigned32 _size,
unsigned32 _isr,
void (*_entry_point)(void),
int _is_fp
)
{
unsigned int *_stack;
_stack = (unsigned int *)_stack_base;
*_stack = (unsigned int) _entry_point;
_the_context->sp = (unsigned int) _stack;
_the_context->st = C4X_BASE_ST;
if ( _isr == 0 )
_the_context->st |= C4X_ST_GIE;
}
/*PAGE
*
* _CPU_ISR_install_vector
*
* This kernel routine installs the RTEMS handler for the
* specified vector.
*
* Input parameters:
* vector - interrupt vector number
* old_handler - former ISR for this vector number
* new_handler - replacement ISR for this vector number
*
* Output parameters: NONE
*
*
* C4x Specific Information:
*
*/
void _CPU_ISR_install_vector(
unsigned32 vector,
proc_ptr new_handler,
proc_ptr *old_handler
)
{
proc_ptr ignored;
extern void rtems_irq_prologue_0(void);
extern void rtems_irq_prologue_1(void);
void *entry;
*old_handler = _ISR_Vector_table[ vector ];
/*
* If the interrupt vector table is a table of pointer to isr entry
* points, then we need to install the appropriate RTEMS interrupt
* handler for this vector number.
*/
entry = (void *)rtems_irq_prologue_0 +
((rtems_irq_prologue_1 - rtems_irq_prologue_0) * vector);
_CPU_ISR_install_raw_handler( vector, entry, &ignored );
/*
* We put the actual user ISR address in '_ISR_vector_table'. This will
* be used by the _ISR_Handler so the user gets control.
*/
_ISR_Vector_table[ vector ] = new_handler;
}
/*PAGE
*
* _CPU_Thread_Idle_body
*
* NOTES:
*
* 1. This is the same as the regular CPU independent algorithm.
*
* 2. If you implement this using a "halt", "idle", or "shutdown"
* instruction, then don't forget to put it in an infinite loop.
*
* 3. Be warned. Some processors with onboard DMA have been known
* to stop the DMA if the CPU were put in IDLE mode. This might
* also be a problem with other on-chip peripherals. So use this
* hook with caution.
*
* C4x Specific Information:
*
*
*/
#if (CPU_PROVIDES_IDLE_THREAD_BODY == 1)
void _CPU_Thread_Idle_body( void )
{
for( ; ; ) {
__asm__( "idle" );
__asm__( "nop" );
__asm__( "nop" );
__asm__( "nop" );
/* insert your "halt" instruction here */ ;
}
}
#endif

770
c/src/exec/score/cpu/c4x/cpu_asm.S Normal file
View File

@@ -0,0 +1,770 @@
/* cpu_asm.c ===> cpu_asm.S or cpu_asm.s
*
* This file contains the basic algorithms for all assembly code used
* in an specific CPU port of RTEMS. These algorithms must be implemented
* in assembly language
*
* NOTE: This is supposed to be a .S or .s file NOT a C file.
*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#include <asm.h>
/*
* _CPU_Context_save_fp_context
*
* This routine is responsible for saving the FP context
* at *fp_context_ptr. If the point to load the FP context
* from is changed then the pointer is modified by this routine.
*
* Sometimes a macro implementation of this is in cpu.h which dereferences
* the ** and a similarly named routine in this file is passed something
* like a (Context_Control_fp *). The general rule on making this decision
* is to avoid writing assembly language.
*
* void _CPU_Context_save_fp(
* void **fp_context_ptr
*
* C4x Specific Information:
*
* There is no distiniction between FP and integer context in this port.
*/
/*
* _CPU_Context_restore_fp_context
*
* This routine is responsible for restoring the FP context
* at *fp_context_ptr. If the point to load the FP context
* from is changed then the pointer is modified by this routine.
*
* Sometimes a macro implementation of this is in cpu.h which dereferences
* the ** and a similarly named routine in this file is passed something
* like a (Context_Control_fp *). The general rule on making this decision
* is to avoid writing assembly language.
*
* void _CPU_Context_restore_fp(
* void **fp_context_ptr
* )
*
* C4x Specific Information:
*
* There is no distiniction between FP and integer context in this port.
*/
/* _CPU_Context_switch
*
* This routine performs a normal non-FP context switch.
*
* void _CPU_Context_switch(
* Context_Control *run,
* Context_Control *heir
* )
*
* TMS320C3x General-Purpose Applications User's Guide, section 2.4
* (p 2-11 and following), Context Switching in Interrupts and
* Subroutines states that "If the program is in a subroutine, it
* must preserve the dedicated C registers as follows:"
*
* Save as Integers Save as Floating-Point
* ================ ======================
* R4 R8 R6 R7
* AR4 AR5
* AR6 AR7
* FP DP (small model only)
* SP
*/
.global SYM(_CPU_Context_switch)
SYM(_CPU_Context_switch):
.if .REGPARM == 0
ldi sp, ar0
ldi *ar0, ar2 ; get the location of running context
.endif
sti st,*ar2++ ; store status word
sti ar3,*ar2++ ; store ar3
sti ar4,*ar2++ ; store ar4
sti ar5,*ar2++ ; store ar5
sti ar6,*ar2++ ; store ar6
sti ar7,*ar2++ ; store ar7
sti r4,*ar2++ ; store integer portion of r4
sti r5,*ar2++ ; store integer portion of r5
stf r6,*ar2++ ; store float portion of r6
stf r7,*ar2++ ; store float portion of r7
.if .TMS320C40
sti r8,*ar2++ ; store integer portion of r8
.endif
sti sp,*ar2++ ; store sp
; end of save
.if .REGPARM == 0
ldi *-ar0(2), ar2 ; get the location of heir context
.else
ldi r2,ar2
.endif
_local_restore:
ldi *ar2++,ar0 ; load status word into register
ldi *ar2++,ar3 ; load ar3
ldi *ar2++,ar4 ; load ar4
ldi *ar2++,ar5 ; load ar5
ldi *ar2++,ar6 ; load ar6
ldi *ar2++,ar7 ; load ar7
ldi *ar2++,r4 ; load integer portion of r4
ldi *ar2++,r5 ; load integer portion of r5
ldf *ar2++,r6 ; load float portion of r6
ldf *ar2++,r7 ; load float portion of r7
.if .TMS320C40
ldi *ar2++,r8 ; load integer portion of r8
.endif
ldi *ar2++,sp ; load sp
ldi ar0,st ; restore status word and interrupts
rets
/*
* _CPU_Context_restore
*
* This routine is generally used only to restart self in an
* efficient manner. It may simply be a label in _CPU_Context_switch.
*
* NOTE: May be unnecessary to reload some registers.
*
* void _CPU_Context_restore(
* Context_Control *new_context
* )
*/
.global SYM(_CPU_Context_restore)
SYM(_CPU_Context_restore):
.if .REGPARM == 0
ldi sp, ar0
ldi *ar0, ar2 ; get the location of context to restore
.endif
br _local_restore
/* void _ISR_Handler()
*
* This routine provides the RTEMS interrupt management.
*
* void _ISR_Handler()
*/
/*
* At entry to "common" _ISR_Handler, the vector number must be
* available. On some CPUs the hardware puts either the vector
* number or the offset into the vector table for this ISR in a
* known place. If the hardware does not give us this information,
* then the assembly portion of RTEMS for this port will contain
* a set of distinct interrupt entry points which somehow place
* the vector number in a known place (which is safe if another
* interrupt nests this one) and branches to _ISR_Handler.
*/
/*
* save some or all context on stack
* may need to save some special interrupt information for exit
*
* #if ( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE )
* if ( _ISR_Nest_level == 0 )
* switch to software interrupt stack
* #endif
*
* _ISR_Nest_level++;
*
* _Thread_Dispatch_disable_level++;
*
* (*_ISR_Vector_table[ vector ])( vector );
*
* --_ISR_Nest_level;
*
* if ( _ISR_Nest_level )
* goto the label "exit interrupt (simple case)"
*
* #if ( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE )
* restore stack
* #endif
*
* if ( !_Context_Switch_necessary )
* goto the label "exit interrupt (simple case)"
*
* if ( !_ISR_Signals_to_thread_executing )
* _ISR_Signals_to_thread_executing = FALSE;
* goto the label "exit interrupt (simple case)"
*
* call _Thread_Dispatch() or prepare to return to _ISR_Dispatch
*
* prepare to get out of interrupt
* return from interrupt (maybe to _ISR_Dispatch)
*
* LABEL "exit interrupt (simple case):
* prepare to get out of interrupt
* return from interrupt
*/
.global SYM(_ISR_Handler_save_registers)
SYM(_ISR_Handler_save_registers):
; no push st because it is already pushed
; no push ar2 because it is already pushed and vector number loaded
push ar0
push ar1
push dp
push ir0
push ir1
push rs
push re
push rc
push bk
push r0
pushf r0
push r1
pushf r1
push r2
pushf r2
push r3
pushf r3
; no push r4 because other part of register is in basic context
push r4
pushf r4
; no push r5 because other part of register is in basic context
push r5
pushf r5
push r6
pushf r6
; no pushf r6 because other part of register is in basic context
push r7
pushf r7
; no pushf r7 because other part of register is in basic context
.if .TMS320C40
push r8
; no pushf r8 because other part of register is in basic context
push r9
pushf r9
push r10
pushf r10
push r11
pushf r11
.endif
ldi sp,r2
call SYM(__ISR_Handler)
.if .TMS320C40
popf r11
pop r11
popf r10
pop r10
popf r9
pop r9
; no popf r8 because other part of register is in basic context
pop r8
.endif
; no popf r7 because other part of register is in basic context
popf r7
pop r7
; no popf r6 because other part of register is in basic context
popf r6
pop r6
; no popf r5 because other part of register is in basic context
popf r5
pop r5
; no pop r4 because other part of register is in basic context
popf r4
pop r4
popf r3
pop r3
popf r2
pop r2
popf r1
pop r1
popf r0
pop r0
pop bk
pop rc
pop re
pop rs
pop ir1
pop ir0
pop dp
pop ar1
pop ar0
pop ar2 ; because the vector numbers goes here
pop st
reti
/*
* Prologues so we can know the vector number. Generated by this script:
*
* i=0
* while test $i -lt 64
* do
*
* printf "\t.global\tSYM(rtems_irq_prologue_%X)\n" $i
* printf "SYM(rtems_irq_prologue_%X):\n" $i
* printf "\tpush\tst\n"
* printf "\tpush\tar2\n"
* printf "\tldi\t0x%x,ar2\n" $i
* printf "\tbr\tSYM(_ISR_Handler_save_registers)\n"
* printf "\n"
* i=`expr $i + 1`
*
* done
*/
.global SYM(rtems_irq_prologue_0)
SYM(rtems_irq_prologue_0):
push st
push ar2
ldi 0x0,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_1)
SYM(rtems_irq_prologue_1):
push st
push ar2
ldi 0x1,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_2)
SYM(rtems_irq_prologue_2):
push st
push ar2
ldi 0x2,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_3)
SYM(rtems_irq_prologue_3):
push st
push ar2
ldi 0x3,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_4)
SYM(rtems_irq_prologue_4):
push st
push ar2
ldi 0x4,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_5)
SYM(rtems_irq_prologue_5):
push st
push ar2
ldi 0x5,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_6)
SYM(rtems_irq_prologue_6):
push st
push ar2
ldi 0x6,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_7)
SYM(rtems_irq_prologue_7):
push st
push ar2
ldi 0x7,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_8)
SYM(rtems_irq_prologue_8):
push st
push ar2
ldi 0x8,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_9)
SYM(rtems_irq_prologue_9):
push st
push ar2
ldi 0x9,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_A)
SYM(rtems_irq_prologue_A):
push st
push ar2
ldi 0xa,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_B)
SYM(rtems_irq_prologue_B):
push st
push ar2
ldi 0xb,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_C)
SYM(rtems_irq_prologue_C):
push st
push ar2
ldi 0xc,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_D)
SYM(rtems_irq_prologue_D):
push st
push ar2
ldi 0xd,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_E)
SYM(rtems_irq_prologue_E):
push st
push ar2
ldi 0xe,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_F)
SYM(rtems_irq_prologue_F):
push st
push ar2
ldi 0xf,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_10)
SYM(rtems_irq_prologue_10):
push st
push ar2
ldi 0x10,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_11)
SYM(rtems_irq_prologue_11):
push st
push ar2
ldi 0x11,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_12)
SYM(rtems_irq_prologue_12):
push st
push ar2
ldi 0x12,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_13)
SYM(rtems_irq_prologue_13):
push st
push ar2
ldi 0x13,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_14)
SYM(rtems_irq_prologue_14):
push st
push ar2
ldi 0x14,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_15)
SYM(rtems_irq_prologue_15):
push st
push ar2
ldi 0x15,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_16)
SYM(rtems_irq_prologue_16):
push st
push ar2
ldi 0x16,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_17)
SYM(rtems_irq_prologue_17):
push st
push ar2
ldi 0x17,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_18)
SYM(rtems_irq_prologue_18):
push st
push ar2
ldi 0x18,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_19)
SYM(rtems_irq_prologue_19):
push st
push ar2
ldi 0x19,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_1A)
SYM(rtems_irq_prologue_1A):
push st
push ar2
ldi 0x1a,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_1B)
SYM(rtems_irq_prologue_1B):
push st
push ar2
ldi 0x1b,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_1C)
SYM(rtems_irq_prologue_1C):
push st
push ar2
ldi 0x1c,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_1D)
SYM(rtems_irq_prologue_1D):
push st
push ar2
ldi 0x1d,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_1E)
SYM(rtems_irq_prologue_1E):
push st
push ar2
ldi 0x1e,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_1F)
SYM(rtems_irq_prologue_1F):
push st
push ar2
ldi 0x1f,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_20)
SYM(rtems_irq_prologue_20):
push st
push ar2
ldi 0x20,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_21)
SYM(rtems_irq_prologue_21):
push st
push ar2
ldi 0x21,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_22)
SYM(rtems_irq_prologue_22):
push st
push ar2
ldi 0x22,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_23)
SYM(rtems_irq_prologue_23):
push st
push ar2
ldi 0x23,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_24)
SYM(rtems_irq_prologue_24):
push st
push ar2
ldi 0x24,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_25)
SYM(rtems_irq_prologue_25):
push st
push ar2
ldi 0x25,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_26)
SYM(rtems_irq_prologue_26):
push st
push ar2
ldi 0x26,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_27)
SYM(rtems_irq_prologue_27):
push st
push ar2
ldi 0x27,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_28)
SYM(rtems_irq_prologue_28):
push st
push ar2
ldi 0x28,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_29)
SYM(rtems_irq_prologue_29):
push st
push ar2
ldi 0x29,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_2A)
SYM(rtems_irq_prologue_2A):
push st
push ar2
ldi 0x2a,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_2B)
SYM(rtems_irq_prologue_2B):
push st
push ar2
ldi 0x2b,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_2C)
SYM(rtems_irq_prologue_2C):
push st
push ar2
ldi 0x2c,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_2D)
SYM(rtems_irq_prologue_2D):
push st
push ar2
ldi 0x2d,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_2E)
SYM(rtems_irq_prologue_2E):
push st
push ar2
ldi 0x2e,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_2F)
SYM(rtems_irq_prologue_2F):
push st
push ar2
ldi 0x2f,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_30)
SYM(rtems_irq_prologue_30):
push st
push ar2
ldi 0x30,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_31)
SYM(rtems_irq_prologue_31):
push st
push ar2
ldi 0x31,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_32)
SYM(rtems_irq_prologue_32):
push st
push ar2
ldi 0x32,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_33)
SYM(rtems_irq_prologue_33):
push st
push ar2
ldi 0x33,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_34)
SYM(rtems_irq_prologue_34):
push st
push ar2
ldi 0x34,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_35)
SYM(rtems_irq_prologue_35):
push st
push ar2
ldi 0x35,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_36)
SYM(rtems_irq_prologue_36):
push st
push ar2
ldi 0x36,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_37)
SYM(rtems_irq_prologue_37):
push st
push ar2
ldi 0x37,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_38)
SYM(rtems_irq_prologue_38):
push st
push ar2
ldi 0x38,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_39)
SYM(rtems_irq_prologue_39):
push st
push ar2
ldi 0x39,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_3A)
SYM(rtems_irq_prologue_3A):
push st
push ar2
ldi 0x3a,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_3B)
SYM(rtems_irq_prologue_3B):
push st
push ar2
ldi 0x3b,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_3C)
SYM(rtems_irq_prologue_3C):
push st
push ar2
ldi 0x3c,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_3D)
SYM(rtems_irq_prologue_3D):
push st
push ar2
ldi 0x3d,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_3E)
SYM(rtems_irq_prologue_3E):
push st
push ar2
ldi 0x3e,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_3F)
SYM(rtems_irq_prologue_3F):
push st
push ar2
ldi 0x3f,ar2
br SYM(_ISR_Handler_save_registers)

82
c/src/exec/score/cpu/c4x/irq.c Normal file
View File

@@ -0,0 +1,82 @@
/*
* XXX CPU Dependent Source
*
*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#include <rtems/system.h>
#include <rtems/score/cpu.h>
#include <rtems/score/isr.h>
#include <rtems/score/thread.h>
/*
* This routine provides the RTEMS interrupt management.
*/
#if( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE)
unsigned long *_old_stack_ptr;
#endif
register unsigned long *stack_ptr asm("sp");
void __ISR_Handler(unsigned32 vector, void *isr_sp)
{
register unsigned32 level;
/* already disabled when we get here */
/* _CPU_ISR_Disable( level ); */
_Thread_Dispatch_disable_level++;
#if 0
if ( stack_ptr > (_Thread_Executing->Start.stack +
_Thread_Executing->Start.Initial_stack.size) ) {
printk( "Blown interrupt stack at 0x%x\n", stack_ptr );
}
#endif
#if( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE)
if ( _ISR_Nest_level == 0 ) {
/* Install irq stack */
_old_stack_ptr = stack_ptr;
stack_ptr = _CPU_Interrupt_stack_low;
}
#endif
_ISR_Nest_level++;
/* leave it to the ISR to decide if they get reenabled */
/* _CPU_ISR_Enable( level ); */
/* call isp */
if ( _ISR_Vector_table[ vector] )
(*_ISR_Vector_table[ vector ])(
vector, isr_sp - sizeof(CPU_Interrupt_frame) + 1 );
_CPU_ISR_Disable( level );
_ISR_Nest_level--;
#if( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE)
if ( _ISR_Nest_level == 0 ) /* restore old stack pointer */
stack_ptr = _old_stack_ptr;
#endif
_Thread_Dispatch_disable_level--;
_CPU_ISR_Enable( level );
if ( _Thread_Dispatch_disable_level == 0 ) {
if ( _Context_Switch_necessary || !_ISR_Signals_to_thread_executing ) {
_ISR_Signals_to_thread_executing = FALSE;
_Thread_Dispatch();
}
}
}

44
c/src/exec/score/cpu/c4x/rtems.c Normal file
View File

@@ -0,0 +1,44 @@
/* rtems.c ===> rtems.S or rtems.s
*
* This file contains the single entry point code for
* the XXX implementation of RTEMS.
*
* NOTE: This is supposed to be a .S or .s file NOT a C file.
*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
/*
* This is supposed to be an assembly file. This means that system.h
* and cpu.h should not be included in a "real" rtems file.
*/
#include <rtems/system.h>
#include <rtems/score/cpu.h>
/* #include "asm.h> */
/*
* RTEMS
*
* This routine jumps to the directive indicated in the
* CPU defined register. This routine is used when RTEMS is
* linked by itself and placed in ROM. This routine is the
* first address in the ROM space for RTEMS. The user "calls"
* this address with the directive arguments in the normal place.
* This routine then jumps indirectly to the correct directive
* preserving the arguments. The directive should not realize
* it has been "wrapped" in this way. The table "_Entry_points"
* is used to look up the directive.
*/
void RTEMS()
{
}

10
c/src/exec/score/cpu/c4x/rtems/Makefile.am Normal file
View File

@@ -0,0 +1,10 @@
##
## $Id$
##
AUTOMAKE_OPTIONS = foreign 1.4
SUBDIRS = score
include $(top_srcdir)/../../../../../../automake/subdirs.am
include $(top_srcdir)/../../../../../../automake/local.am

26
c/src/exec/score/cpu/c4x/rtems/score/Makefile.am Normal file
View File

@@ -0,0 +1,26 @@
##
## $Id$
##
AUTOMAKE_OPTIONS = foreign 1.4
H_FILES = cpu.h c4x.h c4xtypes.h cpu_asm.h
noinst_HEADERS = $(H_FILES)
#
# (OPTIONAL) Add local stuff here using +=
#
PREINSTALL_FILES = \
$(PROJECT_INCLUDE)/rtems/score \
$(H_FILES:%.h=$(PROJECT_INCLUDE)/rtems/score/%.h)
$(PROJECT_INCLUDE)/rtems/score:
$(mkinstalldirs) $@
$(PROJECT_INCLUDE)/rtems/score/%.h: %.h
$(INSTALL_DATA) $< $@
all-local: $(PREINSTALL_FILES)
include $(top_srcdir)/../../../../../../automake/local.am

362
c/src/exec/score/cpu/c4x/rtems/score/c4x.h Normal file
View File

@@ -0,0 +1,362 @@
/* c4x.h
*
* This file is an example (i.e. "no CPU") of the file which is
* created for each CPU family port of RTEMS.
*
*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*
*/
#ifndef _INCLUDE_C4X_h
#define _INCLUDE_C4X_h
#ifdef __cplusplus
extern "C" {
#endif
/*
* This file contains the information required to build
* RTEMS for a particular member of the "no cpu"
* family when executing in protected mode. It does
* this by setting variables to indicate which implementation
* dependent features are present in a particular member
* of the family.
*/
#if defined(c30)
#define CPU_MODEL_NAME "C30"
#elif defined(c31)
#define CPU_MODEL_NAME "C31"
#elif defined(c32)
#define CPU_MODEL_NAME "C32"
#elif defined(c40)
#define CPU_MODEL_NAME "C40"
#elif defined(c44)
#define CPU_MODEL_NAME "C44"
#else
#error "Unsupported CPU Model"
#endif
/*
* Define the name of the CPU family.
*/
#define CPU_NAME "Texas Instruments C3x/C4x"
/*
* This port is a little unusual in that even though there are "floating
* point registers", the notion of floating point is very inherent to
* applications. In addition, the calling conventions require that
* only a few extended registers be preserved across subroutine calls.
* The overhead of including these few registers in the basic
* context is small compared to the overhead of managing the notion
* of separate floating point contexts. So we decided to pretend that
* there is no FPU on the C3x or C4x.
*/
#define C4X_HAS_FPU 0
/*
* Routines to manipulate the bits in the Status Word (ST).
*/
#define C4X_ST_C 0x0001
#define C4X_ST_V 0x0002
#define C4X_ST_Z 0x0004
#define C4X_ST_N 0x0008
#define C4X_ST_UF 0x0010
#define C4X_ST_LV 0x0020
#define C4X_ST_LUF 0x0040
#define C4X_ST_OVM 0x0080
#define C4X_ST_RM 0x0100
#define C4X_ST_CF 0x0400
#define C4X_ST_CE 0x0800
#define C4X_ST_CC 0x1000
#define C4X_ST_GIE 0x2000
#ifndef _TMS320C40
#define C3X_IE_INTERRUPT_MASK_BITS 0xffff
#define C3x_IE_INTERRUPTS_ALL_ENABLED 0x0000
#define C3x_IE_INTERRUPTS_ALL_DISABLED 0xffff
#endif
#ifndef ASM
/*
* A nop macro.
*/
#define c4x_nop() \
__asm__("nop");
/*
* Routines to set and clear individual bits in the ST (status word).
*
* cpu_st_bit_clear - clear bit in ST
* cpu_st_bit_set - set bit in ST
* cpu_st_get - obtain entire ST
*/
#ifdef _TMS320C40
#define c4x_gie_nop()
#else
#define c4x_gie_nop() { c4x_nop(); c4x_nop(); }
#endif
#define cpu_st_bit_clear(_st_bit) \
do { \
__asm__("andn %0,st" : : "g" (_st_bit) : "cc"); \
c4x_gie_nop(); \
} while (0)
#define cpu_st_bit_set(_st_bit) \
do { \
__asm__("or %0,st" : : "g" (_st_bit) : "cc"); \
c4x_gie_nop(); \
} while (0)
static inline unsigned int cpu_st_get(void)
{
register unsigned int st_value;
__asm__("ldi st, %0" : "=r" (st_value));
return st_value;
}
/*
* Routines to manipulate the Global Interrupt Enable (GIE) bit in
* the Status Word (ST).
*
* c4x_global_interrupts_get - returns current GIE setting
* c4x_global_interrupts_disable - disables global interrupts
* c4x_global_interrupts_enable - enables global interrupts
* c4x_global_interrupts_restore - restores GIE to pre-disable state
* c4x_global_interrupts_flash - temporarily enable global interrupts
*/
#define c4x_global_interrupts_get() \
(cpu_st_get() & C4X_ST_GIE)
#define c4x_global_interrupts_disable() \
cpu_st_bit_clear(C4X_ST_GIE)
#define c4x_global_interrupts_enable() \
cpu_st_bit_set(C4X_ST_GIE)
#define c4x_global_interrupts_restore(_old_level) \
cpu_st_bit_set(_old_level)
#define c4x_global_interrupts_flash(_old_level) \
do { \
cpu_st_bit_set(_old_level); \
cpu_st_bit_clear(C4X_ST_GIE); \
} while (0)
#ifndef _TMS320C40
/*
* Routines to set and get the IF register
*
* c3x_get_if - obtains IF register
* c3x_set_if - sets IF register
*/
static inline unsigned int c3x_get_if(void)
{
register unsigned int _if_value;
__asm__( "ldi if, %0" : "=r" (_if_value) );
return _if_value;
}
static inline void c3x_set_if(unsigned int _if_value)
{
__asm__( "ldi %0, if" : : "g" (_if_value) : "if", "cc");
}
/*
* Routines to set and get the IE register
*
* c3x_get_ie - obtains IE register
* c3x_set_ie - sets IE register
*/
static inline unsigned int c3x_get_ie(void)
{
register unsigned int _ie_value;
__asm__ volatile ( "ldi ie, %0" : "=r" (_ie_value) );
return _ie_value;
}
static inline void c3x_set_ie(unsigned int _ie_value)
{
__asm__ volatile ( "ldi %0, ie" : : "g" (_ie_value) : "ie", "cc");
}
/*
* Routines to manipulates the mask portion of the IE register.
*
* c3x_ie_mask_all - returns previous IE mask
* c3x_ie_mask_restore - restores previous IE mask
* c3x_ie_mask_flash - temporarily restores previous IE mask
* c3x_ie_mask_set - sets a specific set of the IE mask
*/
#define c3x_ie_mask_all( _isr_cookie ) \
do { \
__asm__("ldi ie,%0\n" \
"\tandn 0ffffh, ie" \
: "=r" (_isr_cookie): : "ie", "cc" ); \
} while (0)
#define c3x_ie_mask_restore( _isr_cookie ) \
do { \
__asm__("or %0, ie" \
: : "g" (_isr_cookie) : "ie", "cc" ); \
} while (0)
#define c3x_ie_mask_flash( _isr_cookie ) \
do { \
__asm__("or %0, ie\n" \
"\tandn 0ffffh, ie" \
: : "g" (_isr_cookie) : "ie", "cc" ); \
} while (0)
#define c3x_ie_mask_set( _new_mask ) \
do { unsigned int _ie_mask; \
unsigned int _ie_value; \
\
if ( _new_mask == 0 ) _ie_mask = 0; \
else _ie_mask = 0xffff; \
_ie_value = c3x_get_ie(); \
_ie_value &= C4X_IE_INTERRUPT_MASK_BITS; \
_ie_value |= _ie_mask; \
c3x_set_ie(_ie_value); \
} while (0)
#endif
/* end of C3x specific interrupt flag routines */
/*
* This is a section of C4x specific interrupt flag management routines.
*/
#ifdef _TMS320C40
/*
* Routines to set and get the IIF register
*
* c4x_get_iif - obtains IIF register
* c4x_set_iif - sets IIF register
*/
static inline unsigned int c4x_get_iif(void)
{
register unsigned int _iif_value;
__asm__( "ldi iif, %0" : "=r" (_iif_value) );
return _iif_value;
}
static inline void c4x_set_iif(unsigned int _iif_value)
{
__asm__( "ldi %0, iif" : : "g" (_iif_value) : "iif", "cc");
}
/*
* Routines to set and get the IIE register
*
* c4x_get_iie - obtains IIE register
* c4x_set_iie - sets IIE register
*/
static inline unsigned int c4x_get_iie(void)
{
register unsigned int _iie_value;
__asm__( "ldi iie, %0" : "=r" (_iie_value) );
return _iie_value;
}
static inline void c4x_set_iie(unsigned int _iie_value)
{
__asm__( "ldi %0, iie" : : "g" (_iie_value) : "iie", "cc");
}
/*
* Routines to manipulates the mask portion of the IIE register.
*
* c4x_ie_mask_all - returns previous IIE mask
* c4x_ie_mask_restore - restores previous IIE mask
* c4x_ie_mask_flash - temporarily restores previous IIE mask
* c4x_ie_mask_set - sets a specific set of the IIE mask
*/
#if 0
#warning "C4x IIE masking routines not implemented."
#define c4x_iie_mask_all( _isr_cookie )
#define c4x_iie_mask_restore( _isr_cookie )
#define c4x_iie_mask_flash( _isr_cookie )
#define c4x_iie_mask_set( _new_mask )
#endif
#endif
/* end of C4x specific interrupt flag routines */
/*
* Routines to access the Interrupt Trap Table Pointer
*
* c4x_get_ittp - get ITTP
* c4x_set_ittp - set ITTP
*/
static inline void * c4x_get_ittp(void)
{
register unsigned int _if_value;
__asm__( "ldi if, %0" : "=r" (_if_value) );
return (void *)((_if_value & 0xffff) >> 8);
}
static inline void c4x_set_ittp(void *_ittp_value)
{
unsigned int _if_value;
unsigned int _ittp_field;
#ifdef _TMS320C40
_if_value = c4x_get_iif();
#else
_if_value = c3x_get_if();
#endif
_if_value &= 0xffff;
_ittp_field = (((unsigned int) _ittp_value) << 8);
_if_value |= _ittp_field;
#ifdef _TMS320C40
c4x_set_iif( _if_value );
#else
c3x_set_if( _if_value );
#endif
}
#endif /* ifndef ASM */
#ifdef __cplusplus
}
#endif
#endif /* ! _INCLUDE_C4X_h */
/* end of include file */

56
c/src/exec/score/cpu/c4x/rtems/score/c4xtypes.h Normal file
View File

@@ -0,0 +1,56 @@
/* c4xtypes.h
*
* This include file contains type definitions pertaining to the Intel
* C4x processor family.
*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#ifndef __C4X_TYPES_h
#define __C4X_TYPES_h
#ifndef ASM
#ifdef __cplusplus
extern "C" {
#endif
/*
* This section defines the basic types for this processor.
*/
typedef unsigned char unsigned8; /* unsigned 8-bit integer */
typedef unsigned short unsigned16; /* unsigned 16-bit integer */
typedef unsigned int unsigned32; /* unsigned 32-bit integer */
typedef unsigned long long unsigned64; /* unsigned 64-bit integer */
typedef unsigned16 Priority_Bit_map_control;
typedef signed char signed8; /* 8-bit signed integer */
typedef signed short signed16; /* 16-bit signed integer */
typedef signed int signed32; /* 32-bit signed integer */
typedef signed long long signed64; /* 64 bit signed integer */
typedef unsigned32 boolean; /* Boolean value */
typedef float single_precision; /* single precision float */
typedef double double_precision; /* double precision float */
typedef void c4x_isr;
typedef void ( *c4x_isr_entry )( void );
#ifdef __cplusplus
}
#endif
#endif /* !ASM */
#endif
/* end of include file */

1256
c/src/exec/score/cpu/c4x/rtems/score/cpu.h Normal file
View File

File diff suppressed because it is too large Load Diff

70
c/src/exec/score/cpu/c4x/rtems/score/cpu_asm.h Normal file
View File

@@ -0,0 +1,70 @@
/*
* cpu_asm.h
*
* Very loose template for an include file for the cpu_asm.? file
* if it is implemented as a ".S" file (preprocessed by cpp) instead
* of a ".s" file (preprocessed by gm4 or gasp).
*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*
*/
#ifndef __CPU_ASM_h
#define __CPU_ASM_h
/* pull in the generated offsets */
#include <rtems/score/offsets.h>
/*
* Hardware General Registers
*/
/* put something here */
/*
* Hardware Floating Point Registers
*/
/* put something here */
/*
* Hardware Control Registers
*/
/* put something here */
/*
* Calling Convention
*/
/* put something here */
/*
* Temporary registers
*/
/* put something here */
/*
* Floating Point Registers - SW Conventions
*/
/* put something here */
/*
* Temporary floating point registers
*/
/* put something here */
#endif
/* end of file */

56
c/src/exec/score/cpu/c4x/rtems/score/types.h Normal file
View File

@@ -0,0 +1,56 @@
/* c4xtypes.h
*
* This include file contains type definitions pertaining to the Intel
* C4x processor family.
*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#ifndef __C4X_TYPES_h
#define __C4X_TYPES_h
#ifndef ASM
#ifdef __cplusplus
extern "C" {
#endif
/*
* This section defines the basic types for this processor.
*/
typedef unsigned char unsigned8; /* unsigned 8-bit integer */
typedef unsigned short unsigned16; /* unsigned 16-bit integer */
typedef unsigned int unsigned32; /* unsigned 32-bit integer */
typedef unsigned long long unsigned64; /* unsigned 64-bit integer */
typedef unsigned16 Priority_Bit_map_control;
typedef signed char signed8; /* 8-bit signed integer */
typedef signed short signed16; /* 16-bit signed integer */
typedef signed int signed32; /* 32-bit signed integer */
typedef signed long long signed64; /* 64 bit signed integer */
typedef unsigned32 boolean; /* Boolean value */
typedef float single_precision; /* single precision float */
typedef double double_precision; /* double precision float */
typedef void c4x_isr;
typedef void ( *c4x_isr_entry )( void );
#ifdef __cplusplus
}
#endif
#endif /* !ASM */
#endif
/* end of include file */

12
c/src/lib/libbsp/c4x/Makefile.am Normal file
View File

@@ -0,0 +1,12 @@
##
## $Id$
##
AUTOMAKE_OPTIONS = foreign 1.4
ACLOCAL_AMFLAGS = -I $(RTEMS_TOPdir)/aclocal
## Descend into the $(RTEMS_BSP_FAMILY) directory
SUBDIRS = shared $(RTEMS_BSP_FAMILY)
include $(top_srcdir)/../../../../../automake/subdirs.am
include $(top_srcdir)/../../../../../automake/local.am

17
c/src/lib/libbsp/c4x/c4xsim/Makefile.am Normal file
View File

@@ -0,0 +1,17 @@
##
## $Id$
##
AUTOMAKE_OPTIONS = foreign 1.4
ACLOCAL_AMFLAGS = -I $(RTEMS_TOPdir)/aclocal
# wrapup is the one that actually builds and installs the library
# from the individual .rel files built in other directories
SUBDIRS = . start include startup console clock timer wrapup tools
include $(top_srcdir)/../../bsp.am
EXTRA_DIST = bsp_specs times
include $(top_srcdir)/../../../../../../automake/subdirs.am
include $(top_srcdir)/../../../../../../automake/local.am

46
c/src/lib/libbsp/c4x/c4xsim/README Normal file
View File

@@ -0,0 +1,46 @@
#
# $Id$
#
BSP NAME: c4xsim
BOARD: Simulator in GDB
BUS: N/A
CPU FAMILY: ppc
CPU: C32 and others
COPROCESSORS: N/A
MODE: 32 bit mode
DEBUG MONITOR: gdb simulator
PERIPHERALS
===========
TIMERS: PPC internal Timebase register
RESOLUTION: ???
SERIAL PORTS: simulated via
REAL-TIME CLOCK: ???
DMA: none
VIDEO: none
SCSI: none
NETWORKING: none
DRIVER INFORMATION
==================
CLOCK DRIVER: ???
IOSUPP DRIVER: N/A
SHMSUPP: N/A
TIMER DRIVER: ???
TTY DRIVER: ???
STDIO
=====
PORT: Console port 0
ELECTRICAL: na
BAUD: na
BITS PER CHARACTER: na
PARITY: na
STOP BITS: na
Notes
=====
NONE

23
c/src/lib/libbsp/c4x/c4xsim/bsp_specs Normal file
View File

@@ -0,0 +1,23 @@
%rename cpp old_cpp
%rename lib old_lib
%rename endfile old_endfile
%rename startfile old_startfile
%rename link old_link
*cpp:
%(old_cpp) %{qrtems: -D__embedded__} -Asystem(embedded)
*lib:
%{!qrtems: %(old_lib)} %{qrtems: --start-group \
%{!qrtems_debug: -lrtemsall} %{qrtems_debug: -lrtemsall_g} \
-lc -lgcc --end-group \
%{!qnolinkcmds: -T linkcmds%s}}
*startfile:
%{!qrtems: %(old_startfile)} %{qrtems: \
%{!qrtems_debug: start.o%s} \
%{qrtems_debug: start_g.o%s}}
*link:
%{!qrtems: %(old_link)} %{qrtems: -dc -dp -N -e start}

32
c/src/lib/libbsp/c4x/c4xsim/clock/Makefile.am Normal file
View File

@@ -0,0 +1,32 @@
##
## $Id$
##
AUTOMAKE_OPTIONS = foreign 1.4
PGM = $(ARCH)/clock.rel
C_FILES = clock.c
C_O_FILES = $(C_FILES:%.c=$(ARCH)/%.o)
OBJS = $(C_O_FILES)
include $(RTEMS_ROOT)/make/custom/@RTEMS_BSP@.cfg
include $(top_srcdir)/../../../../../../automake/lib.am
#
# (OPTIONAL) Add local stuff here using +=
#
$(PGM): $(OBJS)
$(make-rel)
# the .rel file built here will be put into libbsp.a by ../wrapup/Makefile
all-local: $(ARCH) $(OBJS) $(PGM)
.PRECIOUS: $(PGM)
EXTRA_DIST = ckinit.c
include $(top_srcdir)/../../../../../../automake/local.am

225
c/src/lib/libbsp/c4x/c4xsim/clock/clock.c Normal file
View File

@@ -0,0 +1,225 @@
/* ckinit.c
*
* This file provides a template for the clock device driver initialization.
*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#include <stdlib.h>
#include <rtems.h>
#include <rtems/libio.h>
#include <bsp.h>
#include <c4xio.h>
void Clock_exit( void );
rtems_isr Clock_isr( rtems_vector_number vector );
rtems_unsigned32 Clock_counter_register_value;
/*
* The interrupt vector number associated with the clock tick device
* driver.
*/
#define CLOCK_VECTOR 9
/*
* Clock_driver_ticks is a monotonically increasing counter of the
* number of clock ticks since the driver was initialized.
*/
volatile rtems_unsigned32 Clock_driver_ticks;
/*
* These are set by clock driver during its init
*/
rtems_device_major_number rtems_clock_major = ~0;
rtems_device_minor_number rtems_clock_minor;
/*
* The previous ISR on this clock tick interrupt vector.
*/
rtems_isr_entry Old_ticker;
void Clock_exit( void );
/*
* Isr Handler
*/
#define FAST_IDLE 1
#if FAST_IDLE
int Clock_in_fast_idle_mode = 0;
#endif
rtems_isr Clock_isr(
rtems_vector_number vector
)
{
/*
* The counter register gets reset automatically as well as the
* interrupt occurred flag so we should not have to do anything
* with the hardware.
*/
/*
* Bump the number of clock driver ticks since initialization
*/
Clock_driver_ticks += 1;
rtems_clock_tick();
#if FAST_IDLE
if ( Clock_in_fast_idle_mode ) {
if ( _Thread_Executing == _Thread_Idle && _Thread_Heir != _Thread_Idle ) {
c4x_timer_stop( C4X_TIMER_0 );
c4x_timer_set_counter( C4X_TIMER_0, 0 );
c4x_timer_set_period( C4X_TIMER_0, Clock_counter_register_value );
c4x_timer_start( C4X_TIMER_0 );
Clock_in_fast_idle_mode = 0;
}
} else {
if ( _Thread_Executing == _Thread_Idle && _Thread_Heir == _Thread_Idle ) {
c4x_timer_stop( C4X_TIMER_0 );
c4x_timer_set_counter( C4X_TIMER_0, 0 );
c4x_timer_set_period( C4X_TIMER_0, Clock_counter_register_value >> 5 );
c4x_timer_start( C4X_TIMER_0 );
}
}
#endif
}
/*
* Install_clock
*
* Install a clock tick handler and reprograms the chip. This
* is used to initially establish the clock tick.
*/
void Install_clock(
rtems_isr_entry clock_isr
)
{
extern int _ClockFrequency;
float tmp;
int tmpi;
/*
* Initialize the clock tick device driver variables
*/
Clock_driver_ticks = 0;
tmpi = ((int) &_ClockFrequency) * 1000000; /* ClockFrequency is in Mhz */
tmp = (float) tmpi / 2.0;
tmp = ((float) BSP_Configuration.microseconds_per_tick / 1000000.0) * (tmp);
Clock_counter_register_value = (unsigned int) tmp;
#if 0
Clock_counter_register_value =
(unsigned32) ((float) BSP_Configuration.microseconds_per_tick /
((float)_ClockFrequency / 2.0)));
#endif
c4x_timer_stop( C4X_TIMER_0 );
c4x_timer_set_counter( C4X_TIMER_0, 0 );
c4x_timer_set_period( C4X_TIMER_0, Clock_counter_register_value );
c4x_timer_start( C4X_TIMER_0 );
c3x_set_ie( c3x_get_ie() | 0x100 );
/*
* If ticks_per_timeslice is configured as non-zero, then the user
* wants a clock tick.
*/
Old_ticker = (rtems_isr_entry) set_vector( clock_isr, CLOCK_VECTOR, 1 );
/*
* Hardware specific initialize goes here
*/
/* XXX */
/*
* Schedule the clock cleanup routine to execute if the application exits.
*/
atexit( Clock_exit );
}
/*
* Clean up before the application exits
*/
void Clock_exit( void )
{
/* XXX: turn off the timer interrupts */
/* XXX: If necessary, restore the old vector */
}
/*
* Clock_initialize
*
* Device driver entry point for clock tick driver initialization.
*/
rtems_device_driver Clock_initialize(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *pargp
)
{
Install_clock( Clock_isr );
/*
* make major/minor avail to others such as shared memory driver
*/
rtems_clock_major = major;
rtems_clock_minor = minor;
return RTEMS_SUCCESSFUL;
}
rtems_device_driver Clock_control(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *pargp
)
{
rtems_unsigned32 isrlevel;
rtems_libio_ioctl_args_t *args = pargp;
if (args == 0)
goto done;
/*
* This is hokey, but until we get a defined interface
* to do this, it will just be this simple...
*/
if (args->command == rtems_build_name('I', 'S', 'R', ' '))
{
Clock_isr(CLOCK_VECTOR);
}
else if (args->command == rtems_build_name('N', 'E', 'W', ' '))
{
rtems_interrupt_disable( isrlevel );
(void) set_vector( args->buffer, CLOCK_VECTOR, 1 );
rtems_interrupt_enable( isrlevel );
}
done:
return RTEMS_SUCCESSFUL;
}

35
c/src/lib/libbsp/c4x/c4xsim/configure.in Normal file
View File

@@ -0,0 +1,35 @@
dnl Process this file with autoconf to produce a configure script.
dnl
dnl $Id$
AC_PREREQ(2.13)
AC_INIT(bsp_specs)
RTEMS_TOP(../../../../../..)
AC_CONFIG_AUX_DIR(../../../../../..)
RTEMS_CANONICAL_TARGET_CPU
AM_INIT_AUTOMAKE(rtems-c-src-lib-libbsp-sparc-erc32,$RTEMS_VERSION,no)
AM_MAINTAINER_MODE
RTEMS_PROG_CC_FOR_TARGET
RTEMS_CANONICALIZE_TOOLS
RTEMS_ENV_RTEMSBSP
RTEMS_CHECK_CUSTOM_BSP(RTEMS_BSP)
RTEMS_CHECK_BSP_CACHE(RTEMS_BSP)
RTEMS_CANONICAL_HOST
AC_CONFIG_SUBDIRS(tools)
RTEMS_PROJECT_ROOT
# Explicitly list all Makefiles here
AC_OUTPUT(
Makefile
clock/Makefile
console/Makefile
include/Makefile
start/Makefile
startup/Makefile
timer/Makefile
wrapup/Makefile)

34
c/src/lib/libbsp/c4x/c4xsim/console/Makefile.am Normal file
View File

@@ -0,0 +1,34 @@
##
## $Id$
##
AUTOMAKE_OPTIONS = foreign 1.4
PGM = $(ARCH)/console.rel
VPATH = @srcdir@:@srcdir@/../../../shared
C_FILES = console.c consolereserveresources.c debugio.c simio.c printk.c
C_O_FILES = $(C_FILES:%.c=$(ARCH)/%.o)
OBJS = $(C_O_FILES)
include $(RTEMS_ROOT)/make/custom/@RTEMS_BSP@.cfg
include $(top_srcdir)/../../../../../../automake/lib.am
#
# (OPTIONAL) Add local stuff here using +=
#
$(PGM): $(OBJS)
$(make-rel)
# the .rel file built here will be put into libbsp.a by ../wrapup/Makefile
all-local: $(ARCH) $(OBJS) $(PGM)
.PRECIOUS: $(PGM)
EXTRA_DIST = console.c consolereserveresources.c debugputs.c
include $(top_srcdir)/../../../../../../automake/local.am

155
c/src/lib/libbsp/c4x/c4xsim/console/console.c Normal file
View File

@@ -0,0 +1,155 @@
/*
* This file contains the hardware specific portions of the TTY driver
* for the serial ports on the erc32.
*
* COPYRIGHT (c) 1989-1997.
* On-Line Applications Research Corporation (OAR).
* Copyright assigned to U.S. Government, 1994.
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#include <bsp.h>
#include <rtems/libio.h>
#include <stdlib.h>
#include <assert.h>
#include <simio.h>
/*
* console_outbyte_polled
*
* This routine transmits a character using polling.
*/
void console_outbyte_polled(
int port,
char ch
);
/*
* console_inbyte_nonblocking
*
* This routine polls for a character.
*/
int console_inbyte_nonblocking(
int port
);
/*
* Console Termios Support Entry Points
*
*/
int console_write_support (
int minor,
const char *bufarg,
int len
)
{
int nwrite = 0;
const char *buf = bufarg;
while (nwrite < len) {
if ( *buf )
console_outbyte_polled( minor, *buf & 0x7f );
buf++;
nwrite++;
}
return nwrite;
}
/*
* Console Device Driver Entry Points
*
*/
rtems_device_driver console_initialize(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
)
{
rtems_status_code status;
rtems_termios_initialize();
/*
* Register Device Names
*/
status = rtems_io_register_name( "/dev/console", major, 0 );
if (status != RTEMS_SUCCESSFUL)
rtems_fatal_error_occurred(status);
return RTEMS_SUCCESSFUL;
}
rtems_device_driver console_open(
rtems_device_major_number major,
rtems_device_minor_number minor,
void * arg
)
{
rtems_status_code sc;
static const rtems_termios_callbacks pollCallbacks = {
NULL, /* firstOpen */
NULL, /* lastClose */
console_inbyte_nonblocking, /* pollRead */
console_write_support, /* write */
NULL, /* setAttributes */
NULL, /* stopRemoteTx */
NULL, /* startRemoteTx */
0 /* outputUsesInterrupts */
};
assert( minor <= 1 );
if ( minor > 2 )
return RTEMS_INVALID_NUMBER;
sc = rtems_termios_open (major, minor, arg, &pollCallbacks );
return RTEMS_SUCCESSFUL;
}
rtems_device_driver console_close(
rtems_device_major_number major,
rtems_device_minor_number minor,
void * arg
)
{
return rtems_termios_close (arg);
}
rtems_device_driver console_read(
rtems_device_major_number major,
rtems_device_minor_number minor,
void * arg
)
{
return rtems_termios_read (arg);
}
rtems_device_driver console_write(
rtems_device_major_number major,
rtems_device_minor_number minor,
void * arg
)
{
return rtems_termios_write (arg);
}
rtems_device_driver console_control(
rtems_device_major_number major,
rtems_device_minor_number minor,
void * arg
)
{
return rtems_termios_ioctl (arg);
}

26
c/src/lib/libbsp/c4x/c4xsim/console/consolereserveresources.c Normal file
View File

@@ -0,0 +1,26 @@
/*
* This file contains the TTY driver for the serial ports on the erc32.
*
* This driver uses the termios pseudo driver.
*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#include <bsp.h>
#include <rtems/libio.h>
#include <stdlib.h>
#include <assert.h>
void console_reserve_resources(
rtems_configuration_table *configuration
)
{
rtems_termios_reserve_resources( configuration, 2 );
}

57
c/src/lib/libbsp/c4x/c4xsim/console/debugio.c Normal file
View File

@@ -0,0 +1,57 @@
/*
* This file contains the TTY driver for the serial ports on the erc32.
*
* This driver uses the termios pseudo driver.
*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#include <bsp.h>
#include <rtems/libio.h>
#include <stdlib.h>
#include <assert.h>
#include <simio.h>
/*
* console_outbyte_polled
*
* This routine transmits a character using polling.
*/
void console_outbyte_polled(
int port,
char ch
)
{
char out[2];
out[0] = ch;
out[1] = 0;
sim_write(1, out, 1);
}
C4X_BSP_output_char( int c )
{
console_outbyte_polled( 0, (char) c );
}
/*
* console_inbyte_nonblocking
*
* This routine polls for a character.
*/
int console_inbyte_nonblocking( int port )
{
char c;
sim_read(1, &c, 1);
return c;
}

308
c/src/lib/libbsp/c4x/c4xsim/console/simio.c Normal file
View File

@@ -0,0 +1,308 @@
/*
* C4x simulator IO interface routines based on code provided
* by Herman ten Brugge <Haj.Ten.Brugge@net.HCC.nl>
*
* $Id$
*/
#include <stdio.h>
#define SIM_OPEN (0xf0)
#define SIM_CLOSE (0xf1)
#define SIM_READ (0xf2)
#define SIM_WRITE (0xf3)
#define SIM_LSEEK (0xf4)
#define SIM_UNLINK (0xf5)
#define SIM_GETENV (0xf6)
#define SIM_RENAME (0xf7)
#define SIM_GETTIME (0xf8)
#define SIM_GETCLOCK (0xf9)
typedef union _io {
struct _open {
int fd : 16;
int flags : 16;
} open;
struct _openr {
int result : 16;
} openr;
struct _close {
int fd : 16;
} close;
struct _closer {
int result : 16;
} closer;
struct _read {
int fd : 16;
int count : 16;
} read;
struct _readr {
int result : 16;
} readr;
struct _write {
int fd : 16;
int count : 16;
} write;
struct _writer {
int result : 16;
} writer;
struct _lseek {
int fd : 16;
int offsetlow : 16;
int offsethigh : 16;
int orgin : 16;
} lseek;
struct _lseekr {
int result;
} lseekr;
struct _unlinkr {
int result : 16;
} unlinkr;
struct _renamer {
int result : 16;
} renamer;
struct _getenvr {
int result : 16;
} getenvr;
struct _gettimer {
int result;
} gettimer;
struct _getclockr {
int result;
} getclockr;
struct _common {
int word1;
int word2;
} common;
} io;
static void to_sim(int command, io *param, char *data, int length);
static void call_sim(void);
static void from_sim(io *param, char *data);
void sim_exit(void)
{
__asm__(" .global C$$EXIT");
__asm__("C$$EXIT: nop");
__asm__("nop");
}
int sim_open(const char *path, unsigned flags, int fno)
{
io param;
param.open.fd = fno;
param.open.flags = flags;
to_sim(SIM_OPEN,&param,(char *)path,strlen(path)+1);
call_sim();
from_sim(&param, NULL);
return param.openr.result;
}
int sim_close(int fno)
{
io param;
param.close.fd = fno;
to_sim(SIM_CLOSE,&param,NULL,0);
call_sim();
from_sim(&param, NULL);
return param.closer.result;
}
int sim_read(int fno, char *buf, unsigned count)
{
io param;
param.read.fd = fno;
param.read.count = count;
to_sim(SIM_READ,&param,NULL,0);
call_sim();
from_sim(&param, buf);
return param.readr.result;
}
int sim_write(int fno, const char *buf, unsigned count)
{
io param;
param.write.fd = fno;
param.write.count = count;
to_sim(SIM_WRITE,&param,(char *)buf,count);
call_sim();
from_sim(&param, NULL);
return param.writer.result;
}
fpos_t sim_lseek(int fno, fpos_t offset, int origin)
{
io param;
param.lseek.fd = fno;
param.lseek.offsetlow = offset & 0xffff;
param.lseek.offsethigh = offset >> 16;
to_sim(SIM_LSEEK,&param,NULL,0);
call_sim();
from_sim(&param, NULL);
return param.lseekr.result;
}
int sim_unlink(const char *path)
{
io param;
to_sim(SIM_UNLINK,NULL,(char *)path,strlen(path)+1);
call_sim();
from_sim(&param, NULL);
return param.unlinkr.result;
}
int sim_rename(const char *old, const char *new)
{
int l;
static char combined[200];
io param;
strcpy(combined,old);
l = strlen(old)+1;
strcpy(combined+l,new);
l += strlen(new) + 1;
to_sim(SIM_RENAME,NULL,combined,l);
call_sim();
from_sim(&param, NULL);
return param.renamer.result;
}
char *sim_getenv(const char *str)
{
io param;
static char result[200];
to_sim(SIM_GETENV,NULL,(char *)str,strlen(str)+1);
call_sim();
from_sim(&param, result);
return param.getenvr.result ? result : NULL;
}
int sim_gettime(void)
{
io param;
to_sim(SIM_GETTIME,NULL,NULL,0);
call_sim();
from_sim(&param, NULL);
return param.gettimer.result;
}
int sim_getclock(void)
{
io param;
to_sim(SIM_GETCLOCK,NULL,NULL,0);
call_sim();
from_sim(&param, NULL);
return param.getclockr.result;
}
int _CIOBUF_[BUFSIZ+32];
static void to_sim(int command, io *param, char *data, int length)
{
int i;
int n;
int v;
int *ip = &_CIOBUF_[0];
*ip++ = length;
*ip++ = command;
if (param) {
*ip++ = param->common.word1;
*ip++ = param->common.word2;
}
else {
*ip++ = 0;
*ip++ = 0;
}
n = length & ~3;
for (i = 0 ; i < n ; i += 4) {
v = *data++ & 0xff;
v |= (*data++ & 0xff) << 8;
v |= (*data++ & 0xff) << 16;
v |= (*data++ & 0xff) << 24;
*ip++ = v;
}
v = 0;
for ( ; i < length ; i++) {
v |= (*data++ & 0xff) << ((i & 3) << 3);
}
*ip = v;
}
static void call_sim(void)
{
__asm__(" .global C$$IO$$");
__asm__("C$$IO$$: nop");
}
static void from_sim(io *param, char *data)
{
int i;
int l;
int n;
int v;
int *ip = &_CIOBUF_[0];
l = *ip++;
param->common.word1 = *ip++;
param->common.word2 = *ip++;
if (data != NULL) {
n = l & ~3;
for (i = 0 ; i < n ; i += 4) {
v = *ip++;
*data++ = v & 0xff;
*data++ = (v >> 8) & 0xff;
*data++ = (v >> 16) & 0xff;
*data++ = (v >> 24) & 0xff;
}
v = *ip;
for (; i < l ; i++) {
*data++ = v >> ((i & 3) << 3);
}
}
}
#if 0
#include <fcntl.h>
sim_io_test()
{
sim_write(1, "howdy\n", 6);
}
#endif
/*
* Debug junk
*/
#if 0
void printk_wrapper(void)
{
__asm__(" .global _printf");
__asm__("_printf: bu _printk");
}
#endif
#if 1
#ifdef _HAVE_STDC
#include <stdarg.h>
#else
#include <varargs.h>
#endif
int __svfscanf(
register FILE *fp,
char const *fmt0,
va_list ap
)
{
return 0;
}
#endif

32
c/src/lib/libbsp/c4x/c4xsim/include/Makefile.am Normal file
View File

@@ -0,0 +1,32 @@
##
## $Id$
##
AUTOMAKE_OPTIONS = foreign 1.4
H_FILES = bsp.h simio.h
$(PROJECT_INCLUDE):
$(mkinstalldirs) $@
$(PROJECT_INCLUDE)/%.h: %.h
$(INSTALL_DATA) $< $@
$(PROJECT_INCLUDE)/bspIo.h: $(top_srcdir)/../../shared/include/bspIo.h
$(INSTALL_DATA) $< $@
$(PROJECT_INCLUDE)/coverhd.h: $(top_srcdir)/../../shared/include/coverhd.h
$(INSTALL_DATA) $< $@
PREINSTALL_FILES += $(PROJECT_INCLUDE) $(H_FILES:%.h=$(PROJECT_INCLUDE)/%.h) \
$(PROJECT_INCLUDE)/bspIo.h $(PROJECT_INCLUDE)/coverhd.h
all-local: $(PREINSTALL_FILES)
EXTRA_DIST = bsp.h
include $(top_srcdir)/../../../../../../automake/local.am
H_FILES = $(srcdir)/../../../shared/include/coverhd.h \
$(srcdir)/bsp.h $(srcdir)/simio.h $(srcdir)/../../../shared/include/bspIo.h

118
c/src/lib/libbsp/c4x/c4xsim/include/bsp.h Normal file
View File

@@ -0,0 +1,118 @@
/* bsp.h
*
* This include file contains all C4X Simulator IO definitions.
*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#ifndef __C4XSIM_h
#define __C4XSIM_h
#ifdef __cplusplus
extern "C" {
#endif
#ifdef ASM
#else
#include <rtems.h>
#include <console.h>
#include <clockdrv.h>
#include <console.h>
#include <iosupp.h>
/*
* Define the time limits for RTEMS Test Suite test durations.
* Long test and short test duration limits are provided. These
* values are in seconds and need to be converted to ticks for the
* application.
*
*/
#define MAX_LONG_TEST_DURATION 300 /* 5 minutes = 300 seconds */
#define MAX_SHORT_TEST_DURATION 3 /* 3 seconds */
/*
* Stuff for Time Test 27
*/
#include <c4xio.h>
#define MUST_WAIT_FOR_INTERRUPT 0
/* XXX */
#define Install_tm27_vector( _handler ) \
set_vector( (_handler), 0x20, 1 )
#define Cause_tm27_intr() \
do { \
__asm__ volatile ( "trapu 0" ); \
} while (0)
#define Clear_tm27_intr() \
do { \
; \
} while (0)
#define Lower_tm27_intr() \
do { \
c4x_global_interrupts_enable(); \
} while (0)
/* Constants */
/*
* Device Driver Table Entries
*/
/*
* NOTE: Use the standard Console driver entry
*/
/*
* NOTE: Use the standard Clock driver entry
*/
/*
* Information placed in the linkcmds file.
*/
/* functions */
void bsp_start( void );
void bsp_cleanup( void );
rtems_isr_entry set_vector( /* returns old vector */
rtems_isr_entry handler, /* isr routine */
rtems_vector_number vector, /* vector number */
int type /* RTEMS or RAW intr */
);
void BSP_fatal_return( void );
void bsp_spurious_initialize( void );
extern rtems_configuration_table BSP_Configuration; /* owned by BSP */
extern rtems_cpu_table Cpu_table; /* owned by BSP */
extern rtems_unsigned32 bsp_isr_level;
#endif /* ASM */
#ifdef __cplusplus
}
#endif
#endif
/* end of include file */

25
c/src/lib/libbsp/c4x/c4xsim/include/simio.h Normal file
View File

@@ -0,0 +1,25 @@
/*
* C4x simulator IO interface routines based on code provided
* by Herman ten Brugge <Haj.Ten.Brugge@net.HCC.nl>
*
* $Id$
*/
#ifndef __C4X_SIMIO_IFACE_h
#define __C4X_SIMIO_IFACE_h
#include <stdio.h>
void sim_exit(void);
int sim_open(const char *path, int flags, int fno);
int sim_close(int fno);
int sim_read(int fno, char *buf, unsigned count);
int sim_write(int fno, const char *buf, unsigned count);
fpos_t sim_lseek(int fno, fpos_t offset, int origin);
int sim_unlink(const char *path);
int sim_rename(const char *old, const char *new);
char *sim_getenv(const char *str);
int sim_gettime(void);
int sim_getclock(void);
#endif

32
c/src/lib/libbsp/c4x/c4xsim/start/Makefile.am Normal file
View File

@@ -0,0 +1,32 @@
##
## $Id$
##
AUTOMAKE_OPTIONS = foreign 1.4
PGM = $(ARCH)/start.o
S_FILES = start.S
S_O_FILES = $(S_FILES:%.S=$(ARCH)/%.o)
OBJS = $(S_O_FILES)
include $(RTEMS_ROOT)/make/custom/@RTEMS_BSP@.cfg
include $(top_srcdir)/../../../../../../automake/lib.am
#
# (OPTIONAL) Add local stuff here using +=
#
$(PROJECT_RELEASE)/lib/start$(LIB_VARIANT).o: $(PGM)
$(INSTALL_DATA) $< $@
TMPINSTALL_FILES += $(PROJECT_RELEASE)/lib/start$(LIB_VARIANT).o
all-local: $(ARCH) $(OBJS) $(PGM) $(TMPINSTALL_FILES)
.PRECIOUS: $(PGM)
EXTRA_DIST = start.S
include $(top_srcdir)/../../../../../../automake/local.am

71
c/src/lib/libbsp/c4x/c4xsim/start/start.S Normal file
View File

@@ -0,0 +1,71 @@
/*
* This start.S is a combination of the files boot.s and crt0.s
* provided by Herman ...XXX
*/
; .file "crt0.s"
.ref _c_int00
.global start
.global _start
.if .tms320C40
.sect ".const"
mem_control:
.word 000100000h
mem_data:
.word 03ef78050h
.text
start:
_start:
ldi 0800h,st
ldp @mem_control
ldi @mem_control,ar0
ldp @mem_data
ldi @mem_data,r0
sti r0,*+ar0(0)
sti r0,*+ar0(4)
br _c_int00
.else
.sect ".const"
mem_control:
.word 000808000h
mem_data:
.word 000001f00h
.text
start:
_start:
ldi 0800h,st
ldp @mem_control
ldi @mem_control,ar0
ldp @mem_data
ldi @mem_data,r0
sti r0,*+ar0(0)
sti r0,*+ar0(4)
br _c_int00
.endif
; .file "boot.s"
.global __stack
.global _c_int00
.ref .bss
.ref _boot_card
.ref _exit
__stack: .usect ".stack",0
.text
stack_addr: .word __stack
_c_int00:
ldp stack_addr
ldi @stack_addr,sp
ldi sp,ar3
ldp .bss ; For the small model, set up the DP to .bss
ldi 0,ar2 ; make sure argc=0 with regparm
push ar2 ; and memparm
call _boot_card
call _sim_exit

43
c/src/lib/libbsp/c4x/c4xsim/startup/Makefile.am Normal file
View File

@@ -0,0 +1,43 @@
##
## $Id$
##
AUTOMAKE_OPTIONS = foreign 1.4
VPATH = @srcdir@:@srcdir@/../../shared:@srcdir@/../../../shared
PGM = $(ARCH)/startup.rel
C_FILES = bspclean.c bsplibc.c bsppost.c bspstart.c main.c bootcard.c sbrk.c \
setvec.c c3xspurious.c c4xspurious.c bspspuriousinit.c spurious.c \
gnatinstallhandler.c
C_O_FILES = $(C_FILES:%.c=$(ARCH)/%.o)
OBJS = $(C_O_FILES)
include $(RTEMS_ROOT)/make/custom/@RTEMS_BSP@.cfg
include $(top_srcdir)/../../../../../../automake/lib.am
#
# (OPTIONAL) Add local stuff here using +=
#
# USE_INIT_FINI tells main.c what C++ help we need.
# AM_CPPFLAGS += -DUSE_INIT_FINI
$(PGM): $(OBJS)
$(make-rel)
$(PROJECT_RELEASE)/lib/linkcmds: linkcmds
$(INSTALL_DATA) $< $@
TMPINSTALL_FILES += $(PROJECT_RELEASE)/lib/linkcmds
all-local: $(ARCH) $(OBJS) $(PGM) $(TMPINSTALL_FILES)
.PRECIOUS: $(PGM)
EXTRA_DIST = bspclean.c bspstart.c linkcmds setvec.c spurious.c
include $(top_srcdir)/../../../../../../automake/local.am

124
c/src/lib/libbsp/c4x/c4xsim/startup/bspstart.c Normal file
View File

@@ -0,0 +1,124 @@
/*
* This set of routines starts the application. It includes application,
* board, and monitor specific initialization and configuration.
* The generic CPU dependent initialization has been performed
* before any of these are invoked.
*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#include <bsp.h>
#include <rtems/libio.h>
#include <libcsupport.h>
#include <string.h>
/*
* The original table from the application and our copy of it with
* some changes.
*/
extern rtems_configuration_table Configuration;
rtems_configuration_table BSP_Configuration;
rtems_cpu_table Cpu_table;
/*
* Use the shared implementations of the following routines
*/
void bsp_postdriver_hook(void);
void bsp_libc_init( void *, unsigned32, int );
extern void bsp_spurious_initialize();
/*
* bsp_pretasking_hook
*
* BSP pretasking hook. Called just before drivers are initialized.
* Used to setup libc and install any BSP extensions.
*/
void bsp_pretasking_hook(void)
{
extern void *_HeapStart;
extern rtems_unsigned32 _HeapSize;
bsp_libc_init(&_HeapStart, (unsigned int) &_HeapSize, 0);
#ifdef RTEMS_DEBUG
rtems_debug_enable( RTEMS_DEBUG_ALL_MASK );
#endif
bsp_spurious_initialize();
}
/*
* bsp_start
*
* This routine does the bulk of the system initialization.
*/
#include <bspIo.h>
BSP_output_char_function_type BSP_output_char;
BSP_polling_getchar_function_type BSP_poll_char;
extern void C4X_BSP_output_char(char c);
void bsp_start( void )
{
extern void *_WorkspaceBase;
extern rtems_unsigned32 _WorkspaceMax;
/*
* Set up our hooks
* Make sure libc_init is done before drivers initialized so that
* they can use atexit()
*/
Cpu_table.pretasking_hook = bsp_pretasking_hook; /* init libc, etc. */
Cpu_table.postdriver_hook = bsp_postdriver_hook;
/*
* SIS does zero out memory BUT only when IT begins execution. Thus
* if we want to have a clean slate in the workspace each time we
* begin execution of OUR application, then we must zero the workspace.
*/
Cpu_table.do_zero_of_workspace = FALSE;
/*
* This should be enough interrupt stack.
*/
Cpu_table.interrupt_stack_size = 0;
BSP_Configuration.work_space_start = (void *)&_WorkspaceBase;
/* XXX check to see if satisfying small memory model */
if ( BSP_Configuration.work_space_size > (int) &_WorkspaceMax )
rtems_fatal_error_occurred( 0x43218765 );
/*
* Account for the console's resources
*/
console_reserve_resources( &BSP_Configuration );
/*
* Add 1 extension for MPCI_fatal
*/
if (BSP_Configuration.User_multiprocessing_table)
BSP_Configuration.maximum_extensions++;
BSP_output_char = C4X_BSP_output_char;
BSP_poll_char = (BSP_polling_getchar_function_type) NULL;
}

76
c/src/lib/libbsp/c4x/c4xsim/startup/linkcmds Normal file
View File

@@ -0,0 +1,76 @@
OUTPUT_FORMAT("coff-c4x")
__SYSMEM_SIZE = DEFINED(__SYSMEM_SIZE) ? __SYSMEM_SIZE : 0x4000;
__STACK_SIZE = DEFINED(__STACK_SIZE) ? __STACK_SIZE : 0x1000;
__HeapSize = DEFINED(__HeapSize) ? __HeapSize : 0x10000;
__WorkspaceMax = DEFINED(__WorkspaceMax) ? __WorkspaceMax : 256K;
__ClockFrequency = DEFINED(_ClockFrequency) ? _ClockFrequency : 50;
ENTRY(_start)
SECTIONS
{
.vectors : {
. += 4 * 64;
}
.text 0x200 : {
*(.text)
___CTOR_LIST__ = .;
LONG(___CTOR_END__ - ___CTOR_LIST__ - 2)
*(.ctors)
LONG(0);
___CTOR_END__ = .;
___DTOR_LIST__ = .;
LONG(___DTOR_END__ - ___DTOR_LIST__ - 2)
*(.dtors)
LONG(0)
___DTOR_END__ = .;
}
.init : { *(.init) }
.fini : { *(.fini) }
.const :
{
*(.const)
}
.cinit :
{
*(.cinit)
}
.data :
{
*(.data)
}
.comms : {
*(.comms)
}
.bss : {
.bss = .;
*(.bss)
*(COMMON)
}
.stack :
{
*(.stack)
. = . + __STACK_SIZE;
}
.heap :
{
__HeapStart = .;
. += __HeapSize;
__WorkspaceBase = .;
. += __WorkspaceMax;
}
/*
.sysmem :
{
*(.sysmem)
}
*/
.stab 0 :
{
[ .stab ]
}
.stabstr 0 :
{
[ .stabstr ]
}
/* The TI tools sets cinit to -1 if the ram model is used. */
}

33
c/src/lib/libbsp/c4x/c4xsim/startup/spurious.c Normal file
View File

@@ -0,0 +1,33 @@
/*
* CXX Simulator Spurious Trap Handler Assistant
*
* This is just enough of a trap handler to let us know what
* the likely source of the trap was.
*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#include <bsp.h>
#include <bspIo.h>
#include <simio.h>
/*
* bsp_spurious_handler_assistant
*
* We can't recover so just return to gdb.
*/
void bsp_spurious_handler_assistant(
rtems_vector_number vector,
CPU_Interrupt_frame *isf
)
{
sim_exit();
}

32
c/src/lib/libbsp/c4x/c4xsim/timer/Makefile.am Normal file
View File

@@ -0,0 +1,32 @@
##
## $Id$
##
AUTOMAKE_OPTIONS = foreign 1.4
PGM = $(ARCH)/timer.rel
C_FILES = timer.c
C_O_FILES = $(C_FILES:%.c=$(ARCH)/%.o)
OBJS = $(C_O_FILES)
include $(RTEMS_ROOT)/make/custom/@RTEMS_BSP@.cfg
include $(top_srcdir)/../../../../../../automake/lib.am
#
# (OPTIONAL) Add local stuff here using +=
#
$(PGM): $(OBJS)
$(make-rel)
# the .rel file built here will be put into libbsp.a by ../wrapup/Makefile
all-local: $(ARCH) $(OBJS) $(PGM)
.PRECIOUS: $(PGM)
EXTRA_DIST = timer.c
include $(top_srcdir)/../../../../../../automake/local.am

117
c/src/lib/libbsp/c4x/c4xsim/timer/timer.c Normal file
View File

@@ -0,0 +1,117 @@
/* timer.c
*
* This file manages the benchmark timer used by the RTEMS Timing Test
* Suite. Each measured time period is demarcated by calls to
* Timer_initialize() and Read_timer(). Read_timer() usually returns
* the number of microseconds since Timer_initialize() exitted.
*
* NOTE: It is important that the timer start/stop overhead be
* determined when porting or modifying this code.
*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#include <rtems.h>
#include <bsp.h>
#include <c4xio.h>
rtems_unsigned32 Timer_interrupts;
rtems_boolean Timer_driver_Find_average_overhead;
static unsigned32 start;
void Timer_initialize( void )
{
/*
* Timer has never overflowed. This may not be necessary on some
* implemenations of timer but ....
*/
c4x_timer_stop(C4X_TIMER_0);
c4x_timer_set_period(C4X_TIMER_0, 0xffffffff); /* so no interupts */
c4x_timer_start(C4X_TIMER_0);
start = c4x_timer_get_counter(C4X_TIMER_0);
Timer_interrupts = 0;
/*
* Somehow start the timer
*/
}
/*
* The following controls the behavior of Read_timer().
*
* AVG_OVEREHAD is the overhead for starting and stopping the timer. It
* is usually deducted from the number returned.
*
* LEAST_VALID is the lowest number this routine should trust. Numbers
* below this are "noise" and zero is returned.
*/
#define AVG_OVERHEAD 0 /* It typically takes X.X microseconds */
/* (Y countdowns) to start/stop the timer. */
/* This value is in microseconds. */
#define LEAST_VALID 1 /* Don't trust a clicks value lower than this */
int Read_timer( void )
{
rtems_unsigned32 clicks;
rtems_unsigned32 total;
int tmp;
/*
* Read the timer and see how many clicks it has been since we started.
*/
clicks = c4x_timer_get_counter(C4X_TIMER_0);
clicks -= start;
/*
* Total is calculated by taking into account the number of timer overflow
* interrupts since the timer was initialized and clicks since the last
* interrupts.
*/
total = clicks * 1;
if ( Timer_driver_Find_average_overhead == 1 ) {
return total; /* in count units where each count is */
/* 1 / (clock frequency/2) */
} else {
if ( total < LEAST_VALID )
return 0; /* below timer resolution */
/*
* Somehow convert total into microseconds
*/
tmp = (int) ((float) total * ((1.0 / 25.0)));
return (tmp - AVG_OVERHEAD);
}
}
/*
* Empty function call used in loops to measure basic cost of looping
* in Timing Test Suite.
*/
rtems_status_code Empty_function( void )
{
return RTEMS_SUCCESSFUL;
}
void Set_find_average_overhead(
rtems_boolean find_flag
)
{
Timer_driver_Find_average_overhead = find_flag;
}

15
c/src/lib/libbsp/c4x/c4xsim/tools/Makefile.am Normal file
View File

@@ -0,0 +1,15 @@
##
## $Id$
##
AUTOMAKE_OPTIONS = foreign 1.4
ACLOCAL_AMFLAGS = -I $(RTEMS_TOPdir)/aclocal
noinst_SCRIPTS=runtest
#HACK: install to build-tree
all-local: $(SCRIPTS)
$(mkinstalldirs) $(PROJECT_ROOT)/$(RTEMS_BSP)/tests
$(INSTALL_SCRIPT) runtest $(PROJECT_ROOT)/$(RTEMS_BSP)/tests/runtest
include $(top_srcdir)/../../../../../../../automake/local.am

23
c/src/lib/libbsp/c4x/c4xsim/tools/configure.in Normal file
View File

@@ -0,0 +1,23 @@
dnl Process this file with autoconf to produce a configure script.
dnl
dnl $Id$
AC_INIT(runtest.in)
RTEMS_TOP(../../../../../../..)
AC_CONFIG_AUX_DIR(../../../../../../..)
RTEMS_CANONICAL_TARGET_CPU
AM_INIT_AUTOMAKE(rtems-c-src-lib-libbsp-c4x-c4xsim-tools,$RTEMS_VERSION,no)
AM_MAINTAINER_MODE
RTEMS_PATH_KSH
RTEMS_ENV_RTEMSBSP
RTEMS_PROJECT_ROOT
RTEMS_TOOLPATHS
# Explicitly list all Makefiles here
AC_OUTPUT(
Makefile
runtest)

331
c/src/lib/libbsp/c4x/c4xsim/tools/runtest.in Normal file
View File

@@ -0,0 +1,331 @@
#!@KSH@ -p
#
# $Id$
#
# Run rtems tests on the c4x simulator built into gdb
# This program generates a simulator script to run each test
# Typically the test is then run, although it can be generated
# and left as a file using -s
#
# progname=`basename $0`
progname=${0##*/} # fast basename hack for ksh, bash
USAGE=\
"usage: $progname [ -opts ] test [ test ... ]
-o options -- specify options to be passed to simulator
-v -- verbose
-s -- generate script file (as 'test'.ss) and exit
-l logdir -- specify log directory (default is 'logdir')
Specify test as 'test' or 'test.exe'.
All multiprocessing tests *must* be specified simply as 'mp01', etc.
"
# export everything
set -a
# log an error to stderr
prerr()
{
echo "$*" >&2
}
fatal() {
[ "$1" ] && prerr $*
prerr "$USAGE"
exit 1
}
warn() {
[ "$1" ] && prerr $*
}
# print args, 1 per line
ml_echo()
{
for l
do
echo "$l"
done
}
# run at normal and signalled exit
test_exit()
{
exit_code=$1
rm -f ${statfile}* ${scriptfile}* ${logfile}.tmp*
[ "$sim_pid" ] && kill -9 $sim_pid
exit $exit_code
}
#
# process the options
#
# defaults for getopt vars
#
# max_run_time is defaulted to 5 minutes
#
verbose=""
extra_options=""
script_and_exit=""
stdio_setup="yes"
run_to_completion="yes"
logdir=log
update_on_tick="no"
max_run_time=$((6 * 60)) # is 5 on other simulators.
using_print_buffer="yes"
while getopts vhr12o:c:sl:t OPT
do
case "$OPT" in
v)
verbose="yes";;
s)
script_and_exit="yes"
run_to_completion="no"
stdio_setup="no";;
l)
logdir="$OPTARG";;
o)
extra_options="$OPTARG";;
*)
fatal;;
esac
done
let $((shiftcount = $OPTIND - 1))
shift $shiftcount
args=$*
#
# Run the tests
#
tests="$args"
if [ ! "$tests" ]
then
set -- `echo *.exe`
tests="$*"
fi
[ -d $logdir ] ||
mkdir $logdir || fatal "could not create log directory ($logdir)"
cpus=1
# where the tmp files go
statfile=/tmp/stats$$
scriptfile=/tmp/script$$
trap "test_exit" 1 2 3 13 14 15
for tfile in $tests
do
tname=`basename $tfile .exe`
TEST_TYPE="single"
case $tname in
monitor)
if [ $run_to_completion = "yes" ]
then
warn "Skipping $tname; it is interactive"
continue
fi
;;
*-node2*)
fatal "MP tests not supported"
warn "Skipping $tname; 'runtest' runs both nodes when for *-node1"
continue;;
*-node1*)
fatal "MP tests not supported"
warn "Running both nodes associated with $tname"
tname=`echo $tname | sed 's/-node.*//'`
TEST_TYPE="mp"
;;
stackchk*|spfatal*|malloctest*|termio*)
warn "Skipping $tname; it locks up or takes a VERY long time to run"
continue
;;
esac
# Change the title bar to indicate which test we are running
# The simulator screen doesn't provide any indication
logfile=$logdir/$tname
infofile=$logfile.info
rm -f ${statfile}* ${scriptfile}* ${logfile}.tmp*
date=`date`
echo "Starting $tname at $date"
# Generate a script file to get the work done.
# The script file must do the following:
#
# load the program (programs if MP test)
# arrange for capture of output
# run the program
# produce statistics
{
case $TEST_TYPE in
"mp")
fatal "MP tests not supported"
;;
# All other tests (single-processor)
*)
echo "target sim -3"
echo "sim m r 0"
echo "sim m w 0"
echo "load"
echo ""
echo "printf \"START_OF_TEST\\n\""
echo "run"
echo "printf \"END_OF_TEST\\n\""
echo "quit"
;;
esac
} > ${scriptfile}
if [ "$script_and_exit" = "yes" ]
then
mv ${scriptfile} $tname.ss
warn "script left in $tname.ss"
test_exit 0
fi
# Spin off the simulator in the background
c4x-rtems-gdb $extra_options -n \
--command ${scriptfile} ${tfile} >${logfile}.tmp 2>&1 &
sim_pid=$!
# Make sure it won't run forever...
{
time_run=0
while [ $time_run -lt $max_run_time ]
do
# sleep 10s at a time waiting for job to finish or timer to expire
# if job has exited, then we exit, too.
sleep 10
if kill -0 $sim_pid 2>/dev/null
then
time_run=$((time_run + 10))
else
exit 0
fi
done
kill -2 $sim_pid 2>/dev/null
{ sleep 5; kill -9 $sim_pid 2>/dev/null; } &
} &
wait $sim_pid
status=$?
if [ $status -ne 0 ]
then
ran_too_long="yes"
else
ran_too_long="no"
fi
sim_pid=""
# fix up the printf output from the test
case $TEST_TYPE in
mp)
fatal "MP not supported"
;;
*)
output_it=0
clean_exit=0
sed -e '1,9d' \
-e 's/
//' -e '/^$/d' < ${logfile}.tmp |
while read line
do
if [ $output_it -eq 1 ] ; then
case $line in
END_OF_TEST*)
output_it=0
;;
*simio.c:86*)
output_it=0
clean_exit=1
;;
*)
echo "$line"
;;
esac
else
if [ "$line" = "START_OF_TEST" ] ; then
output_it=1
fi
fi
done > ${logfile}_1
if [ ${clean_exit} -eq 0 ] ; then
mv ${logfile}_1 ${logfile}_1.XXX
sed -e '/^Program received signal SIGTRAP/d' \
<${logfile}_1.XXX >${logfile}_1
rm -f ${logfile}_1.XXX
fi
;;
esac
# Create the info files
for cpu in $cpus
do
{
echo "$date"
echo "Test run on: `uname -n` ( `uname -a` )"
output_it=1
sed -e 's/
//' < ${logfile}.tmp |
while read line
do
if [ $output_it -eq 0 ] ; then
if [ "$line" = "END_OF_TEST" ] ; then
output_it=1
fi
else
if [ "$line" = "START_OF_TEST" ] ; then
output_it=0
else
echo "$line"
fi
fi
done
if [ "$ran_too_long" = "yes" ]
then
echo "Test did NOT finish normally; killed after $max_run_time seconds"
fi
echo
date;
} > ${infofile}_$cpu
done
rm -f ${logfile}.tmp*
if [ "$cpus" = "1" ]
then
mv ${infofile}_1 ${infofile}
mv ${logfile}_1 ${logfile}
fi
done
test_exit 0
# Local Variables: ***
# mode:ksh ***

35
c/src/lib/libbsp/c4x/c4xsim/wrapup/Makefile.am Normal file
View File

@@ -0,0 +1,35 @@
##
## $Id$
##
AUTOMAKE_OPTIONS = foreign 1.4
BSP_PIECES = startup console clock timer
# pieces to pick up out of libcpu/sparc
CPU_PIECES =
# bummer; have to use $foreach since % pattern subst rules only replace 1x
OBJS = $(foreach piece, $(BSP_PIECES), $(wildcard ../$(piece)/$(ARCH)/*.o)) \
$(foreach piece, $(CPU_PIECES), ../../../../libcpu/$(RTEMS_CPU)/$(piece)/$(ARCH)/$(piece).rel)
LIB = $(ARCH)/libbsp.a
include $(RTEMS_ROOT)/make/custom/@RTEMS_BSP@.cfg
include $(top_srcdir)/../../../../../../automake/lib.am
#
# (OPTIONAL) Add local stuff here using +=
#
$(LIB): $(OBJS)
$(make-library)
$(PROJECT_RELEASE)/lib/libbsp$(LIB_VARIANT).a: $(LIB)
$(INSTALL_DATA) $< $@
TMPINSTALL_FILES += $(PROJECT_RELEASE)/lib/libbsp$(LIB_VARIANT).a
all-local: $(ARCH) $(OBJS) $(LIB) $(TMPINSTALL_FILES)
.PRECIOUS: $(LIB)
include $(top_srcdir)/../../../../../../automake/local.am

25
c/src/lib/libbsp/c4x/configure.in Normal file
View File

@@ -0,0 +1,25 @@
dnl Process this file with autoconf to produce a configure script.
dnl
dnl $Id$
AC_PREREQ(2.13)
AC_INIT(c4xsim)
RTEMS_TOP(../../../../..)
AC_CONFIG_AUX_DIR(../../../../..)
RTEMS_CANONICAL_TARGET_CPU
AM_INIT_AUTOMAKE(rtems-c-src-lib-libbsp-c4x,$RTEMS_VERSION,no)
AM_MAINTAINER_MODE
RTEMS_ENV_RTEMSBSP
RTEMS_CHECK_CUSTOM_BSP(RTEMS_BSP)
RTEMS_CHECK_BSP_CACHE(RTEMS_BSP)
RTEMS_PROJECT_ROOT
RTEMS_BSP_ALIAS(${RTEMS_BSP},bspdir)
AC_CONFIG_SUBDIRS($bspdir)
# Explicitly list all Makefiles here
AC_OUTPUT(
Makefile
shared/Makefile)

11
c/src/lib/libbsp/c4x/shared/Makefile.am Normal file
View File

@@ -0,0 +1,11 @@
##
## $Id$
##
AUTOMAKE_OPTIONS = foreign 1.4
C_FILES = bspspuriousinit.c c3xspurious.c c4xspurious.c
EXTRA_DIST = bspspuriousinit.c c3xspurious.c c4xspurious.c
include $(top_srcdir)/../../../../../automake/local.am

45
c/src/lib/libbsp/c4x/shared/bspspuriousinit.c Normal file
View File

@@ -0,0 +1,45 @@
/*
* CXX Spurious Trap Handler Install Routine
*
* This is just enough of a trap handler to let us know what
* the likely source of the trap was.
*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#include <bsp.h>
#include <bspIo.h>
#include <simio.h>
/*
* bsp_spurious_initialize
*
* Install the spurious handler for most vectors.
*/
rtems_isr bsp_spurious_handler(
rtems_vector_number vector,
CPU_Interrupt_frame *isf
);
void bsp_spurious_initialize()
{
rtems_unsigned32 vector;
for ( vector=0 ; vector<64 ; vector++ ) {
/*
* Skip any vectors that might be generally used for traps.
*/
set_vector( bsp_spurious_handler, vector, 1 );
}
}

85
c/src/lib/libbsp/c4x/shared/c3xspurious.c Normal file
View File

@@ -0,0 +1,85 @@
/*
* C3X Spurious Trap Handler
*
* This is just enough of a trap handler to let us know what
* the likely source of the trap was.
*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#include <bsp.h>
#include <bspIo.h>
/*
* bsp_spurious_handler
*
* Print a message on the debug console and then die
*/
void bsp_spurious_handler_assistant(
rtems_vector_number,
CPU_Interrupt_frame *
);
#if defined(_C3x)
rtems_isr bsp_spurious_handler(
rtems_vector_number vector,
CPU_Interrupt_frame *isf
)
{
char *s;
printk( "Unexpected interrupt (0x%x)\n", vector );
printk( "It looks like we got the interrupt at 0x%x\n", isf->interrupted );
/*
* Can we print a name?
*/
s = 0;
if ( vector <= 0x1f ) {
switch ( vector ) {
#if defined(_C30) || defined(_C31)
case 0: s = "RESET"; break;
#endif
case 1: s = "INT0"; break;
case 2: s = "INT1"; break;
case 3: s = "INT2"; break;
case 4: s = "INT3"; break;
case 5: s = "XINT0"; break;
case 6: s = "RINT0"; break;
#if defined(_C30) || defined(_C31)
case 7: s = "XINT1"; break;
case 8: s = "RINT1"; break;
#endif
case 9: s = "TINT0"; break;
case 0x0a: s = "TINT1"; break;
case 0x0b: s = "DINT0"; break;
#if defined(_C32)
case 0x0c: s = "DINT1"; break;
#endif
default: s = "Reserved"; break;
}
printk( "Looks like it was an %s\n", s );
} else {
printk( "Looks like it was a TRAP%d\n", vector - 0x20 );
#if defined(_C30) || defined(_C31)
if ( vector > 0x3B )
printk( "But TRAP27 - TRAP31 are reserved\n" );
#endif
}
/*
* Now call the BSP specific routine
*/
bsp_spurious_handler_assistant( vector, isf );
}
#endif

79
c/src/lib/libbsp/c4x/shared/c4xspurious.c Normal file
View File

@@ -0,0 +1,79 @@
/*
* C4X Spurious Trap Handler
*
* This is just enough of a trap handler to let us know what
* the likely source of the trap was.
*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#include <bsp.h>
#include <bspIo.h>
/*
* bsp_spurious_handler
*
* Print a message on the debug console and then die
*/
void bsp_spurious_handler_assistant(
rtems_vector_number,
CPU_Interrupt_frame *
);
#if defined(_C4x)
rtems_isr bsp_spurious_handler(
rtems_vector_number vector,
CPU_Interrupt_frame *isf
)
{
char *s;
printk( "Unexpected interrupt (0x%x)\n", vector );
printk( "It looks like we got the interrupt at 0x%x\n", isf->interrupted );
/*
* Can we print a name?
*/
printk( "Looks like it was a " );
if ( vector >= 0x0d && vector <= 0x24 ) {
switch ( vector & 0x3 ) {
case 1: s = "ICFULL"; break;
case 2: s = "ICRDY"; break;
case 3: s = "OCRDY"; break;
case 0: s = "OCEMPTY"; break;
}
printk( "%s%d\n", s, (vector - 0x0d) / 4 );
} else if ( vector >= 0x25 && vector <= 0x2a ) {
printk( "DMA INT%d\n", (vector - 0x25) );
} else /* if ( vector <= 0x0c || vector >= 0x2b ) */ {
switch ( vector ) {
case 0: s = "RESET"; break;
case 1: s = "NMI"; break;
case 2: s = "TINT0"; break;
case 3: s = "IIOF0"; break;
case 4: s = "IIOF1"; break;
case 5: s = "IIOF2"; break;
case 6: s = "IIOF3"; break;
case 0x2b: s = "TINT1"; break;
case 0x3f: s = "Reserved"; break;
default: s = "Unused"; break;
}
printk( "%s\n", s );
}
/*
* Now call the BSP specific routine
*/
bsp_spurious_handler_assistant( vector, isf );
}
#endif

48
cpukit/score/cpu/c4x/Makefile.am Normal file
View File

@@ -0,0 +1,48 @@
##
## $Id$
##
AUTOMAKE_OPTIONS = foreign 1.4
ACLOCAL_AMFLAGS = -I $(RTEMS_TOPdir)/aclocal
SUBDIRS = rtems
C_FILES = cpu.c irq.c
C_O_FILES = $(C_FILES:%.c=$(ARCH)/%.o)
H_FILES = asm.h c4xio.h
S_FILES = cpu_asm.S
S_O_FILES = $(S_FILES:%.S=$(ARCH)/%.o)
REL = $(ARCH)/rtems-cpu.rel
include $(RTEMS_ROOT)/make/custom/@RTEMS_BSP@.cfg
include $(top_srcdir)/../../../../../../automake/lib.am
rtems_cpu_rel_OBJECTS = $(C_O_FILES) $(S_O_FILES)
$(PROJECT_INCLUDE):
$(mkinstalldirs) $@
$(PROJECT_INCLUDE)/%.h: %.h
$(INSTALL_DATA) $< $@
$(PROJECT_RELEASE)/lib/rtems$(LIB_VARIANT).o: $(ARCH)/rtems.o
$(INSTALL_DATA) $< $@
$(REL): $(rtems_cpu_rel_OBJECTS)
$(make-rel)
PREINSTALL_FILES += $(PROJECT_INCLUDE) $(H_FILES:%=$(PROJECT_INCLUDE)/%)
TMPINSTALL_FILES += $(PROJECT_RELEASE)/lib/rtems$(LIB_VARIANT).o
all-local: $(ARCH) $(PREINSTALL_FILES) $(rtems_cpu_rel_OBJECTS) $(REL) $(TMPINSTALL_FILES)
.PRECIOUS: $(REL)
EXTRA_DIST = asm.h cpu.c irq.c cpu_asm.S c4xio.h rtems.c
include $(top_srcdir)/../../../../../../automake/subdirs.am
include $(top_srcdir)/../../../../../../automake/local.am

101
cpukit/score/cpu/c4x/asm.h Normal file
View File

@@ -0,0 +1,101 @@
/* asm.h
*
* This include file attempts to address the problems
* caused by incompatible flavors of assemblers and
* toolsets. It primarily addresses variations in the
* use of leading underscores on symbols and the requirement
* that register names be preceded by a %.
*
*
* NOTE: The spacing in the use of these macros
* is critical to them working as advertised.
*
* COPYRIGHT:
*
* This file is based on similar code found in newlib available
* from ftp.cygnus.com. The file which was used had no copyright
* notice. This file is freely distributable as long as the source
* of the file is noted. This file is:
*
* COPYRIGHT (c) 1994-1997.
* On-Line Applications Research Corporation (OAR).
*
* $Id$
*/
#ifndef __C4X_ASM_h
#define __C4X_ASM_h
/*
* Indicate we are in an assembly file and get the basic CPU definitions.
*/
#ifndef ASM
#define ASM
#endif
#include <rtems/score/targopts.h>
#include <rtems/score/c4x.h>
/*
* Recent versions of GNU cpp define variables which indicate the
* need for underscores and percents. If not using GNU cpp or
* the version does not support this, then you will obviously
* have to define these as appropriate.
*/
#ifndef __USER_LABEL_PREFIX__
#define __USER_LABEL_PREFIX__ _
#endif
#ifndef __REGISTER_PREFIX__
#define __REGISTER_PREFIX__
#endif
/* ANSI concatenation macros. */
#define CONCAT1(a, b) CONCAT2(a, b)
#define CONCAT2(a, b) a ## b
/* Use the right prefix for global labels. */
#define SYM(x) CONCAT1 (__USER_LABEL_PREFIX__, x)
/* Use the right prefix for registers. */
#define REG(x) CONCAT1 (__REGISTER_PREFIX__, x)
/*
* define macros for all of the registers on this CPU
*
* EXAMPLE: #define d0 REG (d0)
*/
/*
* Define macros to handle section beginning and ends.
*/
#define BEGIN_CODE_DCL .text
#define END_CODE_DCL
#define BEGIN_DATA_DCL .data
#define END_DATA_DCL
#define BEGIN_CODE .text
#define END_CODE
#define BEGIN_DATA
#define END_DATA
#define BEGIN_BSS
#define END_BSS
#define END
/*
* Following must be tailor for a particular flavor of the C compiler.
* They may need to put underscores in front of the symbols.
*/
#define PUBLIC(sym) .globl SYM (sym)
#define EXTERN(sym) .globl SYM (sym)
#endif
/* end of include file */

52
cpukit/score/cpu/c4x/c4xio.h Normal file
View File

@@ -0,0 +1,52 @@
/*
* C4X IO Information
*
* $Id$
*/
#ifndef __C4XIO_h
#define __C4XIO_h
/*
* The following section of C4x timer code is based on C40 specific
* timer code from Ran Cabell <rcabell@norfolk.infi.net>. The
* only C3x/C4x difference spotted was the address of the timer.
* The names have been changed to be more RTEMS like.
*/
struct c4x_timer {
volatile int tcontrol;
volatile int r1[3];
volatile int tcounter;
volatile int r2[3];
volatile int tperiod;
};
#ifdef _TMS320C40
#define C4X_TIMER_0 ((struct c4x_timer*)0x100020)
#else
#define C4X_TIMER_0 ((struct c4x_timer*)0x808020)
#define C4X_TIMER_1 ((struct c4x_timer*)0x808030)
#endif
#define c4x_timer_start( _timer ) \
_timer->tcontrol=0x02c1
#define c4x_timer_stop( _timer ) _timer->tcontrol = 0
#define c4x_timer_get_counter( _timer ) (volatile int)(_timer->tcounter)
#define c4x_timer_set_counter( _timer, _value ) \
do { \
(volatile int)(_timer->tcounter) = _value; \
} while (0);
#define c4x_timer_get_period( _timer ) (volatile int)(_timer->tperiod)
#define c4x_timer_set_period( _timer, _value ) \
do { \
(volatile int)(_timer->tperiod) = _value; \
} while (0);
#endif
/* end if include file */

199
cpukit/score/cpu/c4x/cpu.c Normal file
View File

@@ -0,0 +1,199 @@
/*
* XXX CPU Dependent Source
*
*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#include <rtems/system.h>
#include <rtems/score/isr.h>
#include <rtems/score/wkspace.h>
/* _CPU_Initialize
*
* This routine performs processor dependent initialization.
*
* INPUT PARAMETERS:
* cpu_table - CPU table to initialize
* thread_dispatch - address of disptaching routine
*
* C4x Specific Information:
*
*/
void _CPU_Initialize(
rtems_cpu_table *cpu_table,
void (*thread_dispatch) /* ignored on this CPU */
)
{
#if 0
/*
* The thread_dispatch argument is the address of the entry point
* for the routine called at the end of an ISR once it has been
* decided a context switch is necessary. On some compilation
* systems it is difficult to call a high-level language routine
* from assembly. This allows us to trick these systems.
*
* If you encounter this problem save the entry point in a CPU
* dependent variable.
*/
_CPU_Thread_dispatch_pointer = thread_dispatch;
#endif
#if (CPU_HARDWARE_FP == TRUE)
/*
* If there is not an easy way to initialize the FP context
* during Context_Initialize, then it is usually easier to
* save an "uninitialized" FP context here and copy it to
* the task's during Context_Initialize.
*/
/* FP context initialization support goes here */
#endif
_CPU_Table = *cpu_table;
}
/*PAGE
*
* _CPU_ISR_install_raw_handler
*
* C4x Specific Information:
*
*/
void _CPU_ISR_install_raw_handler(
unsigned32 vector,
proc_ptr new_handler,
proc_ptr *old_handler
)
{
void **ittp;
/*
* This is where we install the interrupt handler into the "raw" interrupt
* table used by the CPU to dispatch interrupt handlers.
*/
ittp = c4x_get_ittp();
*old_handler = ittp[ vector ];
ittp[ vector ] = new_handler;
}
/*XXX */
#define C4X_CACHE 1
#define C4X_BASE_ST (C4X_CACHE==1) ? 0x4800 : 0x4000
void _CPU_Context_Initialize(
Context_Control *_the_context,
void *_stack_base,
unsigned32 _size,
unsigned32 _isr,
void (*_entry_point)(void),
int _is_fp
)
{
unsigned int *_stack;
_stack = (unsigned int *)_stack_base;
*_stack = (unsigned int) _entry_point;
_the_context->sp = (unsigned int) _stack;
_the_context->st = C4X_BASE_ST;
if ( _isr == 0 )
_the_context->st |= C4X_ST_GIE;
}
/*PAGE
*
* _CPU_ISR_install_vector
*
* This kernel routine installs the RTEMS handler for the
* specified vector.
*
* Input parameters:
* vector - interrupt vector number
* old_handler - former ISR for this vector number
* new_handler - replacement ISR for this vector number
*
* Output parameters: NONE
*
*
* C4x Specific Information:
*
*/
void _CPU_ISR_install_vector(
unsigned32 vector,
proc_ptr new_handler,
proc_ptr *old_handler
)
{
proc_ptr ignored;
extern void rtems_irq_prologue_0(void);
extern void rtems_irq_prologue_1(void);
void *entry;
*old_handler = _ISR_Vector_table[ vector ];
/*
* If the interrupt vector table is a table of pointer to isr entry
* points, then we need to install the appropriate RTEMS interrupt
* handler for this vector number.
*/
entry = (void *)rtems_irq_prologue_0 +
((rtems_irq_prologue_1 - rtems_irq_prologue_0) * vector);
_CPU_ISR_install_raw_handler( vector, entry, &ignored );
/*
* We put the actual user ISR address in '_ISR_vector_table'. This will
* be used by the _ISR_Handler so the user gets control.
*/
_ISR_Vector_table[ vector ] = new_handler;
}
/*PAGE
*
* _CPU_Thread_Idle_body
*
* NOTES:
*
* 1. This is the same as the regular CPU independent algorithm.
*
* 2. If you implement this using a "halt", "idle", or "shutdown"
* instruction, then don't forget to put it in an infinite loop.
*
* 3. Be warned. Some processors with onboard DMA have been known
* to stop the DMA if the CPU were put in IDLE mode. This might
* also be a problem with other on-chip peripherals. So use this
* hook with caution.
*
* C4x Specific Information:
*
*
*/
#if (CPU_PROVIDES_IDLE_THREAD_BODY == 1)
void _CPU_Thread_Idle_body( void )
{
for( ; ; ) {
__asm__( "idle" );
__asm__( "nop" );
__asm__( "nop" );
__asm__( "nop" );
/* insert your "halt" instruction here */ ;
}
}
#endif

770
cpukit/score/cpu/c4x/cpu_asm.S Normal file
View File

@@ -0,0 +1,770 @@
/* cpu_asm.c ===> cpu_asm.S or cpu_asm.s
*
* This file contains the basic algorithms for all assembly code used
* in an specific CPU port of RTEMS. These algorithms must be implemented
* in assembly language
*
* NOTE: This is supposed to be a .S or .s file NOT a C file.
*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#include <asm.h>
/*
* _CPU_Context_save_fp_context
*
* This routine is responsible for saving the FP context
* at *fp_context_ptr. If the point to load the FP context
* from is changed then the pointer is modified by this routine.
*
* Sometimes a macro implementation of this is in cpu.h which dereferences
* the ** and a similarly named routine in this file is passed something
* like a (Context_Control_fp *). The general rule on making this decision
* is to avoid writing assembly language.
*
* void _CPU_Context_save_fp(
* void **fp_context_ptr
*
* C4x Specific Information:
*
* There is no distiniction between FP and integer context in this port.
*/
/*
* _CPU_Context_restore_fp_context
*
* This routine is responsible for restoring the FP context
* at *fp_context_ptr. If the point to load the FP context
* from is changed then the pointer is modified by this routine.
*
* Sometimes a macro implementation of this is in cpu.h which dereferences
* the ** and a similarly named routine in this file is passed something
* like a (Context_Control_fp *). The general rule on making this decision
* is to avoid writing assembly language.
*
* void _CPU_Context_restore_fp(
* void **fp_context_ptr
* )
*
* C4x Specific Information:
*
* There is no distiniction between FP and integer context in this port.
*/
/* _CPU_Context_switch
*
* This routine performs a normal non-FP context switch.
*
* void _CPU_Context_switch(
* Context_Control *run,
* Context_Control *heir
* )
*
* TMS320C3x General-Purpose Applications User's Guide, section 2.4
* (p 2-11 and following), Context Switching in Interrupts and
* Subroutines states that "If the program is in a subroutine, it
* must preserve the dedicated C registers as follows:"
*
* Save as Integers Save as Floating-Point
* ================ ======================
* R4 R8 R6 R7
* AR4 AR5
* AR6 AR7
* FP DP (small model only)
* SP
*/
.global SYM(_CPU_Context_switch)
SYM(_CPU_Context_switch):
.if .REGPARM == 0
ldi sp, ar0
ldi *ar0, ar2 ; get the location of running context
.endif
sti st,*ar2++ ; store status word
sti ar3,*ar2++ ; store ar3
sti ar4,*ar2++ ; store ar4
sti ar5,*ar2++ ; store ar5
sti ar6,*ar2++ ; store ar6
sti ar7,*ar2++ ; store ar7
sti r4,*ar2++ ; store integer portion of r4
sti r5,*ar2++ ; store integer portion of r5
stf r6,*ar2++ ; store float portion of r6
stf r7,*ar2++ ; store float portion of r7
.if .TMS320C40
sti r8,*ar2++ ; store integer portion of r8
.endif
sti sp,*ar2++ ; store sp
; end of save
.if .REGPARM == 0
ldi *-ar0(2), ar2 ; get the location of heir context
.else
ldi r2,ar2
.endif
_local_restore:
ldi *ar2++,ar0 ; load status word into register
ldi *ar2++,ar3 ; load ar3
ldi *ar2++,ar4 ; load ar4
ldi *ar2++,ar5 ; load ar5
ldi *ar2++,ar6 ; load ar6
ldi *ar2++,ar7 ; load ar7
ldi *ar2++,r4 ; load integer portion of r4
ldi *ar2++,r5 ; load integer portion of r5
ldf *ar2++,r6 ; load float portion of r6
ldf *ar2++,r7 ; load float portion of r7
.if .TMS320C40
ldi *ar2++,r8 ; load integer portion of r8
.endif
ldi *ar2++,sp ; load sp
ldi ar0,st ; restore status word and interrupts
rets
/*
* _CPU_Context_restore
*
* This routine is generally used only to restart self in an
* efficient manner. It may simply be a label in _CPU_Context_switch.
*
* NOTE: May be unnecessary to reload some registers.
*
* void _CPU_Context_restore(
* Context_Control *new_context
* )
*/
.global SYM(_CPU_Context_restore)
SYM(_CPU_Context_restore):
.if .REGPARM == 0
ldi sp, ar0
ldi *ar0, ar2 ; get the location of context to restore
.endif
br _local_restore
/* void _ISR_Handler()
*
* This routine provides the RTEMS interrupt management.
*
* void _ISR_Handler()
*/
/*
* At entry to "common" _ISR_Handler, the vector number must be
* available. On some CPUs the hardware puts either the vector
* number or the offset into the vector table for this ISR in a
* known place. If the hardware does not give us this information,
* then the assembly portion of RTEMS for this port will contain
* a set of distinct interrupt entry points which somehow place
* the vector number in a known place (which is safe if another
* interrupt nests this one) and branches to _ISR_Handler.
*/
/*
* save some or all context on stack
* may need to save some special interrupt information for exit
*
* #if ( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE )
* if ( _ISR_Nest_level == 0 )
* switch to software interrupt stack
* #endif
*
* _ISR_Nest_level++;
*
* _Thread_Dispatch_disable_level++;
*
* (*_ISR_Vector_table[ vector ])( vector );
*
* --_ISR_Nest_level;
*
* if ( _ISR_Nest_level )
* goto the label "exit interrupt (simple case)"
*
* #if ( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE )
* restore stack
* #endif
*
* if ( !_Context_Switch_necessary )
* goto the label "exit interrupt (simple case)"
*
* if ( !_ISR_Signals_to_thread_executing )
* _ISR_Signals_to_thread_executing = FALSE;
* goto the label "exit interrupt (simple case)"
*
* call _Thread_Dispatch() or prepare to return to _ISR_Dispatch
*
* prepare to get out of interrupt
* return from interrupt (maybe to _ISR_Dispatch)
*
* LABEL "exit interrupt (simple case):
* prepare to get out of interrupt
* return from interrupt
*/
.global SYM(_ISR_Handler_save_registers)
SYM(_ISR_Handler_save_registers):
; no push st because it is already pushed
; no push ar2 because it is already pushed and vector number loaded
push ar0
push ar1
push dp
push ir0
push ir1
push rs
push re
push rc
push bk
push r0
pushf r0
push r1
pushf r1
push r2
pushf r2
push r3
pushf r3
; no push r4 because other part of register is in basic context
push r4
pushf r4
; no push r5 because other part of register is in basic context
push r5
pushf r5
push r6
pushf r6
; no pushf r6 because other part of register is in basic context
push r7
pushf r7
; no pushf r7 because other part of register is in basic context
.if .TMS320C40
push r8
; no pushf r8 because other part of register is in basic context
push r9
pushf r9
push r10
pushf r10
push r11
pushf r11
.endif
ldi sp,r2
call SYM(__ISR_Handler)
.if .TMS320C40
popf r11
pop r11
popf r10
pop r10
popf r9
pop r9
; no popf r8 because other part of register is in basic context
pop r8
.endif
; no popf r7 because other part of register is in basic context
popf r7
pop r7
; no popf r6 because other part of register is in basic context
popf r6
pop r6
; no popf r5 because other part of register is in basic context
popf r5
pop r5
; no pop r4 because other part of register is in basic context
popf r4
pop r4
popf r3
pop r3
popf r2
pop r2
popf r1
pop r1
popf r0
pop r0
pop bk
pop rc
pop re
pop rs
pop ir1
pop ir0
pop dp
pop ar1
pop ar0
pop ar2 ; because the vector numbers goes here
pop st
reti
/*
* Prologues so we can know the vector number. Generated by this script:
*
* i=0
* while test $i -lt 64
* do
*
* printf "\t.global\tSYM(rtems_irq_prologue_%X)\n" $i
* printf "SYM(rtems_irq_prologue_%X):\n" $i
* printf "\tpush\tst\n"
* printf "\tpush\tar2\n"
* printf "\tldi\t0x%x,ar2\n" $i
* printf "\tbr\tSYM(_ISR_Handler_save_registers)\n"
* printf "\n"
* i=`expr $i + 1`
*
* done
*/
.global SYM(rtems_irq_prologue_0)
SYM(rtems_irq_prologue_0):
push st
push ar2
ldi 0x0,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_1)
SYM(rtems_irq_prologue_1):
push st
push ar2
ldi 0x1,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_2)
SYM(rtems_irq_prologue_2):
push st
push ar2
ldi 0x2,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_3)
SYM(rtems_irq_prologue_3):
push st
push ar2
ldi 0x3,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_4)
SYM(rtems_irq_prologue_4):
push st
push ar2
ldi 0x4,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_5)
SYM(rtems_irq_prologue_5):
push st
push ar2
ldi 0x5,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_6)
SYM(rtems_irq_prologue_6):
push st
push ar2
ldi 0x6,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_7)
SYM(rtems_irq_prologue_7):
push st
push ar2
ldi 0x7,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_8)
SYM(rtems_irq_prologue_8):
push st
push ar2
ldi 0x8,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_9)
SYM(rtems_irq_prologue_9):
push st
push ar2
ldi 0x9,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_A)
SYM(rtems_irq_prologue_A):
push st
push ar2
ldi 0xa,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_B)
SYM(rtems_irq_prologue_B):
push st
push ar2
ldi 0xb,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_C)
SYM(rtems_irq_prologue_C):
push st
push ar2
ldi 0xc,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_D)
SYM(rtems_irq_prologue_D):
push st
push ar2
ldi 0xd,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_E)
SYM(rtems_irq_prologue_E):
push st
push ar2
ldi 0xe,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_F)
SYM(rtems_irq_prologue_F):
push st
push ar2
ldi 0xf,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_10)
SYM(rtems_irq_prologue_10):
push st
push ar2
ldi 0x10,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_11)
SYM(rtems_irq_prologue_11):
push st
push ar2
ldi 0x11,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_12)
SYM(rtems_irq_prologue_12):
push st
push ar2
ldi 0x12,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_13)
SYM(rtems_irq_prologue_13):
push st
push ar2
ldi 0x13,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_14)
SYM(rtems_irq_prologue_14):
push st
push ar2
ldi 0x14,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_15)
SYM(rtems_irq_prologue_15):
push st
push ar2
ldi 0x15,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_16)
SYM(rtems_irq_prologue_16):
push st
push ar2
ldi 0x16,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_17)
SYM(rtems_irq_prologue_17):
push st
push ar2
ldi 0x17,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_18)
SYM(rtems_irq_prologue_18):
push st
push ar2
ldi 0x18,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_19)
SYM(rtems_irq_prologue_19):
push st
push ar2
ldi 0x19,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_1A)
SYM(rtems_irq_prologue_1A):
push st
push ar2
ldi 0x1a,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_1B)
SYM(rtems_irq_prologue_1B):
push st
push ar2
ldi 0x1b,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_1C)
SYM(rtems_irq_prologue_1C):
push st
push ar2
ldi 0x1c,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_1D)
SYM(rtems_irq_prologue_1D):
push st
push ar2
ldi 0x1d,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_1E)
SYM(rtems_irq_prologue_1E):
push st
push ar2
ldi 0x1e,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_1F)
SYM(rtems_irq_prologue_1F):
push st
push ar2
ldi 0x1f,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_20)
SYM(rtems_irq_prologue_20):
push st
push ar2
ldi 0x20,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_21)
SYM(rtems_irq_prologue_21):
push st
push ar2
ldi 0x21,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_22)
SYM(rtems_irq_prologue_22):
push st
push ar2
ldi 0x22,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_23)
SYM(rtems_irq_prologue_23):
push st
push ar2
ldi 0x23,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_24)
SYM(rtems_irq_prologue_24):
push st
push ar2
ldi 0x24,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_25)
SYM(rtems_irq_prologue_25):
push st
push ar2
ldi 0x25,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_26)
SYM(rtems_irq_prologue_26):
push st
push ar2
ldi 0x26,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_27)
SYM(rtems_irq_prologue_27):
push st
push ar2
ldi 0x27,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_28)
SYM(rtems_irq_prologue_28):
push st
push ar2
ldi 0x28,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_29)
SYM(rtems_irq_prologue_29):
push st
push ar2
ldi 0x29,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_2A)
SYM(rtems_irq_prologue_2A):
push st
push ar2
ldi 0x2a,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_2B)
SYM(rtems_irq_prologue_2B):
push st
push ar2
ldi 0x2b,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_2C)
SYM(rtems_irq_prologue_2C):
push st
push ar2
ldi 0x2c,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_2D)
SYM(rtems_irq_prologue_2D):
push st
push ar2
ldi 0x2d,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_2E)
SYM(rtems_irq_prologue_2E):
push st
push ar2
ldi 0x2e,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_2F)
SYM(rtems_irq_prologue_2F):
push st
push ar2
ldi 0x2f,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_30)
SYM(rtems_irq_prologue_30):
push st
push ar2
ldi 0x30,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_31)
SYM(rtems_irq_prologue_31):
push st
push ar2
ldi 0x31,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_32)
SYM(rtems_irq_prologue_32):
push st
push ar2
ldi 0x32,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_33)
SYM(rtems_irq_prologue_33):
push st
push ar2
ldi 0x33,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_34)
SYM(rtems_irq_prologue_34):
push st
push ar2
ldi 0x34,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_35)
SYM(rtems_irq_prologue_35):
push st
push ar2
ldi 0x35,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_36)
SYM(rtems_irq_prologue_36):
push st
push ar2
ldi 0x36,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_37)
SYM(rtems_irq_prologue_37):
push st
push ar2
ldi 0x37,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_38)
SYM(rtems_irq_prologue_38):
push st
push ar2
ldi 0x38,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_39)
SYM(rtems_irq_prologue_39):
push st
push ar2
ldi 0x39,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_3A)
SYM(rtems_irq_prologue_3A):
push st
push ar2
ldi 0x3a,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_3B)
SYM(rtems_irq_prologue_3B):
push st
push ar2
ldi 0x3b,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_3C)
SYM(rtems_irq_prologue_3C):
push st
push ar2
ldi 0x3c,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_3D)
SYM(rtems_irq_prologue_3D):
push st
push ar2
ldi 0x3d,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_3E)
SYM(rtems_irq_prologue_3E):
push st
push ar2
ldi 0x3e,ar2
br SYM(_ISR_Handler_save_registers)
.global SYM(rtems_irq_prologue_3F)
SYM(rtems_irq_prologue_3F):
push st
push ar2
ldi 0x3f,ar2
br SYM(_ISR_Handler_save_registers)

82
cpukit/score/cpu/c4x/irq.c Normal file
View File

@@ -0,0 +1,82 @@
/*
* XXX CPU Dependent Source
*
*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#include <rtems/system.h>
#include <rtems/score/cpu.h>
#include <rtems/score/isr.h>
#include <rtems/score/thread.h>
/*
* This routine provides the RTEMS interrupt management.
*/
#if( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE)
unsigned long *_old_stack_ptr;
#endif
register unsigned long *stack_ptr asm("sp");
void __ISR_Handler(unsigned32 vector, void *isr_sp)
{
register unsigned32 level;
/* already disabled when we get here */
/* _CPU_ISR_Disable( level ); */
_Thread_Dispatch_disable_level++;
#if 0
if ( stack_ptr > (_Thread_Executing->Start.stack +
_Thread_Executing->Start.Initial_stack.size) ) {
printk( "Blown interrupt stack at 0x%x\n", stack_ptr );
}
#endif
#if( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE)
if ( _ISR_Nest_level == 0 ) {
/* Install irq stack */
_old_stack_ptr = stack_ptr;
stack_ptr = _CPU_Interrupt_stack_low;
}
#endif
_ISR_Nest_level++;
/* leave it to the ISR to decide if they get reenabled */
/* _CPU_ISR_Enable( level ); */
/* call isp */
if ( _ISR_Vector_table[ vector] )
(*_ISR_Vector_table[ vector ])(
vector, isr_sp - sizeof(CPU_Interrupt_frame) + 1 );
_CPU_ISR_Disable( level );
_ISR_Nest_level--;
#if( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE)
if ( _ISR_Nest_level == 0 ) /* restore old stack pointer */
stack_ptr = _old_stack_ptr;
#endif
_Thread_Dispatch_disable_level--;
_CPU_ISR_Enable( level );
if ( _Thread_Dispatch_disable_level == 0 ) {
if ( _Context_Switch_necessary || !_ISR_Signals_to_thread_executing ) {
_ISR_Signals_to_thread_executing = FALSE;
_Thread_Dispatch();
}
}
}

101
cpukit/score/cpu/c4x/rtems/asm.h Normal file
View File

@@ -0,0 +1,101 @@
/* asm.h
*
* This include file attempts to address the problems
* caused by incompatible flavors of assemblers and
* toolsets. It primarily addresses variations in the
* use of leading underscores on symbols and the requirement
* that register names be preceded by a %.
*
*
* NOTE: The spacing in the use of these macros
* is critical to them working as advertised.
*
* COPYRIGHT:
*
* This file is based on similar code found in newlib available
* from ftp.cygnus.com. The file which was used had no copyright
* notice. This file is freely distributable as long as the source
* of the file is noted. This file is:
*
* COPYRIGHT (c) 1994-1997.
* On-Line Applications Research Corporation (OAR).
*
* $Id$
*/
#ifndef __C4X_ASM_h
#define __C4X_ASM_h
/*
* Indicate we are in an assembly file and get the basic CPU definitions.
*/
#ifndef ASM
#define ASM
#endif
#include <rtems/score/targopts.h>
#include <rtems/score/c4x.h>
/*
* Recent versions of GNU cpp define variables which indicate the
* need for underscores and percents. If not using GNU cpp or
* the version does not support this, then you will obviously
* have to define these as appropriate.
*/
#ifndef __USER_LABEL_PREFIX__
#define __USER_LABEL_PREFIX__ _
#endif
#ifndef __REGISTER_PREFIX__
#define __REGISTER_PREFIX__
#endif
/* ANSI concatenation macros. */
#define CONCAT1(a, b) CONCAT2(a, b)
#define CONCAT2(a, b) a ## b
/* Use the right prefix for global labels. */
#define SYM(x) CONCAT1 (__USER_LABEL_PREFIX__, x)
/* Use the right prefix for registers. */
#define REG(x) CONCAT1 (__REGISTER_PREFIX__, x)
/*
* define macros for all of the registers on this CPU
*
* EXAMPLE: #define d0 REG (d0)
*/
/*
* Define macros to handle section beginning and ends.
*/
#define BEGIN_CODE_DCL .text
#define END_CODE_DCL
#define BEGIN_DATA_DCL .data
#define END_DATA_DCL
#define BEGIN_CODE .text
#define END_CODE
#define BEGIN_DATA
#define END_DATA
#define BEGIN_BSS
#define END_BSS
#define END
/*
* Following must be tailor for a particular flavor of the C compiler.
* They may need to put underscores in front of the symbols.
*/
#define PUBLIC(sym) .globl SYM (sym)
#define EXTERN(sym) .globl SYM (sym)
#endif
/* end of include file */

362
cpukit/score/cpu/c4x/rtems/score/c4x.h Normal file
View File

@@ -0,0 +1,362 @@
/* c4x.h
*
* This file is an example (i.e. "no CPU") of the file which is
* created for each CPU family port of RTEMS.
*
*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*
*/
#ifndef _INCLUDE_C4X_h
#define _INCLUDE_C4X_h
#ifdef __cplusplus
extern "C" {
#endif
/*
* This file contains the information required to build
* RTEMS for a particular member of the "no cpu"
* family when executing in protected mode. It does
* this by setting variables to indicate which implementation
* dependent features are present in a particular member
* of the family.
*/
#if defined(c30)
#define CPU_MODEL_NAME "C30"
#elif defined(c31)
#define CPU_MODEL_NAME "C31"
#elif defined(c32)
#define CPU_MODEL_NAME "C32"
#elif defined(c40)
#define CPU_MODEL_NAME "C40"
#elif defined(c44)
#define CPU_MODEL_NAME "C44"
#else
#error "Unsupported CPU Model"
#endif
/*
* Define the name of the CPU family.
*/
#define CPU_NAME "Texas Instruments C3x/C4x"
/*
* This port is a little unusual in that even though there are "floating
* point registers", the notion of floating point is very inherent to
* applications. In addition, the calling conventions require that
* only a few extended registers be preserved across subroutine calls.
* The overhead of including these few registers in the basic
* context is small compared to the overhead of managing the notion
* of separate floating point contexts. So we decided to pretend that
* there is no FPU on the C3x or C4x.
*/
#define C4X_HAS_FPU 0
/*
* Routines to manipulate the bits in the Status Word (ST).
*/
#define C4X_ST_C 0x0001
#define C4X_ST_V 0x0002
#define C4X_ST_Z 0x0004
#define C4X_ST_N 0x0008
#define C4X_ST_UF 0x0010
#define C4X_ST_LV 0x0020
#define C4X_ST_LUF 0x0040
#define C4X_ST_OVM 0x0080
#define C4X_ST_RM 0x0100
#define C4X_ST_CF 0x0400
#define C4X_ST_CE 0x0800
#define C4X_ST_CC 0x1000
#define C4X_ST_GIE 0x2000
#ifndef _TMS320C40
#define C3X_IE_INTERRUPT_MASK_BITS 0xffff
#define C3x_IE_INTERRUPTS_ALL_ENABLED 0x0000
#define C3x_IE_INTERRUPTS_ALL_DISABLED 0xffff
#endif
#ifndef ASM
/*
* A nop macro.
*/
#define c4x_nop() \
__asm__("nop");
/*
* Routines to set and clear individual bits in the ST (status word).
*
* cpu_st_bit_clear - clear bit in ST
* cpu_st_bit_set - set bit in ST
* cpu_st_get - obtain entire ST
*/
#ifdef _TMS320C40
#define c4x_gie_nop()
#else
#define c4x_gie_nop() { c4x_nop(); c4x_nop(); }
#endif
#define cpu_st_bit_clear(_st_bit) \
do { \
__asm__("andn %0,st" : : "g" (_st_bit) : "cc"); \
c4x_gie_nop(); \
} while (0)
#define cpu_st_bit_set(_st_bit) \
do { \
__asm__("or %0,st" : : "g" (_st_bit) : "cc"); \
c4x_gie_nop(); \
} while (0)
static inline unsigned int cpu_st_get(void)
{
register unsigned int st_value;
__asm__("ldi st, %0" : "=r" (st_value));
return st_value;
}
/*
* Routines to manipulate the Global Interrupt Enable (GIE) bit in
* the Status Word (ST).
*
* c4x_global_interrupts_get - returns current GIE setting
* c4x_global_interrupts_disable - disables global interrupts
* c4x_global_interrupts_enable - enables global interrupts
* c4x_global_interrupts_restore - restores GIE to pre-disable state
* c4x_global_interrupts_flash - temporarily enable global interrupts
*/
#define c4x_global_interrupts_get() \
(cpu_st_get() & C4X_ST_GIE)
#define c4x_global_interrupts_disable() \
cpu_st_bit_clear(C4X_ST_GIE)
#define c4x_global_interrupts_enable() \
cpu_st_bit_set(C4X_ST_GIE)
#define c4x_global_interrupts_restore(_old_level) \
cpu_st_bit_set(_old_level)
#define c4x_global_interrupts_flash(_old_level) \
do { \
cpu_st_bit_set(_old_level); \
cpu_st_bit_clear(C4X_ST_GIE); \
} while (0)
#ifndef _TMS320C40
/*
* Routines to set and get the IF register
*
* c3x_get_if - obtains IF register
* c3x_set_if - sets IF register
*/
static inline unsigned int c3x_get_if(void)
{
register unsigned int _if_value;
__asm__( "ldi if, %0" : "=r" (_if_value) );
return _if_value;
}
static inline void c3x_set_if(unsigned int _if_value)
{
__asm__( "ldi %0, if" : : "g" (_if_value) : "if", "cc");
}
/*
* Routines to set and get the IE register
*
* c3x_get_ie - obtains IE register
* c3x_set_ie - sets IE register
*/
static inline unsigned int c3x_get_ie(void)
{
register unsigned int _ie_value;
__asm__ volatile ( "ldi ie, %0" : "=r" (_ie_value) );
return _ie_value;
}
static inline void c3x_set_ie(unsigned int _ie_value)
{
__asm__ volatile ( "ldi %0, ie" : : "g" (_ie_value) : "ie", "cc");
}
/*
* Routines to manipulates the mask portion of the IE register.
*
* c3x_ie_mask_all - returns previous IE mask
* c3x_ie_mask_restore - restores previous IE mask
* c3x_ie_mask_flash - temporarily restores previous IE mask
* c3x_ie_mask_set - sets a specific set of the IE mask
*/
#define c3x_ie_mask_all( _isr_cookie ) \
do { \
__asm__("ldi ie,%0\n" \
"\tandn 0ffffh, ie" \
: "=r" (_isr_cookie): : "ie", "cc" ); \
} while (0)
#define c3x_ie_mask_restore( _isr_cookie ) \
do { \
__asm__("or %0, ie" \
: : "g" (_isr_cookie) : "ie", "cc" ); \
} while (0)
#define c3x_ie_mask_flash( _isr_cookie ) \
do { \
__asm__("or %0, ie\n" \
"\tandn 0ffffh, ie" \
: : "g" (_isr_cookie) : "ie", "cc" ); \
} while (0)
#define c3x_ie_mask_set( _new_mask ) \
do { unsigned int _ie_mask; \
unsigned int _ie_value; \
\
if ( _new_mask == 0 ) _ie_mask = 0; \
else _ie_mask = 0xffff; \
_ie_value = c3x_get_ie(); \
_ie_value &= C4X_IE_INTERRUPT_MASK_BITS; \
_ie_value |= _ie_mask; \
c3x_set_ie(_ie_value); \
} while (0)
#endif
/* end of C3x specific interrupt flag routines */
/*
* This is a section of C4x specific interrupt flag management routines.
*/
#ifdef _TMS320C40
/*
* Routines to set and get the IIF register
*
* c4x_get_iif - obtains IIF register
* c4x_set_iif - sets IIF register
*/
static inline unsigned int c4x_get_iif(void)
{
register unsigned int _iif_value;
__asm__( "ldi iif, %0" : "=r" (_iif_value) );
return _iif_value;
}
static inline void c4x_set_iif(unsigned int _iif_value)
{
__asm__( "ldi %0, iif" : : "g" (_iif_value) : "iif", "cc");
}
/*
* Routines to set and get the IIE register
*
* c4x_get_iie - obtains IIE register
* c4x_set_iie - sets IIE register
*/
static inline unsigned int c4x_get_iie(void)
{
register unsigned int _iie_value;
__asm__( "ldi iie, %0" : "=r" (_iie_value) );
return _iie_value;
}
static inline void c4x_set_iie(unsigned int _iie_value)
{
__asm__( "ldi %0, iie" : : "g" (_iie_value) : "iie", "cc");
}
/*
* Routines to manipulates the mask portion of the IIE register.
*
* c4x_ie_mask_all - returns previous IIE mask
* c4x_ie_mask_restore - restores previous IIE mask
* c4x_ie_mask_flash - temporarily restores previous IIE mask
* c4x_ie_mask_set - sets a specific set of the IIE mask
*/
#if 0
#warning "C4x IIE masking routines not implemented."
#define c4x_iie_mask_all( _isr_cookie )
#define c4x_iie_mask_restore( _isr_cookie )
#define c4x_iie_mask_flash( _isr_cookie )
#define c4x_iie_mask_set( _new_mask )
#endif
#endif
/* end of C4x specific interrupt flag routines */
/*
* Routines to access the Interrupt Trap Table Pointer
*
* c4x_get_ittp - get ITTP
* c4x_set_ittp - set ITTP
*/
static inline void * c4x_get_ittp(void)
{
register unsigned int _if_value;
__asm__( "ldi if, %0" : "=r" (_if_value) );
return (void *)((_if_value & 0xffff) >> 8);
}
static inline void c4x_set_ittp(void *_ittp_value)
{
unsigned int _if_value;
unsigned int _ittp_field;
#ifdef _TMS320C40
_if_value = c4x_get_iif();
#else
_if_value = c3x_get_if();
#endif
_if_value &= 0xffff;
_ittp_field = (((unsigned int) _ittp_value) << 8);
_if_value |= _ittp_field;
#ifdef _TMS320C40
c4x_set_iif( _if_value );
#else
c3x_set_if( _if_value );
#endif
}
#endif /* ifndef ASM */
#ifdef __cplusplus
}
#endif
#endif /* ! _INCLUDE_C4X_h */
/* end of include file */

1256
cpukit/score/cpu/c4x/rtems/score/cpu.h Normal file
View File

File diff suppressed because it is too large Load Diff

70
cpukit/score/cpu/c4x/rtems/score/cpu_asm.h Normal file
View File

@@ -0,0 +1,70 @@
/*
* cpu_asm.h
*
* Very loose template for an include file for the cpu_asm.? file
* if it is implemented as a ".S" file (preprocessed by cpp) instead
* of a ".s" file (preprocessed by gm4 or gasp).
*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*
*/
#ifndef __CPU_ASM_h
#define __CPU_ASM_h
/* pull in the generated offsets */
#include <rtems/score/offsets.h>
/*
* Hardware General Registers
*/
/* put something here */
/*
* Hardware Floating Point Registers
*/
/* put something here */
/*
* Hardware Control Registers
*/
/* put something here */
/*
* Calling Convention
*/
/* put something here */
/*
* Temporary registers
*/
/* put something here */
/*
* Floating Point Registers - SW Conventions
*/
/* put something here */
/*
* Temporary floating point registers
*/
/* put something here */
#endif
/* end of file */

56
cpukit/score/cpu/c4x/rtems/score/types.h Normal file
View File

@@ -0,0 +1,56 @@
/* c4xtypes.h
*
* This include file contains type definitions pertaining to the Intel
* C4x processor family.
*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#ifndef __C4X_TYPES_h
#define __C4X_TYPES_h
#ifndef ASM
#ifdef __cplusplus
extern "C" {
#endif
/*
* This section defines the basic types for this processor.
*/
typedef unsigned char unsigned8; /* unsigned 8-bit integer */
typedef unsigned short unsigned16; /* unsigned 16-bit integer */
typedef unsigned int unsigned32; /* unsigned 32-bit integer */
typedef unsigned long long unsigned64; /* unsigned 64-bit integer */
typedef unsigned16 Priority_Bit_map_control;
typedef signed char signed8; /* 8-bit signed integer */
typedef signed short signed16; /* 16-bit signed integer */
typedef signed int signed32; /* 32-bit signed integer */
typedef signed long long signed64; /* 64 bit signed integer */
typedef unsigned32 boolean; /* Boolean value */
typedef float single_precision; /* single precision float */
typedef double double_precision; /* double precision float */
typedef void c4x_isr;
typedef void ( *c4x_isr_entry )( void );
#ifdef __cplusplus
}
#endif
#endif /* !ASM */
#endif
/* end of include file */

52
cpukit/score/cpu/c4x/rtems/tic4x/c4xio.h Normal file
View File

@@ -0,0 +1,52 @@
/*
* C4X IO Information
*
* $Id$
*/
#ifndef __C4XIO_h
#define __C4XIO_h
/*
* The following section of C4x timer code is based on C40 specific
* timer code from Ran Cabell <rcabell@norfolk.infi.net>. The
* only C3x/C4x difference spotted was the address of the timer.
* The names have been changed to be more RTEMS like.
*/
struct c4x_timer {
volatile int tcontrol;
volatile int r1[3];
volatile int tcounter;
volatile int r2[3];
volatile int tperiod;
};
#ifdef _TMS320C40
#define C4X_TIMER_0 ((struct c4x_timer*)0x100020)
#else
#define C4X_TIMER_0 ((struct c4x_timer*)0x808020)
#define C4X_TIMER_1 ((struct c4x_timer*)0x808030)
#endif
#define c4x_timer_start( _timer ) \
_timer->tcontrol=0x02c1
#define c4x_timer_stop( _timer ) _timer->tcontrol = 0
#define c4x_timer_get_counter( _timer ) (volatile int)(_timer->tcounter)
#define c4x_timer_set_counter( _timer, _value ) \
do { \
(volatile int)(_timer->tcounter) = _value; \
} while (0);
#define c4x_timer_get_period( _timer ) (volatile int)(_timer->tperiod)
#define c4x_timer_set_period( _timer, _value ) \
do { \
(volatile int)(_timer->tperiod) = _value; \
} while (0);
#endif
/* end if include file */

12
make/custom/c3xsim.cfg Normal file
View File

@@ -0,0 +1,12 @@
#
# Configuration file for the GDB C4x simulator as a C3x
#
# $Id$
#
RTEMS_BSP=c3sxim
RTEMS_CPU_MODEL=c32
CPU_CFLAGS = -mcpu=32
include $(RTEMS_ROOT)/make/custom/c4xsim.cfg

59
make/custom/c4xsim.cfg Normal file
View File

@@ -0,0 +1,59 @@
#
# Config file for the "bare" BSP
#
# $Id$
#
include $(RTEMS_ROOT)/make/custom/default.cfg
ifeq ($(RTEMS_CPU_MODEL),)
RTEMS_BSP=c4xsim
RTEMS_CPU_MODEL=c40
CPU_CFLAGS=-mcpu=40 #-msmall
endif
# XXX add this temporarily until c4x-rtems target defines this.
CPU_CFLAGS += -D__rtems__
# This is the actual bsp directory used during the build process.
RTEMS_BSP_FAMILY=c4xsim
# optimize flag: typically -0, could use -O4 or -fast
# -O4 is ok for RTEMS
# -O4 is broken for the moment on the C4x gcc
#CFLAGS_OPTIMIZE_V=-O4
CFLAGS_OPTIMIZE_V=-O1
# This section makes the target dependent options file.
# NDEBUG (C library)
# if defined asserts do not generate code. This is commonly used
# as a command line option.
#
# RTEMS_TEST_NO_PAUSE (RTEMS tests)
# do not pause between screens of output in the rtems tests
#
# RTEMS_DEBUG (RTEMS)
# If defined, debug checks in RTEMS and support library code are enabled.
#
define make-target-options
@echo "/* #define NDEBUG 1 */ " >>$@
@echo "#define RTEMS_TEST_NO_PAUSE 1" >>$@
@echo "/* #define RTEMS_DEBUG 1 */" >>$@
endef
# this target has no start file
START_BASE=
# The following are definitions of make-exe which will work using ld as
# is currently required. It is expected that as of gcc 2.8, the end user
# will be able to override parts of the compilers specs and link using gcc.
define make-exe
$(CC) $(CPPFLAGS) $(CFLAGS) -o $(basename $@).exe \
$(LINK_OBJS) $(LINK_LIBS)
$(NM) -g -n $@ > $(basename $@).num
$(SIZE) $@
endef
# Miscellaneous additions go here