forked from Imagelibrary/rtems
Remove stray white spaces.
This commit is contained in:
@@ -36,10 +36,10 @@
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SYM(start):
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start:
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/*
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/*
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* The trap table has to be the first code in a boot PROM. But because
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* the Memory Configuration comes up thinking we only have 4K of PROM, we
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* cannot have a full trap table and still have room left over to
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* cannot have a full trap table and still have room left over to
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* reprogram the Memory Configuration register correctly. This file
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* uses an abbreviated trap which has every entry which might be used
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* before RTEMS installs its own trap table.
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@@ -49,8 +49,8 @@ start:
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PUBLIC(trap_table)
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SYM(trap_table):
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RTRAP( 0, SYM(hard_reset) ); ! 00 reset trap
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BAD_TRAP; ! 01 instruction access
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RTRAP( 0, SYM(hard_reset) ); ! 00 reset trap
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BAD_TRAP; ! 01 instruction access
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! exception
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BAD_TRAP; ! 02 illegal instruction
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BAD_TRAP; ! 03 privileged instruction
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@@ -68,7 +68,7 @@ SYM(trap_table):
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BAD_TRAP; ! 0F undefined
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BAD_TRAP; ! 10 undefined
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/*
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/*
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* ERC32 defined traps
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*/
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@@ -115,7 +115,7 @@ SYM(trap_table):
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BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 74 - 77 undefined
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BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 78 - 7B undefined
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/*
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/*
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This is a sad patch to make sure that we know where the
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MEC timer control register mirror is so we can stop the timers
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from an external debugger. It is needed because the control
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@@ -138,10 +138,10 @@ SYM(_ERC32_MEC_Timer_Control_Mirror):
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SYM(CLOCK_SPEED):
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.word 0x0a, 0, 0, 0 ! 7E (10 MHz default)
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BAD_TRAP; ! 7F undefined
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/*
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/*
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* Software traps
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*
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* NOTE: At the risk of being redundant... this is not a full
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@@ -207,7 +207,7 @@ SYM(hard_reset):
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and %g2, 0x7, %g2
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set 1, %g3
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sll %g3, %g2, %g3
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mov %g3, %wim
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mov %g3, %wim
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or %g1, 0x20, %g1
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wr %g1, %psr ! enable traps
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@@ -233,11 +233,11 @@ SYM(hard_reset):
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/*
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* Copy the initialized data to RAM
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*
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* FROM: _endtext
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* TO: _data_start
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* FROM: _endtext
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* TO: _data_start
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* LENGTH: (__bss_start - _data_start) bytes
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*/
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sethi %hi(_endtext),%g2
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or %g2,%lo(_endtext),%g2 ! g2 = start of initialized data in ROM
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