forked from Imagelibrary/rtems
2005-10-06 Till Straumann <strauman@slac.stanford.edu>
PR 833/bsps * irq/irq_asm.S: Currently, all (new exception) BSPs explicitely enable the FPU across the user ISR but DONT save/restore the FPU context. Any use of the FPU fron the user handler (e.g., due to GCC optimizations) result in corruption. The fix results in an exception in such cases (user ISR must explicitely save/enable/restore FPU).
This commit is contained in:
@@ -1,3 +1,12 @@
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2005-10-06 Till Straumann <strauman@slac.stanford.edu>
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PR 833/bsps
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* irq/irq_asm.S: Currently, all (new exception) BSPs explicitely enable
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the FPU across the user ISR but DONT save/restore the FPU context.
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Any use of the FPU fron the user handler (e.g., due to GCC
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optimizations) result in corruption. The fix results in an exception
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in such cases (user ISR must explicitely save/enable/restore FPU).
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2003-12-19 Joel Sherrill <joel@OARcorp.com>
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PR 545/bsps
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@@ -12,6 +12,8 @@
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* Till Straumann <strauman@slac.stanford.edu>, 2003/7:
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* - store isr nesting level in _ISR_Nest_level rather than
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* SPRG0 - RTEMS relies on that variable.
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* Till Straumann <strauman@slac.stanford.edu>, 2005/4:
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* - DONT enable FP across user USR since fpregs are never saved!!
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*
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* $Id$
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*/
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@@ -88,14 +90,8 @@ SYM (shared_raw_irq_code_entry):
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/*
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* Enable data and instruction address translation, exception recovery
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*
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* also, on CPUs with FP, enable FP so that FP context can be
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* saved and restored (using FP instructions)
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*/
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#if (PPC_HAS_FPU == 0)
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ori r3, r3, MSR_RI | MSR_IR | MSR_DR
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#else
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ori r3, r3, MSR_RI | MSR_IR | MSR_DR | MSR_FP
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#endif
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mtmsr r3
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SYNC
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/*
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@@ -298,6 +294,27 @@ nested:
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rfi
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switch:
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#if ( PPC_HAS_FPU != 0 )
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#if ! defined( CPU_USE_DEFERRED_FP_SWITCH )
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#error missing include file???
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#endif
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mfmsr r4
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#if ( CPU_USE_DEFERRED_FP_SWITCH == TRUE )
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/* if the executing thread has FP enabled propagate
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* this now so _Thread_Dispatch can save/restore the FPREGS
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* NOTE: it is *crucial* to disable the FPU across the
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* user ISR [independent of using the 'deferred'
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* strategy or not]. We don't save FP regs across
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* the user ISR and hence we prefer an exception to
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* be raised rather than experiencing corruption.
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*/
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lwz r3, SRR1_FRAME_OFFSET(r1)
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rlwimi r4, r3, 0, 18, 18 /* MSR_FP */
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#else
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ori r4, r4, MSR_FP
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#endif
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mtmsr r4
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#endif
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bl SYM (_Thread_Dispatch)
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easy_exit:
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@@ -1,3 +1,12 @@
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2005-10-06 Till Straumann <strauman@slac.stanford.edu>
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PR 833/bsps
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* irq/irq_asm.S: Currently, all (new exception) BSPs explicitely enable
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the FPU across the user ISR but DONT save/restore the FPU context.
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Any use of the FPU fron the user handler (e.g., due to GCC
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optimizations) result in corruption. The fix results in an exception
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in such cases (user ISR must explicitely save/enable/restore FPU).
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2005-09-12 Thomas Doerfler <Thomas.Doerfler@imd-systems.de>
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PR 527/bsps
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@@ -12,6 +12,8 @@
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* Till Straumann <strauman@slac.stanford.edu>, 2003/7:
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* - store isr nesting level in _ISR_Nest_level rather than
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* SPRG0 - RTEMS relies on that variable.
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* Till Straumann <strauman@slac.stanford.edu>, 2005/4:
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* - DONT enable FP across user ISR since fpregs are never saved!!
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*
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* $Id$
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*/
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@@ -127,11 +129,7 @@ SYM (shared_raw_irq_code_entry):
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* also, on CPUs with FP, enable FP so that FP context can be
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* saved and restored (using FP instructions)
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*/
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#if (PPC_HAS_FPU == 0)
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ori r3, r3, MSR_RI | MSR_IR | MSR_DR
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#else
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ori r3, r3, MSR_RI | MSR_IR | MSR_DR | MSR_FP
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#endif
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mtmsr r3
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SYNC
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/*
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@@ -338,6 +336,27 @@ nested:
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rfi
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switch:
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#if ( PPC_HAS_FPU != 0 )
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#if ! defined( CPU_USE_DEFERRED_FP_SWITCH )
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#error missing include file???
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#endif
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mfmsr r4
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#if ( CPU_USE_DEFERRED_FP_SWITCH == TRUE )
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/* if the executing thread has FP enabled propagate
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* this now so _Thread_Dispatch can save/restore the FPREGS
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* NOTE: it is *crucial* to disable the FPU across the
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* user ISR [independent of using the 'deferred'
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* strategy or not]. We don't save FP regs across
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* the user ISR and hence we prefer an exception to
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* be raised rather than experiencing corruption.
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*/
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lwz r3, SRR1_FRAME_OFFSET(r1)
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rlwimi r4, r3, 0, 18, 18 /* MSR_FP */
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#else
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ori r4, r4, MSR_FP
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#endif
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mtmsr r4
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#endif
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bl SYM (_Thread_Dispatch)
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easy_exit:
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@@ -1,3 +1,12 @@
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2005-10-06 Till Straumann <strauman@slac.stanford.edu>
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PR 833/bsps
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* irq/irq_asm.S: Currently, all (new exception) BSPs explicitely enable
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the FPU across the user ISR but DONT save/restore the FPU context.
|
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Any use of the FPU fron the user handler (e.g., due to GCC
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optimizations) result in corruption. The fix results in an exception
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in such cases (user ISR must explicitely save/enable/restore FPU).
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2004-09-27 Joel Sherrill <joel@OARcorp.com>
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PR 680/bsps
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@@ -12,6 +12,9 @@
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* Modifications to store nesting level in global _ISR_Nest_level
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* variable instead of SPRG0. Andy Dachs <a.dachs@sstl.co.uk>
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*
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* Till Straumann <strauman@slac.stanford.edu>, 2005/4:
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* - DONT enable FP across user ISR since fpregs are never saved!!
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*
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* $Id$
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*/
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@@ -93,11 +96,7 @@ SYM (shared_raw_irq_code_entry):
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* also, on CPUs with FP, enable FP so that FP context can be
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* saved and restored (using FP instructions)
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*/
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#if (PPC_HAS_FPU == 0)
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ori r3, r3, MSR_RI /*| MSR_IR | MSR_DR*/
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#else
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ori r3, r3, MSR_RI | /*MSR_IR | MSR_DR |*/ MSR_FP
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#endif
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mtmsr r3
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SYNC
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@@ -301,6 +300,27 @@ nested:
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rfi
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switch:
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#if ( PPC_HAS_FPU != 0 )
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#if ! defined( CPU_USE_DEFERRED_FP_SWITCH )
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#error missing include file???
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#endif
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mfmsr r4
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#if ( CPU_USE_DEFERRED_FP_SWITCH == TRUE )
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/* if the executing thread has FP enabled propagate
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* this now so _Thread_Dispatch can save/restore the FPREGS
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* NOTE: it is *crucial* to disable the FPU across the
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* user ISR [independent of using the 'deferred'
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* strategy or not]. We don't save FP regs across
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* the user ISR and hence we prefer an exception to
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* be raised rather than experiencing corruption.
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*/
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lwz r3, SRR1_FRAME_OFFSET(r1)
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rlwimi r4, r3, 0, 18, 18 /* MSR_FP */
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#else
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ori r4, r4, MSR_FP
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#endif
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mtmsr r4
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#endif
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bl SYM (_Thread_Dispatch)
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easy_exit:
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@@ -1,3 +1,12 @@
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2005-10-06 Till Straumann <strauman@slac.stanford.edu>
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PR 833/bsps
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* irq/irq_asm.S: Currently, all (new exception) BSPs explicitely enable
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the FPU across the user ISR but DONT save/restore the FPU context.
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Any use of the FPU fron the user handler (e.g., due to GCC
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optimizations) result in corruption. The fix results in an exception
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in such cases (user ISR must explicitely save/enable/restore FPU).
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2005-09-01 Joel Sherrill <joel@OARcorp.com>
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* include/bsp.h: This file is only to be used by BSPs with the new
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@@ -12,6 +12,9 @@
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* Till Straumann <strauman@slac.stanford.edu>, 2003/7:
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* - store isr nesting level in _ISR_Nest_level rather than
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* SPRG0 - RTEMS relies on that variable.
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* Till Straumann <strauman@slac.stanford.edu>, 2005/4:
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* - DONT enable FP across ISR since fpregs are not saved!!
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* FPU is used by Thread_Dispatch however...
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*
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* $Id$
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*/
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@@ -95,11 +98,7 @@ SYM (shared_raw_irq_code_entry):
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* also, on CPUs with FP, enable FP so that FP context can be
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* saved and restored (using FP instructions)
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*/
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#if (PPC_HAS_FPU == 0)
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ori r3, r3, MSR_RI | MSR_IR | MSR_DR
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#else
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ori r3, r3, MSR_RI | MSR_IR | MSR_DR | MSR_FP
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#endif
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mtmsr r3
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SYNC
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/*
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@@ -302,6 +301,27 @@ nested:
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rfi
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switch:
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#if ( PPC_HAS_FPU != 0 )
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#if ! defined( CPU_USE_DEFERRED_FP_SWITCH )
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#error missing include file???
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#endif
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mfmsr r4
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#if ( CPU_USE_DEFERRED_FP_SWITCH == TRUE )
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/* if the executing thread has FP enabled propagate
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* this now so _Thread_Dispatch can save/restore the FPREGS
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* NOTE: it is *crucial* to disable the FPU across the
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* user ISR [independent of using the 'deferred'
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* strategy or not]. We don't save FP regs across
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* the user ISR and hence we prefer an exception to
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* be raised rather than experiencing corruption.
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*/
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lwz r3, SRR1_FRAME_OFFSET(r1)
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rlwimi r4, r3, 0, 18, 18 /* MSR_FP */
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#else
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ori r4, r4, MSR_FP
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#endif
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mtmsr r4
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#endif
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bl SYM (_Thread_Dispatch)
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easy_exit:
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