forked from Imagelibrary/rtems
Missed this file in the merge.
This commit is contained in:
Joel Sherrill
412
c/src/lib/libbsp/powerpc/ppcn_60x/console/config.c
Normal file
412
c/src/lib/libbsp/powerpc/ppcn_60x/console/config.c
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@@ -0,0 +1,412 @@
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/*
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* This file contains the TTY driver table for the PPCn_60x
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*
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* COPYRIGHT (c) 1998 by Radstone Technology
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*
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*
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* THIS FILE IS PROVIDED TO YOU, THE USER, "AS IS", WITHOUT WARRANTY OF ANY
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* KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK
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* AS TO THE QUALITY AND PERFORMANCE OF ALL CODE IN THIS FILE IS WITH YOU.
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*
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* You are hereby granted permission to use, copy, modify, and distribute
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* this file, provided that this notice, plus the above copyright notice
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* and disclaimer, appears in all copies. Radstone Technology will provide
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* no support for this code.
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*
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* $Id$
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*/
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#include "i8042vga.h"
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#include "ns16550.h"
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#include "z85c30.h"
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#include <pci.h>
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#define PMX1553_BUS 2
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#define PMX1553_SLOT 1
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/*
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* Configuration specific probe routines
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*/
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static boolean config_PMX1553_probe(int minor);
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static boolean config_z85c30_probe(int minor);
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/*
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* The following table configures the console drivers used in this BSP.
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*
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* The first entry which, when probed, is available, will be named /dev/console,
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* all others being given the name indicated.
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*
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* Each field is interpreted thus:
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*
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* sDeviceName This is the name of the device.
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* pDeviceFns This is a pointer to the set of driver routines to use.
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* pDeviceFlow This is a pointer to the set of flow control routines to
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* use. Serial device drivers will typically supply RTSCTS
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* and DTRCTS handshake routines for DCE to DCE communication,
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* however for DCE to DTE communication, no such routines
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* should be necessary as RTS will be driven automatically
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* when the transmitter is active.
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* ulMargin The high water mark in the input buffer is set to the buffer
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* size less ulMargin. Once this level is reached, the driver's
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* flow control routine used to stop the remote transmitter will
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* be called. This figure should be greater than or equal to
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* the number of stages of FIFO between the transmitter and
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* receiver.
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* ulHysteresis After the high water mark specified by ulMargin has been
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* reached, the driver's routine to re-start the remote
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* transmitter will be called once the level in the input
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* buffer has fallen by ulHysteresis bytes.
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* pDeviceParams This contains either device specific data or a pointer to a
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* device specific structure containing additional information
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* not provided in this table.
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* ulCtrlPort1 This is the primary control port number for the device. This
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* may be used to specify different instances of the same device
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* type.
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* ulCtrlPort2 This is the secondary control port number, of use when a given
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* device has more than one available channel.
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* ulDataPort This is the port number for the data port of the device
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* ulIntVector This encodes the interrupt vector of the device.
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*
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*/
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console_tbl Console_Port_Tbl[] = {
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{
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"/dev/vga", /* sDeviceName */
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&i8042vga_fns, /* pDeviceFns */
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NULL, /* deviceProbe */
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NULL, /* pDeviceFlow */
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0, /* ulMargin */
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0, /* ulHysteresis */
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(void *)0, /* pDeviceParams */
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I8042_CS, /* ulCtrlPort1 */
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0, /* ulCtrlPort2 */
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I8042_DATA, /* ulDataPort */
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PPCN_60X_IRQ_KBD /* ulIntVector */
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},
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{
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"/dev/com1", /* sDeviceName */
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&ns16550_fns, /* pDeviceFns */
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NULL, /* deviceProbe */
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&ns16550_flow_RTSCTS, /* pDeviceFlow */
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16, /* ulMargin */
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8, /* ulHysteresis */
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(void *)9600, /* baud rate */ /* pDeviceParams */
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NS16550_PORT_A, /* ulCtrlPort1 */
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0, /* ulCtrlPort2 */
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NS16550_PORT_A, /* ulDataPort */
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PPCN_60X_IRQ_COM1 /* ulIntVector */
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},
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{
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"/dev/ser1", /* sDeviceName */
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&ns16550_fns, /* pDeviceFns */
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config_PMX1553_probe, /* deviceProbe */
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&ns16550_flow_RTSCTS, /* pDeviceFlow */
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80, /* ulMargin */
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8, /* ulHysteresis */
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(void *)9600, /* baud rate */ /* pDeviceParams */
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PMX1553_BUS, /* PCI bus */ /* ulCtrlPort1 */
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PMX1553_SLOT, /* PCI slot */ /* ulCtrlPort2 */
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1, /* Channel 1-4 */ /* ulDataPort */
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0 /* RS232 */ /* ulIntVector */
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},
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{
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"/dev/ser2", /* sDeviceName */
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&ns16550_fns, /* pDeviceFns */
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config_PMX1553_probe, /* deviceProbe */
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&ns16550_flow_RTSCTS, /* pDeviceFlow */
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80, /* ulMargin */
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8, /* ulHysteresis */
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(void *)9600, /* baud rate */ /* pDeviceParams */
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PMX1553_BUS, /* PCI bus */ /* ulCtrlPort1 */
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PMX1553_SLOT, /* PCI slot */ /* ulCtrlPort2 */
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2, /* Channel 1-4 */ /* ulDataPort */
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0 /* RS232 */ /* ulIntVector */
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},
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{
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"/dev/ser3", /* sDeviceName */
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&ns16550_fns, /* pDeviceFns */
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config_PMX1553_probe, /* deviceProbe */
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&ns16550_flow_RTSCTS, /* pDeviceFlow */
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96, /* ulMargin */
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8, /* ulHysteresis */
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(void *)57600, /* baud rate */ /* pDeviceParams */
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PMX1553_BUS, /* PCI bus */ /* ulCtrlPort1 */
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PMX1553_SLOT, /* PCI slot */ /* ulCtrlPort2 */
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3, /* Channel 1-4 */ /* ulDataPort */
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0 /* RS232 */ /* ulIntVector */
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},
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{
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"/dev/ser4", /* sDeviceName */
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&ns16550_fns, /* pDeviceFns */
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config_PMX1553_probe, /* deviceProbe */
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&ns16550_flow_RTSCTS, /* pDeviceFlow */
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96, /* ulMargin */
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8, /* ulHysteresis */
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(void *)57600, /* baud rate */ /* pDeviceParams */
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PMX1553_BUS, /* PCI bus */ /* ulCtrlPort1 */
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PMX1553_SLOT, /* PCI slot */ /* ulCtrlPort2 */
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4, /* Channel 1-4 */ /* ulDataPort */
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0 /* RS232 */ /* ulIntVector */
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},
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#if !PPCN_60X_USE_DINK
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{
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"/dev/com2", /* sDeviceName */
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&ns16550_fns, /* pDeviceFns */
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NULL, /* deviceProbe */
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&ns16550_flow_RTSCTS, /* pDeviceFlow */
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16, /* ulMargin */
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8, /* ulHysteresis */
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(void *)9600, /* baud rate */ /* pDeviceParams */
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NS16550_PORT_B, /* ulCtrlPort1 */
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0, /* ulCtrlPort2 */
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NS16550_PORT_B, /* ulDataPort */
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PPCN_60X_IRQ_COM2 /* ulIntVector */
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},
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#endif
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{
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"/dev/com3", /* sDeviceName */
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&z85c30_fns, /* pDeviceFns */
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config_z85c30_probe, /* deviceProbe */
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&z85c30_flow_RTSCTS, /* pDeviceFlow */
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16, /* ulMargin */
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8, /* ulHysteresis */
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(void *)9600, /* baud rate */ /* pDeviceParams */
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Z85C30_CTRL_A, /* ulCtrlPort1 */
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Z85C30_CTRL_A, /* ulCtrlPort2 */
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Z85C30_DATA_A, /* ulDataPort */
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PPCN_60X_IRQ_COM3_4 /* ulIntVector */
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},
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{
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"/dev/com4", /* sDeviceName */
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&z85c30_fns, /* pDeviceFns */
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config_z85c30_probe, /* deviceProbe */
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&z85c30_flow_RTSCTS, /* pDeviceFlow */
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16, /* ulMargin */
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8, /* ulHysteresis */
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(void *)9600, /* baud rate */ /* pDeviceParams */
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Z85C30_CTRL_B, /* ulCtrlPort1 */
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Z85C30_CTRL_A, /* ulCtrlPort2 */
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Z85C30_DATA_B, /* ulDataPort */
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PPCN_60X_IRQ_COM3_4 /* ulIntVector */
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}
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};
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/*
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* Define serial port write registers structure.
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*/
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typedef volatile struct _SP_WRITE_REGISTERS {
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unsigned char TransmitBuffer;
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unsigned char InterruptEnable;
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unsigned char FifoControl;
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unsigned char LineControl;
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unsigned char ModemControl;
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unsigned char Reserved1;
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unsigned char ModemStatus;
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unsigned char ScratchPad;
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} SP_WRITE_REGISTERS, *PSP_WRITE_REGISTERS;
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static boolean config_PMX1553_probe(int minor)
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{
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unsigned8 ucBusNumber, ucSlotNumber, ucChannel;
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unsigned8 ucIntLine;
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unsigned32 ulPortBase, ulMemBase, ulDeviceID;
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unsigned8 *pucSIO_cir, *pucUart_int_sr, *pucUartDevIntReg;
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PSP_WRITE_REGISTERS pNS16550Write;
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/*
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* Extract PCI bus/slot and channel number
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*/
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ucBusNumber=Console_Port_Tbl[minor].ulCtrlPort1;
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ucSlotNumber=Console_Port_Tbl[minor].ulCtrlPort2;
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ucChannel=Console_Port_Tbl[minor].ulDataPort;
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PCIConfigRead32(ucBusNumber,
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ucSlotNumber,
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0,
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PCI_CONFIG_VENDOR_LOW,
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&ulDeviceID);
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if(ulDeviceID!=0x000111b5)
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{
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return FALSE;
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}
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/*
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* At this point we know we have a PMC1553 or PMX1553 card
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*
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* Check for PMX1553 uart legacy IO ports
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*/
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PCIConfigRead32(ucBusNumber,
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ucSlotNumber,
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0,
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PCI_CONFIG_BAR_3,
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&ulPortBase);
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if(ulPortBase==0)
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{
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/*
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* This is either a PMC1553 or we can't see the uart
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* registers
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*/
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return FALSE;
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}
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PCIConfigRead32(ucBusNumber,
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ucSlotNumber,
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0,
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PCI_CONFIG_BAR_2,
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&ulMemBase);
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pucUartDevIntReg=(unsigned8 *)(PCI_MEM_BASE+ulMemBase);
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pucUart_int_sr=(unsigned8 *)(PCI_MEM_BASE+ulMemBase+0x10);
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pucSIO_cir=(unsigned8 *)(PCI_MEM_BASE+ulMemBase+0x18);
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/*
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* Use ulIntVector field to select RS232/RS422
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*/
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if(Console_Port_Tbl[minor].ulIntVector==0)
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{
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/*
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* Select RS232 mode
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*/
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*pucSIO_cir&=~(1<<(ucChannel-1));
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}
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else
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{
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/*
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* Select RS422 mode
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*/
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*pucSIO_cir|=1<<(ucChannel-1);
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}
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EIEIO;
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/*
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* Bring device out of reset
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*/
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*pucSIO_cir&=0xbf;
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EIEIO;
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/*
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* Enable all channels as active
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*/
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*pucSIO_cir|=0x10;
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EIEIO;
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*pucSIO_cir&=0xdf;
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PCIConfigRead8(ucBusNumber,
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ucSlotNumber,
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0,
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PCI_CONFIG_INTERRUPTLINE,
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&ucIntLine);
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ulPortBase&=~PCI_ADDRESS_IO_SPACE;
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ulPortBase+=8*(ucChannel-1);
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Console_Port_Tbl[minor].ulCtrlPort1=
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Console_Port_Tbl[minor].ulDataPort=ulPortBase;
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if(Console_Port_Tbl[minor].pDeviceFns!=&ns16550_fns_polled)
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{
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Console_Port_Tbl[minor].ulIntVector=PPCN_60X_IRQ_PCI(ucIntLine);
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/*
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* Enable interrupt
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*/
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*pucUart_int_sr=(~*pucUart_int_sr)&(0x08<<ucChannel);
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/*
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* Enable interrupt to PCI
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*/
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*pucUartDevIntReg=(~*pucUartDevIntReg)&0x80;
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}
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else
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{
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/*
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* Disable interrupt
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*/
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*pucUart_int_sr&=(0x08<<ucChannel);
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}
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/*
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* Enable Auto CTS to facilitate flow control
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*/
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pNS16550Write=(PSP_WRITE_REGISTERS)Console_Port_Tbl[minor].ulCtrlPort1;
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/*
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* Enable special register set and unlock Enhanced Feature Register
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*/
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outport_byte(&pNS16550Write->LineControl, 0xbf);
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/*
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* Unlock enhanced function bits
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*/
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outport_byte(&pNS16550Write->FifoControl, 0x10);
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/*
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* Disable special register set and lock Enhanced Feature Register
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*/
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outport_byte(&pNS16550Write->LineControl, 0);
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/*
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* Select div 1
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*/
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outport_byte(&pNS16550Write->ModemControl, 0x00);
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/*
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* Enable special register set and unlock Enhanced Feature Register
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*/
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outport_byte(&pNS16550Write->LineControl, 0xbf);
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/*
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* Lock enhanced function bits and enable auto CTS
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*/
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outport_byte(&pNS16550Write->FifoControl, 0x80);
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/*
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* Disable special register set and lock Enhanced Feature Register
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*/
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outport_byte(&pNS16550Write->LineControl, 0);
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/*
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* The PMX1553 currently uses a 16 MHz clock rather than the
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* 7.3728 MHz clock described in the ST16C654 data sheet. When
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* available, 22.1184 MHz will be used allowing rates up to
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* 1382400 baud (RS422 only).
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*/
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#if 1
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/*
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* Scale requested baud rate for 16 MHz clock
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*/
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(unsigned32)Console_Port_Tbl[minor].pDeviceParams*=7373;
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(unsigned32)Console_Port_Tbl[minor].pDeviceParams/=16000;
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#else
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/*
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* Scale requested baud rate for 22.1184 MHz clock
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*/
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(unsigned32)Console_Port_Tbl[minor].pDeviceParams/=3;
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#endif
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/*
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* In order to maintain maximum data rate accuracy, we will
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* apply a div 4 here rather than in hardware (using MCR bit 7).
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*/
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(unsigned32)Console_Port_Tbl[minor].pDeviceParams/=4;
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return(TRUE);
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}
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static boolean config_z85c30_probe(int minor)
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{
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/*
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* PPC1 and PPC1a do not have this device
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*/
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if((ucSystemType==SYS_TYPE_PPC1) ||
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(ucSystemType==SYS_TYPE_PPC1a))
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{
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return (FALSE);
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}
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/*
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* All other boards supported by this BSP have the z85c30 device
|
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*/
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/*
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* Ensure that CIO port B is configured for
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* default driver enable
|
||||
*/
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outport_byte(0x861, 0x33);
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return(TRUE);
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||||
}
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||||
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||||
Reference in New Issue
Block a user