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2007-11-03 Ray Xu <rayx.cn@gmail.com>

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*lpc22xx/irq/bsp_irq_asm.S: Add veneer for ARM<->Thumb
        lpc22xx/irq/bsp_irq_init.c: add VIC address init
This commit is contained in:
Joel Sherrill
2007-11-06 22:54:21 +00:00
parent e15aa41e9c
commit 5a364be362
3 changed files with 32 additions and 13 deletions
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4
c/src/lib/libcpu/arm/ChangeLog
View File

@@ -1,3 +1,7 @@
2007-11-03 Ray Xu <rayx.cn@gmail.com>
*lpc22xx/irq/bsp_irq_asm.S: Add veneer for ARM<->Thumb
lpc22xx/irq/bsp_irq_init.c: add VIC address init
2007-10-05 Ray Xu <xr@trasin.net>
* lpc22xx/clock/clockdrv.c, lpc22xx/irq/irq.c, lpc22xx/irq/irq.h: Now

35
c/src/lib/libcpu/arm/lpc22xx/irq/bsp_irq_asm.S
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@@ -17,9 +17,13 @@
* BSP specific interrupt handler for INT or FIQ. In here
* you do determine which interrupt happened and call its
* handler.
* Called from ISR_Handler, It is better to write in C function
*/
.globl ExecuteITHandler
ExecuteITHandler :
#ifdef __thumb__
.code 16
#endif
/*
* Look at interrupt status register to determine source.
@@ -28,19 +32,30 @@ ExecuteITHandler :
*/
ldr r0, =0xFFFFF030 /* Read the vector number */
ldr r1, [r0]
/* find the ISR's address based on the vector VICVectAddr0 */
/*ldr r0, =0xFFFFF100*/
/*ldr r0, [r0, r1, LSL #2]*/ /* Read the address */
ldr r0, [r0]
#ifdef __thumb__
push {lr}
ldr r2, =IRQ_return /* prepare the return from handler */
mov lr, r2
#else
stmdb sp!,{lr}
ldr lr, =IRQ_return /* prepare the return from handler */
#endif
mov pc, r1 /* EXECUTE INT HANDLER */
/*C code will be called*/
mov pc, r0 /* EXECUTE INT HANDLER */
/*
* C code may come back from Thumb if --thumb-interwork flag is False
* Add some veneer to make sure that code back to ARM
*/
IRQ_return:
ldmia sp!,{lr}
#ifdef __thumb__
pop {r1}
bx r1
#else
ldmia sp!,{r1}
mov pc, r1
#endif
mov pc, lr

6
c/src/lib/libcpu/arm/lpc22xx/irq/bsp_irq_init.c
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@@ -1,6 +1,6 @@
/*
* Motorola LPC22XX/LPC21xx Interrupt handler
* Modified by Ray 2006 <rayx.cn@gmail.com> to support LPC ARM
* NXP/Philips LPC22XX/LPC21xx Interrupt handler
* Ray 2007 <rayx.cn@gmail.com> to support LPC ARM
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
*
@@ -66,6 +66,6 @@ void BSP_rtems_irq_mngt_init()
*/
VICProtection = 0;
VICIntSelect = 0;
VICVectAddr = 0;
}