forked from Imagelibrary/rtems
leon, grspw_router: Changed driver C API
SMP safe by spin-lock protection and semaphore. On spin-lock per SpW/AMBA port to allow multiple parallel register operations per port. A common semaphore for general SpW router configuration such as routing table. Move to a C API instead of using the I/O Manager. The SpW router driver does not perform any I/O only management of the router. Update #2355.
This commit is contained in:
Javier Jalle
committed by
Daniel Hellstrom
Daniel Hellstrom
parent
631f711598
commit
59af2cc58e
@@ -1,7 +1,7 @@
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/*
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/*
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* GRSPW ROUTER APB-Register Driver.
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* GRSPW ROUTER APB-Register Driver.
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*
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*
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* COPYRIGHT (c) 2010.
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* COPYRIGHT (c) 2010-2017.
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* Cobham Gaisler AB.
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* Cobham Gaisler AB.
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*
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*
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* The license and distribution terms for this file may be
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* The license and distribution terms for this file may be
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@@ -12,17 +12,44 @@
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#ifndef __GRSPW_ROUTER_H__
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#ifndef __GRSPW_ROUTER_H__
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#define __GRSPW_ROUTER_H__
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#define __GRSPW_ROUTER_H__
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Maximum number of ROUTER devices supported by driver */
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#define ROUTER_MAX 2
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#define ROUTER_ERR_OK 0
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#define ROUTER_ERR_EINVAL -1
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#define ROUTER_ERR_ERROR -2
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#define ROUTER_ERR_TOOMANY -3
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#define ROUTER_ERR_IMPLEMENTED -4
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/* Hardware Information */
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/* Hardware Information */
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struct router_hw_info {
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struct router_hw_info {
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unsigned char nports_spw;
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uint8_t nports_spw;
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unsigned char nports_amba;
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uint8_t nports_amba;
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unsigned char nports_fifo;
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uint8_t nports_fifo;
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char timers_avail;
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int8_t srouting;
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char pnp_avail;
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int8_t pnp_enable;
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unsigned char ver_major;
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int8_t timers_avail;
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unsigned char ver_minor;
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int8_t pnp_avail;
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unsigned char ver_patch;
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uint8_t ver_major;
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unsigned char iid;
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uint8_t ver_minor;
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uint8_t ver_patch;
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uint8_t iid;
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/* Router capabilities */
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uint8_t amba_port_fifo_size;
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uint8_t spw_port_fifo_size;
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uint8_t rmap_maxdlen;
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int8_t aux_async;
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int8_t aux_dist_int_support;
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int8_t dual_port_support;
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int8_t dist_int_support;
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int8_t spwd_support;
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uint8_t pktcnt_support;
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uint8_t charcnt_support;
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};
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};
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#define ROUTER_FLG_CFG 0x01
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#define ROUTER_FLG_CFG 0x01
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@@ -33,75 +60,280 @@ struct router_hw_info {
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#define ROUTER_FLG_ALL 0x1f /* All Above Flags */
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#define ROUTER_FLG_ALL 0x1f /* All Above Flags */
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struct router_config {
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struct router_config {
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unsigned int flags; /* Determine what configuration should be updated */
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uint32_t flags; /* Determine what configuration should be updated */
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/* Router Configuration Register */
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/* Router Configuration Register */
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unsigned int config;
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uint32_t config;
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/* Set Instance ID */
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/* Set Instance ID */
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unsigned char iid;
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uint8_t iid;
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/* SpaceWire Link Initialization Clock Divisor */
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/* SpaceWire Link Initialization Clock Divisor */
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unsigned char idiv;
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uint8_t idiv;
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/* Timer Prescaler and Reload */
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/* Timer Prescaler */
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unsigned int timer_prescaler;
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uint32_t timer_prescaler;
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unsigned int timer_reload[32];
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};
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};
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/* Logical routing table */
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/* Routing table address control */
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struct router_routes {
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struct router_route_acontrol {
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unsigned int route[224];
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uint32_t control[31];
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uint32_t control_logical[224];
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};
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};
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/* Port Setup, see register definitions for "Port setup register" */
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/* Routing table port mapping */
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struct router_ps {
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struct router_route_portmap {
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unsigned int ps[31]; /* Port Setup for ports 1-31 */
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uint32_t pmap[31]; /* Port Setup for ports 1-31 */
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unsigned int ps_logical[224]; /* Port setup for locgical addresses 32-255 */
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uint32_t pmap_logical[224]; /* Port setup for locgical addresses 32-255 */
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};
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/* Routing table */
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#define ROUTER_ROUTE_FLG_MAP 0x01
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#define ROUTER_ROUTE_FLG_CTRL 0x02
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#define ROUTER_ROUTE_FLG_ALL 0x3 /* All Above Flags */
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struct router_routing_table {
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uint32_t flags; /* Determine what configuration should be updated */
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struct router_route_acontrol acontrol;
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struct router_route_portmap portmap;
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};
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};
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/* Set/Get Port Control/Status */
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/* Set/Get Port Control/Status */
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#define ROUTER_PORTFLG_SET_CTRL 0x01
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#define ROUTER_PORT_FLG_SET_CTRL 0x01
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#define ROUTER_PORTFLG_GET_CTRL 0x02
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#define ROUTER_PORT_FLG_GET_CTRL 0x02
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#define ROUTER_PORTFLG_SET_STS 0x04
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#define ROUTER_PORT_FLG_SET_STS 0x04
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#define ROUTER_PORTFLG_GET_STS 0x08
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#define ROUTER_PORT_FLG_GET_STS 0x08
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#define ROUTER_PORT_FLG_SET_CTRL2 0x10
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#define ROUTER_PORT_FLG_GET_CTRL2 0x20
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#define ROUTER_PORT_FLG_SET_TIMER 0x40
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#define ROUTER_PORT_FLG_GET_TIMER 0x80
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#define ROUTER_PORT_FLG_SET_PKTLEN 0x100
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#define ROUTER_PORT_FLG_GET_PKTLEN 0x200
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struct router_port {
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struct router_port {
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unsigned int flag;
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uint32_t flag;
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int port;
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/* Port control */
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unsigned int ctrl;
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uint32_t ctrl;
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unsigned int sts;
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/* Port status */
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uint32_t sts;
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/* Port control 2 */
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uint32_t ctrl2;
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/* Timer Reload */
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uint32_t timer_reload;
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/* Maximum packet length */
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uint32_t packet_length;
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};
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};
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/* Get Hardware support/information available */
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#define GRSPWR_IOCTL_HWINFO 0x01 /* OUT: struct router_hw_info */
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/* Router Configuration */
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#define GRSPWR_IOCTL_CFG_SET 0x02 /* IN: struct router_config */
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#define GRSPWR_IOCTL_CFG_GET 0x03 /* OUT: struct router_config */
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/* Routes */
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#define GRSPWR_IOCTL_ROUTES_SET 0x04 /* IN: struct router_routes */
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#define GRSPWR_IOCTL_ROUTES_GET 0x05 /* OUT: struct router_routes */
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/* Port Setup */
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#define GRSPWR_IOCTL_PS_SET 0x06 /* IN: struct router_ps */
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#define GRSPWR_IOCTL_PS_GET 0x07 /* OUT: struct router_ps */
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/* Set configuration write enable */
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#define GRSPWR_IOCTL_WE_SET 0x08 /* INT: int */
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/* Set/Get Port Control/Status */
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#define GRSPWR_IOCTL_PORT 0x09 /* IN/OUT: struct router_port */
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/* Set Router Configuration/Status Register */
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#define GRSPWR_IOCTL_CFGSTS_SET 0x0a /* IN: unsigned int */
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/* Get Router Configuration/Status Register */
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#define GRSPWR_IOCTL_CFGSTS_GET 0x0b /* OUT: unsigned int */
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/* Get Current Time-Code Register */
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#define GRSPWR_IOCTL_TC_GET 0x0c /* OUT: unsigned int */
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/* Register GRSPW Router driver to Driver Manager */
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/* Register GRSPW Router driver to Driver Manager */
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void router_register_drv(void);
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void router_register_drv(void);
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extern void *router_open(unsigned int dev_no);
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extern int router_close(void *d);
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extern int router_print(void *d);
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extern int router_hwinfo_get(void *d, struct router_hw_info *hwinfo);
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/* Router general config */
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extern int router_config_set(void *d, struct router_config *cfg);
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extern int router_config_get(void *d, struct router_config *cfg);
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/* Routing table config */
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extern int router_routing_table_set(void *d,
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struct router_routing_table *cfg);
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extern int router_routing_table_get(void *d,
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struct router_routing_table *cfg);
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/* Router Set/Get Port configuration */
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extern int router_port_ioc(void *d, int port, struct router_port *cfg);
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/* Read Port Control register */
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extern int router_port_ctrl_get(void *d, int port, uint32_t *ctrl);
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/* Read Port Control2 register */
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extern int router_port_ctrl2_get(void *d, int port, uint32_t *ctrl2);
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/* Write Port Control Register */
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extern int router_port_ctrl_set(void *d, int port, uint32_t ctrl);
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/* Write Port Control2 Register */
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extern int router_port_ctrl2_set(void *d, int port, uint32_t ctrl2);
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/* Set Timer Reload Value for a specific port */
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extern int router_port_treload_set(void *d, int port, uint32_t reload);
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/* Get Timer Reload Value for a specific port */
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extern int router_port_treload_get(void *d, int port, uint32_t *reload);
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/* Get Maximum packet length for a specific port */
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extern int router_port_maxplen_get(void *d, int port, uint32_t *length);
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/* Set Maximum packet length for a specific port */
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extern int router_port_maxplen_set(void *d, int port, uint32_t length);
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/* Check Port Status register and clear errors if there are */
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extern int router_port_status(void *d, int port, uint32_t *sts);
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#define ROUTER_LINK_STATUS_ERROR_RESET 0
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#define ROUTER_LINK_STATUS_ERROR_WAIT 1
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#define ROUTER_LINK_STATUS_READY 2
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#define ROUTER_LINK_STATUS_STARTED 3
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#define ROUTER_LINK_STATUS_CONNECTING 4
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#define ROUTER_LINK_STATUS_RUN_STATE 5
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/* Get Link status */
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extern int router_port_link_status(void *d, int port);
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/* Operate a Link */
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extern int router_port_enable(void *d, int port);
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extern int router_port_disable(void *d, int port);
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extern int router_port_link_stop(void *d, int port);
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extern int router_port_link_start(void *d, int port);
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extern int router_port_link_receive_spill(void *d, int port);
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extern int router_port_link_transmit_reset(void *d, int port);
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/* Get port credit counter register */
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extern int router_port_cred_get(void *d, int port, uint32_t *cred);
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/*
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* ROUTER RTACTRL register fields
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*/
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#define RTACTRL_SR (0x1 << RTACTRL_SR_BIT)
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#define RTACTRL_EN (0x1 << RTACTRL_EN_BIT)
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#define RTACTRL_PR (0x1 << RTACTRL_PR_BIT)
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#define RTACTRL_HD (0x1 << RTACTRL_HD_BIT)
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#define RTACTRL_SR_BIT 3
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#define RTACTRL_EN_BIT 2
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#define RTACTRL_PR_BIT 1
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#define RTACTRL_HD_BIT 0
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/* Individual route modification */
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#define ROUTER_ROUTE_PACKETDISTRIBUTION_ENABLE (0x1 << 16)
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#define ROUTER_ROUTE_PACKETDISTRIBUTION_DISABLE (0x0 << 16)
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#define ROUTER_ROUTE_SPILLIFNOTREADY_ENABLE RTACTRL_SR
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#define ROUTER_ROUTE_SPILLIFNOTREADY_DISABLE 0
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#define ROUTER_ROUTE_ENABLE RTACTRL_EN
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#define ROUTER_ROUTE_DISABLE 0
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#define ROUTER_ROUTE_PRIORITY_HIGH RTACTRL_PR
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#define ROUTER_ROUTE_PRIORITY_LOW 0
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#define ROUTER_ROUTE_HEADERDELETION_ENABLE RTACTRL_HD
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#define ROUTER_ROUTE_HEADERDELETION_DISABLE 0
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struct router_route {
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uint8_t from_address;
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uint8_t to_port[32];
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int count;
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int options;
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};
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extern int router_route_set(void *d, struct router_route *route);
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extern int router_route_get(void *d, struct router_route *route);
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/* Router configuration port write enable */
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extern int router_write_enable(void *d);
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extern int router_write_disable(void *d);
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/* Router reset */
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extern int router_reset(void *d);
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/* Set Instance ID */
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extern int router_instance_set(void *d, uint8_t iid);
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/* Get Instance ID */
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extern int router_instance_get(void *d, uint8_t *iid);
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/* Set SpaceWire Link Initialization Clock Divisor */
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extern int router_idiv_set(void *d, uint8_t idiv);
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/* Get SpaceWire Link Initialization Clock Divisor */
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extern int router_idiv_get(void *d, uint8_t *idiv);
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/* Set Timer Prescaler */
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extern int router_tpresc_set(void *d, uint32_t prescaler);
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/* Get Timer Prescaler */
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extern int router_tpresc_get(void *d, uint32_t *prescaler);
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/* Set/get Router configuration */
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extern int router_cfgsts_set(void *d, uint32_t cfgsts);
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extern int router_cfgsts_get(void *d, uint32_t *cfgsts);
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/* Router timecode */
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extern int router_tc_enable(void *d);
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extern int router_tc_disable(void *d);
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extern int router_tc_reset(void *d);
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extern int router_tc_get(void *d);
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/* Router Interrupts */
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/*
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* ROUTER IMASK register fields
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*/
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#define IMASK_PE (0x1 << IMASK_PE_BIT)
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#define IMASK_SR (0x1 << IMASK_SR_BIT)
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#define IMASK_RS (0x1 << IMASK_RS_BIT)
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#define IMASK_TT (0x1 << IMASK_TT_BIT)
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#define IMASK_PL (0x1 << IMASK_PL_BIT)
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#define IMASK_TS (0x1 << IMASK_TS_BIT)
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#define IMASK_AC (0x1 << IMASK_AC_BIT)
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#define IMASK_RE (0x1 << IMASK_RE_BIT)
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#define IMASK_IA (0x1 << IMASK_IA_BIT)
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#define IMASK_LE (0x1 << IMASK_LE_BIT)
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#define IMASK_ME (0x1 << IMASK_ME_BIT)
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#define IMASK_ALL ( IMASK_PE | IMASK_SR | IMASK_RS | IMASK_TT \
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IMASK_PL | IMASK_TS | IMASK_AC | IMASK_RE | IMASK_IA \
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IMASK_LE | IMASK_ME)
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#define IMASK_PE_BIT 10
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#define IMASK_SR_BIT 9
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#define IMASK_RS_BIT 8
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#define IMASK_TT_BIT 7
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#define IMASK_PL_BIT 6
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#define IMASK_TS_BIT 5
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#define IMASK_AC_BIT 4
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#define IMASK_RE_BIT 3
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#define IMASK_IA_BIT 2
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#define IMASK_LE_BIT 1
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#define IMASK_ME_BIT 0
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#define ROUTER_INTERRUPT_ALL IMASK_ALL
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#define ROUTER_INTERRUPT_SPWPNP_ERROR IMASK_PE
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#define ROUTER_INTERRUPT_SPILLED IMASK_SR
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#define ROUTER_INTERRUPT_RUNSTATE IMASK_RS
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#define ROUTER_INTERRUPT_TC_TRUNCATION IMASK_TT
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#define ROUTER_INTERRUPT_PACKET_TRUNCATION IMASK_PL
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#define ROUTER_INTERRUPT_TIMEOUT IMASK_TS
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#define ROUTER_INTERRUPT_CFGPORT IMASK_AC
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#define ROUTER_INTERRUPT_RMAP_ERROR IMASK_RE
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#define ROUTER_INTERRUPT_INVALID_ADDRESS IMASK_IA
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#define ROUTER_INTERRUPT_LINK_ERROR IMASK_LE
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#define ROUTER_INTERRUPT_MEMORY_ERROR IMASK_ME
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extern int router_port_interrupt_unmask(void *d, int port);
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||||||
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extern int router_port_interrupt_mask(void *d, int port);
|
||||||
|
extern int router_interrupt_unmask(void *d, int options);
|
||||||
|
extern int router_interrupt_mask(void *d, int options);
|
||||||
|
|
||||||
|
/* Router Interrupt code generation */
|
||||||
|
/*
|
||||||
|
* ROUTER ICODEGEN register fields
|
||||||
|
*/
|
||||||
|
#define ICODEGEN_UA (0x1 << ICODEGEN_UA_BIT)
|
||||||
|
#define ICODEGEN_AH (0x1 << ICODEGEN_AH_BIT)
|
||||||
|
#define ICODEGEN_IT (0x1 << ICODEGEN_IT_BIT)
|
||||||
|
#define ICODEGEN_TE (0x1 << ICODEGEN_TE_BIT)
|
||||||
|
#define ICODEGEN_EN (0x1 << ICODEGEN_EN_BIT)
|
||||||
|
#define ICODEGEN_IN (0x1f << ICODEGEN_IN_BIT)
|
||||||
|
|
||||||
|
#define ICODEGEN_UA_BIT 20
|
||||||
|
#define ICODEGEN_AH_BIT 19
|
||||||
|
#define ICODEGEN_IT_BIT 18
|
||||||
|
#define ICODEGEN_TE_BIT 17
|
||||||
|
#define ICODEGEN_EN_BIT 16
|
||||||
|
#define ICODEGEN_IN_BIT 0
|
||||||
|
|
||||||
|
#define ROUTER_ICODEGEN_ITYPE_EDGE ICODEGEN_IT
|
||||||
|
#define ROUTER_ICODEGEN_ITYPE_LEVEL 0
|
||||||
|
#define ROUTER_ICODEGEN_AUTOUNACK_ENABLE ICODEGEN_UA
|
||||||
|
#define ROUTER_ICODEGEN_AUTOUNACK_DISABLE 0
|
||||||
|
#define ROUTER_ICODEGEN_AUTOACK_ENABLE ICODEGEN_AH
|
||||||
|
#define ROUTER_ICODEGEN_AUTOACK_DISABLE 0
|
||||||
|
extern int router_icodegen_enable(void *d, uint8_t intn, uint32_t aitimer,
|
||||||
|
int options);
|
||||||
|
extern int router_icodegen_disable(void *d);
|
||||||
|
|
||||||
|
/* Router interrupt change timers */
|
||||||
|
extern int router_isrctimer_set(void *d, uint32_t reloadvalue);
|
||||||
|
extern int router_isrctimer_get(void *d, uint32_t *reloadvalue);
|
||||||
|
|
||||||
|
/* Router interrupt timers */
|
||||||
|
extern int router_isrtimer_set(void *d, uint32_t reloadvalue);
|
||||||
|
extern int router_isrtimer_get(void *d, uint32_t *reloadvalue);
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|||||||
File diff suppressed because it is too large
Load Diff
Reference in New Issue
Block a user