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arm/bsps: CP15 and basic cache support entire cache clean for more architecture variants now.

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Next cache operations should work on most of cores now

  rtems_cache_flush_entire_data()
  rtems_cache_invalidate_entire_data()
  rtems_cache_invalidate_entire_instruction()

Instruction cache invalidate works on the first level for now only.
Data cacache operations are extended to ensure flush/invalidate
on all cache levels.

The CP15 arm_cp15_data_cache_clean_all_levels() function extended
to continue through unified levels too (ctype = 4).
This commit is contained in:
Pavel Pisa
2016-07-17 19:31:33 +02:00
parent 3338121832
commit 577e7fb337
3 changed files with 66 additions and 6 deletions
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44
c/src/lib/libcpu/arm/shared/include/arm-cp15.h
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@@ -1071,8 +1071,8 @@ arm_cp15_data_cache_invalidate_all_levels(void)
for (level = 0; level < loc; ++level) {
uint32_t ctype = arm_clidr_get_cache_type(clidr, level);
/* Check if this level has a data cache */
if ((ctype & 0x2) != 0) {
/* Check if this level has a data cache or unified cache */
if (((ctype & (0x6)) == 2) || (ctype == 4)) {
uint32_t ccsidr;
uint32_t line_power;
uint32_t associativity;
@@ -1133,6 +1133,46 @@ arm_cp15_data_cache_clean_line_by_set_and_way(uint32_t set_and_way)
);
}
ARM_CP15_TEXT_SECTION static inline void
arm_cp15_data_cache_clean_all_levels(void)
{
uint32_t clidr = arm_cp15_get_cache_level_id();
uint32_t loc = arm_clidr_get_level_of_coherency(clidr);
uint32_t level = 0;
for (level = 0; level < loc; ++level) {
uint32_t ctype = arm_clidr_get_cache_type(clidr, level);
/* Check if this level has a data cache or unified cache */
if (((ctype & (0x6)) == 2) || (ctype == 4)) {
uint32_t ccsidr;
uint32_t line_power;
uint32_t associativity;
uint32_t way;
uint32_t way_shift;
ccsidr = arm_cp15_get_cache_size_id_for_level(level << 1);
line_power = arm_ccsidr_get_line_power(ccsidr);
associativity = arm_ccsidr_get_associativity(ccsidr);
way_shift = __builtin_clz(associativity - 1);
for (way = 0; way < associativity; ++way) {
uint32_t num_sets = arm_ccsidr_get_num_sets(ccsidr);
uint32_t set;
for (set = 0; set < num_sets; ++set) {
uint32_t set_way = (way << way_shift)
| (set << line_power)
| (level << 1);
arm_cp15_data_cache_clean_line_by_set_and_way(set_way);
}
}
}
}
}
ARM_CP15_TEXT_SECTION static inline void
arm_cp15_data_cache_test_and_clean(void)
{