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This is the initial addition of the port of RTEMS to the

Browse Source 
Hitachi H8 family.  This port was done by Philip Quaife
<philip@qs.co.nz> of Q Solutions and sponsored by
Comnet Technologies Ltd.  The port was done based on RTEMS 3.5.1
to a Hitach H8300H.  The port was updated to RTEMS 4.5 style
Makefiles/configure by Joel Sherrill <joel@OARcorp.com>.
While doing this Joel added support for the h8300-rtems to
binutils, gcc, newlib, and gdb.

NOTE:  Philip submitted a BSP for a Hitachi evaluation board
which is being merged as a separate entity.
This commit is contained in:
Joel Sherrill
2000-06-29 23:00:48 +00:00
parent 7a30efd2b7
commit 5532553209
30 changed files with 4016 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
c/ACKNOWLEDGEMENTS
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@@ -182,6 +182,10 @@ The following persons/organizations have made contributions:
Technology for the National Research Council of Canada
submitted the RTEMS Cache Manager.
+ Philip Quaife <philip@qs.co.nz> of Q Solutions ported
RTEMS to the Hitachi H8300H. This effort was sponsored by
Comnet Technologies Ltd.
Finally, the RTEMS project would like to thank those who have contributed
to the other free software efforts which RTEMS utilizes. The primary RTEMS
development environment is from the Free Software Foundation (the GNU

10
c/TESTED
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@@ -10,7 +10,7 @@ RedHat Linux 5.1 as the host environment:
CPU CPU
FAMILY MODEL TARGET SUITES
======== ========= ======================= ===============
m66k mfc5200 no BSP (note 9)
m68k mfc5200 no BSP (note 9)
m68k m68000 efi68k (note 1)
m68k m68020 Motorola MVME136 (note 1, 6)
m68k m68030 Motorola MVME147 (note 1)
@@ -33,15 +33,20 @@ RedHat Linux 5.1 as the host environment:
i386 Pentium PC clone (pc586) (note 1, 6)
i386 i486 DJGPP/PC-AT (note 7)
i386 pentium DJGPP/PC-AT (note 7)
i960 i960ca i960sim (in gdb) (note 5)
i960 i960ca Cyclone CVME961 (note 4)
i960 i960ha no BSP (note 9)
i960 i960rp rxgen960 (note 1)
h8 h8300h no BSP (note 9)
h8 h8300s no BSP (note 9)
h8 h8300 BUILDS - NEEDS WORK
hppa hppa7100 simhppa (note 1)
mips idt4600 p4000 (note 1)
mips idt4650 p4000 (note 1)
powerpc ppc403 helas403 (note 1, 6)
powerpc ppc403 Papyrus (note 1)
powerpc ppc403 psim (note 5)
powerpc ppc5xx BUILDS - NEEDS WORK
powerpc ppc403 psim (in gdb) (note 5)
powerpc ppc603e Radstone PPCn_60x (note 1, 8)
powerpc ppc603e DY-4 DMV-177 (note 1)
powerpc ppc603e Vista Score603e (note 1)
@@ -49,6 +54,7 @@ RedHat Linux 5.1 as the host environment:
powerpc mpc750 Motorola MCP750 (note 1)
powerpc mpc821 no BSP (note 9)
powerpc mpc823 no BSP (note 9)
powerpc mpc850 no BSP (note 9)
powerpc mpc860 eth_comm (custom) (note 1, 6)
sh sh7032 generic sh1 (note 1)
sh sh7035 generic sh2 (note 1)

13
c/src/exec/score/cpu/h8300/.cvsignore Normal file
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@@ -0,0 +1,13 @@
Makefile
Makefile.in
aclocal.m4
config.cache
config.guess
config.log
config.status
config.sub
configure
depcomp
install-sh
missing
mkinstalldirs

49
c/src/exec/score/cpu/h8300/Makefile.am Normal file
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@@ -0,0 +1,49 @@
##
## $Id$
##
AUTOMAKE_OPTIONS = foreign 1.4
ACLOCAL_AMFLAGS = -I $(RTEMS_TOPdir)/aclocal
SUBDIRS = rtems
C_FILES = cpu.c rtems.c
C_O_FILES = $(C_FILES:%.c=$(ARCH)/%.o)
H_FILES = asm.h
S_FILES = cpu_asm.S
S_O_FILES = $(S_FILES:%.S=$(ARCH)/%.o)
REL = $(ARCH)/rtems-cpu.rel
include $(RTEMS_ROOT)/make/custom/@RTEMS_BSP@.cfg
include $(top_srcdir)/../../../../../../automake/lib.am
rtems_cpu_rel_OBJECTS = $(C_O_FILES) $(S_O_FILES)
$(PROJECT_INCLUDE):
$(mkinstalldirs) $@
$(PROJECT_INCLUDE)/%.h: %.h
$(INSTALL_DATA) $< $@
$(PROJECT_RELEASE)/lib/rtems$(LIB_VARIANT).o: $(ARCH)/rtems.o
$(INSTALL_DATA) $< $@
$(REL): $(rtems_cpu_rel_OBJECTS)
$(make-rel)
PREINSTALL_FILES += $(PROJECT_INCLUDE) $(H_FILES:%=$(PROJECT_INCLUDE)/%)
TMPINSTALL_FILES += $(PROJECT_RELEASE)/lib/rtems$(LIB_VARIANT).o
all-local: $(ARCH) $(PREINSTALL_FILES) $(rtems_cpu_rel_OBJECTS) $(REL) \
$(TMPINSTALL_FILES)
.PRECIOUS: $(REL)
EXTRA_DIST = asm.h cpu.c cpu_asm.S rtems.c
include $(top_srcdir)/../../../../../../automake/subdirs.am
include $(top_srcdir)/../../../../../../automake/local.am

31
c/src/exec/score/cpu/h8300/README Normal file
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@@ -0,0 +1,31 @@
#
# $Id$
#
This port was done by Philip Quaife <philip@qs.co.nz> of Q Solutions
using RTEMS 3.5.1 under DOS and Hiview. Philip used an H8300H
to develop and test this port.
It was updated to 4.5 and merged into the main development trunk
by Joel Sherrill <joel@OARcorp.com>. As part of the merger, the
port was made to conditionally compile for the H8, H8300H, and H8300S
series.
The status of each CPU subfamily is as follows.
H8 - Although RTEMS compiles with for these CPUs, it does not
truly support them. All code that will not work on these
CPUs is conditionally disabled. These CPUs have a 16-bit
address space. Thus although a port is technically
feasible, some work will to be performed on RTEMS to
further minimize its footprint and address pointer
manipulation issues.
H8H - Port was developed on this class of H8 so there should be
no problems.
H8S - Port should work on this class of H8 but it is untested.
--joel
28 June 2000

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c/src/exec/score/cpu/h8300/asm.h Normal file
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@@ -0,0 +1,123 @@
/* asm.h
*
* This include file attempts to address the problems
* caused by incompatible flavors of assemblers and
* toolsets. It primarily addresses variations in the
* use of leading underscores on symbols and the requirement
* that register names be preceded by a %.
*
*
* NOTE: The spacing in the use of these macros
* is critical to them working as advertised.
*
* COPYRIGHT:
*
* This file is based on similar code found in newlib available
* from ftp.cygnus.com. The file which was used had no copyright
* notice. This file is freely distributable as long as the source
* of the file is noted. This file is:
*
*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#ifndef __H8300_CPU_ASM_h
#define __H8300_CPU_ASM_h
/*
* Indicate we are in an assembly file and get the basic CPU definitions.
*/
#define ASM
#include <rtems/score/h8300.h>
/*
* Recent versions of GNU cpp define variables which indicate the
* need for underscores and percents. If not using GNU cpp or
* the version does not support this, then you will obviously
* have to define these as appropriate.
*/
#ifndef __USER_LABEL_PREFIX__
#define __USER_LABEL_PREFIX__ _
#endif
#ifndef __REGISTER_PREFIX__
#define __REGISTER_PREFIX__
#endif
/* ANSI concatenation macros. */
#define CONCAT1(a, b) CONCAT2(a, b)
#define CONCAT2(a, b) a ## b
/* Use the right prefix for global labels. */
#define SYM(x) CONCAT1 (__USER_LABEL_PREFIX__, x)
/* Use the right prefix for registers. */
#define REG(x) CONCAT1 (__REGISTER_PREFIX__, x)
/*
* define macros for all of the registers on this CPU
*
* EXAMPLE: #define d0 REG (d0)
*/
#define r0 REG(r0)
#define r1 REG(r1)
#define r2 REG(r2)
#define r3 REG(r3)
#define r4 REG(r4)
#define r5 REG(r5)
#define r6 REG(r6)
#define r7 REG(r7)
#define er0 REG(er0)
#define er1 REG(er1)
#define er2 REG(er2)
#define er3 REG(er3)
#define er4 REG(er4)
#define er5 REG(er5)
#define er6 REG(er6)
#define er7 REG(er7)
#define sp REG(sp)
/*
* Define macros to handle section beginning and ends.
*/
#define BEGIN_CODE_DCL .text
#define END_CODE_DCL
#define BEGIN_DATA_DCL .data
#define END_DATA_DCL
#define BEGIN_CODE asm ( ".text
#define END_CODE ");
#define BEGIN_DATA
#define END_DATA
#define BEGIN_BSS
#define END_BSS
#define END
/*
* Following must be tailor for a particular flavor of the C compiler.
* They may need to put underscores in front of the symbols.
*/
#define PUBLIC(sym) .globl SYM (sym)
#define EXTERN(sym) .globl SYM (sym)
#endif
/* end of include file */
asm( \".h8300h\" );

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c/src/exec/score/cpu/h8300/configure.in Normal file
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@@ -0,0 +1,34 @@
dnl Process this file with autoconf to produce a configure script.
dnl
dnl $Id$
AC_PREREQ(2.13)
AC_INIT(cpu_asm.S)
RTEMS_TOP(../../../../../..)
AC_CONFIG_AUX_DIR(../../../../../..)
RTEMS_CANONICAL_TARGET_CPU
AM_INIT_AUTOMAKE(rtems-c-src-exec-score-cpu-h8300,$RTEMS_VERSION,no)
AM_MAINTAINER_MODE
RTEMS_ENV_RTEMSBSP
RTEMS_CHECK_CPU
RTEMS_CANONICAL_HOST
RTEMS_PROJECT_ROOT
RTEMS_PROG_CC_FOR_TARGET
RTEMS_CANONICALIZE_TOOLS
RTEMS_CHECK_NEWLIB
# Check if there is custom/*.cfg for this BSP
RTEMS_CHECK_CUSTOM_BSP(RTEMS_BSP)
# Explicitly list all Makefiles here
AC_OUTPUT(
Makefile
rtems/Makefile
rtems/score/Makefile)

174
c/src/exec/score/cpu/h8300/cpu.c Normal file
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@@ -0,0 +1,174 @@
/*
* Hitachi H8300 CPU Dependent Source
*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#include <rtems/system.h>
#include <rtems/score/isr.h>
#include <rtems/score/wkspace.h>
/* _CPU_Initialize
*
* This routine performs processor dependent initialization.
*
* INPUT PARAMETERS:
* cpu_table - CPU table to initialize
* thread_dispatch - address of disptaching routine
*/
void _CPU_Initialize(
rtems_cpu_table *cpu_table,
void (*thread_dispatch) /* ignored on this CPU */
)
{
/*
* The thread_dispatch argument is the address of the entry point
* for the routine called at the end of an ISR once it has been
* decided a context switch is necessary. On some compilation
* systems it is difficult to call a high-level language routine
* from assembly. This allows us to trick these systems.
*
* If you encounter this problem save the entry point in a CPU
* dependent variable.
*/
_CPU_Thread_dispatch_pointer = thread_dispatch;
/*
* If there is not an easy way to initialize the FP context
* during Context_Initialize, then it is usually easier to
* save an "uninitialized" FP context here and copy it to
* the task's during Context_Initialize.
*/
/* FP context initialization support goes here */
_CPU_Table = *cpu_table;
}
/*PAGE
*
* _CPU_ISR_Get_level
*
* This routine returns the current interrupt level.
*/
unsigned32 _CPU_ISR_Get_level( void )
{
unsigned int _ccr;
#if defined(__H8300__)
#warning "How do we get ccr on base CPU models"
#else
asm volatile ( "stc ccr, %0" : "=m" (_ccr) : );
#endif
if ( _ccr & 0x80 )
return 1;
return 0;
}
/*PAGE
*
* _CPU_ISR_install_raw_handler
*/
void _CPU_ISR_install_raw_handler(
unsigned32 vector,
proc_ptr new_handler,
proc_ptr *old_handler
)
{
/*
* This is where we install the interrupt handler into the "raw" interrupt
* table used by the CPU to dispatch interrupt handlers.
* Use Debug level IRQ Handlers
*/
H8BD_Install_IRQ(vector,new_handler,old_handler);
}
/*PAGE
*
* _CPU_ISR_install_vector
*
* This kernel routine installs the RTEMS handler for the
* specified vector.
*
* Input parameters:
* vector - interrupt vector number
* old_handler - former ISR for this vector number
* new_handler - replacement ISR for this vector number
*
* Output parameters: NONE
*
*/
void _CPU_ISR_install_vector(
unsigned32 vector,
proc_ptr new_handler,
proc_ptr *old_handler
)
{
*old_handler = _ISR_Vector_table[ vector ];
/*
* If the interrupt vector table is a table of pointer to isr entry
* points, then we need to install the appropriate RTEMS interrupt
* handler for this vector number.
*/
_CPU_ISR_install_raw_handler( vector, new_handler, old_handler );
/*
* We put the actual user ISR address in '_ISR_vector_table'. This will
* be used by the _ISR_Handler so the user gets control.
*/
_ISR_Vector_table[ vector ] = new_handler;
}
/*PAGE
*
* _CPU_Install_interrupt_stack
*/
void _CPU_Install_interrupt_stack( void )
{
}
/*PAGE
*
* _CPU_Thread_Idle_body
*
* NOTES:
*
* 1. This is the same as the regular CPU independent algorithm.
*
* 2. If you implement this using a "halt", "idle", or "shutdown"
* instruction, then don't forget to put it in an infinite loop.
*
* 3. Be warned. Some processors with onboard DMA have been known
* to stop the DMA if the CPU were put in IDLE mode. This might
* also be a problem with other on-chip peripherals. So use this
* hook with caution.
*/
#if 0
void _CPU_Thread_Idle_body( void )
{
for( ; ; )
IDLE_Monitor();
/*asm(" sleep \n"); */
/* insert your "halt" instruction here */ ;
}
#endif

226
c/src/exec/score/cpu/h8300/cpu_asm.S Normal file
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@@ -0,0 +1,226 @@
/*
* Hitachi H8 Score CPU functions
* Copyright Comnet Technologies Ltd 1999
*
* Based on example code and other ports with this copyright:
*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
;.equ RUNCONTEXT_ARG, er0
;.equ HEIRCONTEXT_ARG, er1
/*
* Make sure we tell the assembler what type of CPU model we are
* being compiled for.
*/
#if defined(__H8300H__)
.h8300h
#endif
#if defined(__H8300S__)
.h8300s
#endif
.text
/*
GCC Compiled with optimisations and Wimplicit decs to ensure
that stack from doesn't change
Supposedly R2 and R3 do not need to be saved but who knows
Arg1 = er0 (not on stack)
Arg2 = er1 (not on stack)
*/
.align 2
.global __CPU_Context_switch
__CPU_Context_switch:
#if defined(__H8300H__) || defined(__H8300S__)
/* Save Context */
stc ccr,@(0:16,er0)
mov.l er7,@(2:16,er0)
mov.l er6,@(6:16,er0)
mov.l er5,@(10:16,er0)
mov.l er4,@(14:16,er0)
mov.l er3,@(18:16,er0)
mov.l er2,@(22:16,er0)
/* Install New context */
restore:
mov.l @(22:16,er1),er2
mov.l @(18:16,er1),er3
mov.l @(14:16,er1),er4
mov.l @(10:16,er1),er5
mov.l @(6:16,er1),er6
mov.l @(2:16,er1),er7
ldc @(0:16,er1),ccr
#endif
rts
.align 2
.global __CPU_Context_restore
__CPU_Context_restore:
#if defined(__H8300H__) || defined(__H8300S__)
mov.l er0,er1
jmp @restore:24
#else
rts
#endif
/*
VHandler for Vectored Interrupts
All IRQ's are vectored to routine _ISR_#vector_number
This routine stacks er0 and loads er0 with vector number
before transferring to here
*/
.align 2
.global __ISR_Handler
.extern __ISR_Nest_level
.extern __Vector_table
.extern __Context_switch_necessary
__ISR_Handler:
#if defined(__H8300H__) || defined(__H8300S__)
mov.l er1,@-er7
mov.l er2,@-er7
mov.l er3,@-er7
mov.l er4,@-er7
mov.l er5,@-er7
mov.l er6,@-er7
/* Set IRQ Stack */
orc #0x80,ccr
mov.l er7,er6 ; save stack pointer
mov.l @__ISR_Nest_level,er1
bne nested
mov.l @__CPU_Interrupt_stack_high,er7
nested:
mov.l er6,@-er7 ; save sp so pop regardless of nest level
;; Inc system counters
mov.l @__ISR_Nest_level,er1
inc.l #1,er1
mov.l er1,@__ISR_Nest_level
mov.l @__Thread_Dispatch_disable_level,er1
inc.l #1,er1
mov.l er1,@__Thread_Dispatch_disable_level
/* Vector to ISR */
mov.l #__ISR_Vector_table,er1
mov er0,er2 ; copy vector
shll.l er2
shll.l er2 ; vector = vector * 4 (sizeof(int))
add.l er2,er1
mov.l @er1,er1
jsr @er1 ; er0 = arg1 =vector
orc #0x80,ccr
mov.l @__ISR_Nest_level,er1
dec.l #1,er1
mov.l er1,@__ISR_Nest_level
mov.l @__Thread_Dispatch_disable_level,er1
dec.l #1,er1
mov.l er1,@__Thread_Dispatch_disable_level
bne exit
mov.l @__Context_Switch_necessary,er1
bne bframe ; If yes then dispatch next task
mov.l @__ISR_Signals_to_thread_executing,er1
beq exit ; If no signals waiting
/* Context switch here through ISR_Dispatch */
bframe:
orc #0x80,ccr
/* Pop Stack */
mov @er7+,er6
mov er6,er7
mov.l #0,er2
mov.l er2,@__ISR_Signals_to_thread_executing
/* Set up IRQ stack frame and dispatch to _ISR_Dispatch */
stc ccr,@er2
and.l #0xff,er2
rotr.l er2
rotr.l er2
rotr.l er2
rotr.l er2
or.l #_ISR_Dispatch,er2
mov.l er2,@-er7
rte
/* Inner IRQ Return, pop flags and return */
exit:
/* Pop Stack */
orc #0x80,ccr
mov @er7+,er6
mov er6,er7
andc #0x7f,ccr
mov @er7+,er6
mov @er7+,er5
mov @er7+,er4
mov @er7+,er3
mov @er7+,er2
mov @er7+,er1
mov @er7+,er0
andc #0x7f,ccr
rte
#endif
/*
Called from ISR_Handler as a way of ending IRQ
but allowing dispatch to another task.
Must use RTE as CCR is still on stack but IRQ has been serviced.
CCR and PC occupy same word so rte can be used.
*/
.align 2
.global _ISR_Dispatch
_ISR_Dispatch:
#if defined(__H8300H__) || defined(__H8300S__)
jsr @__Thread_Dispatch
mov @er7+,er6
mov @er7+,er5
mov @er7+,er4
mov @er7+,er3
mov @er7+,er2
mov @er7+,er1
mov @er7+,er0
rte
#endif
.align 2
.global __CPU_Context_save_fp
__CPU_Context_save_fp:
rts
.align 2
.global __CPU_Context_restore_fp
__CPU_Context_restore_fp:
rts

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c/src/exec/score/cpu/h8300/rtems.c Normal file
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@@ -0,0 +1,44 @@
/* rtems.c ===> rtems.S or rtems.s
*
* This file contains the single entry point code for
* the XXX implementation of RTEMS.
*
* NOTE: This is supposed to be a .S or .s file NOT a C file.
*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
/*
* This is supposed to be an assembly file. This means that system.h
* and cpu.h should not be included in a "real" rtems file.
*/
#include <rtems/system.h>
#include <rtems/score/cpu.h>
/* #include "asm.h> */
/*
* RTEMS
*
* This routine jumps to the directive indicated in the
* CPU defined register. This routine is used when RTEMS is
* linked by itself and placed in ROM. This routine is the
* first address in the ROM space for RTEMS. The user "calls"
* this address with the directive arguments in the normal place.
* This routine then jumps indirectly to the correct directive
* preserving the arguments. The directive should not realize
* it has been "wrapped" in this way. The table "_Entry_points"
* is used to look up the directive.
*/
void RTEMS()
{
}

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c/src/exec/score/cpu/h8300/rtems/.cvsignore Normal file
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Makefile
Makefile.in

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c/src/exec/score/cpu/h8300/rtems/Makefile.am Normal file
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##
## $Id$
##
AUTOMAKE_OPTIONS = foreign 1.4
SUBDIRS = score
include $(top_srcdir)/../../../../../../automake/subdirs.am
include $(top_srcdir)/../../../../../../automake/local.am

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c/src/exec/score/cpu/h8300/rtems/score/.cvsignore Normal file
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Makefile
Makefile.in

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c/src/exec/score/cpu/h8300/rtems/score/Makefile.am Normal file
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##
## $Id$
##
AUTOMAKE_OPTIONS = foreign 1.4
H_FILES = cpu.h h8300.h h8300types.h
noinst_HEADERS = $(H_FILES)
#
# (OPTIONAL) Add local stuff here using +=
#
PREINSTALL_FILES += $(PROJECT_INCLUDE)/rtems/score \
$(H_FILES:%.h=$(PROJECT_INCLUDE)/rtems/score/%.h)
$(PROJECT_INCLUDE)/rtems/score:
$(mkinstalldirs) $@
$(PROJECT_INCLUDE)/rtems/score/%.h: %.h
$(INSTALL_DATA) $< $@
all-local: $(PREINSTALL_FILES)
include $(top_srcdir)/../../../../../../automake/local.am

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c/src/exec/score/cpu/h8300/rtems/score/cpu.h Normal file
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c/src/exec/score/cpu/h8300/rtems/score/h8300.h Normal file
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/* h8300.h
*
* This file contains information pertaining to the Hitachi H8/300
* processor family.
*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#ifndef _INCLUDE_H8300_h
#define _INCLUDE_H8300_h
#ifdef __cplusplus
extern "C" {
#endif
/*
* This file contains the information required to build
* RTEMS for a particular member of the "h8300"
* family when executing in protected mode. It does
* this by setting variables to indicate which implementation
* dependent features are present in a particular member
* of the family.
*/
/*
* RTEMS compiles for the base H8 with numerous warnings but has never
* been tested on a CPU with 16 bit address space.
*
* FIXME:
* This macro is defined to handle a couple of places where
* addresses are cast to pointers. There really should be
* a "int-pointer" type that pointers are cast to before being
* mathematcically manipulated. When that is added, search
* for all references to this macro and remove them.
*/
#if defined(__H8300__)
#define RTEMS_CPU_HAS_16_BIT_ADDRESSES 1
#endif
#define CPU_NAME "Hitachi H8300"
#define CPU_MODEL_NAME "h8300"
#define H8300_HAS_FPU 0
#ifdef __cplusplus
}
#endif
#endif
/* end of include file */

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/* h8300types.h
*
* This include file contains type definitions pertaining to the Hitachi
* h8300 processor family.
*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#ifndef __H8300_TYPES_h
#define __H8300_TYPES_h
#ifndef ASM
#ifdef __cplusplus
extern "C" {
#endif
/*
* This section defines the basic types for this processor.
*/
typedef unsigned char unsigned8; /* unsigned 8-bit integer */
typedef unsigned short unsigned16; /* unsigned 16-bit integer */
typedef unsigned long unsigned32; /* unsigned 32-bit integer */
typedef unsigned long long unsigned64; /* unsigned 64-bit integer */
typedef unsigned16 Priority_Bit_map_control;
typedef signed char signed8; /* 8-bit signed integer */
typedef signed short signed16; /* 16-bit signed integer */
typedef signed long signed32; /* 32-bit signed integer */
typedef signed long long signed64; /* 64 bit signed integer */
typedef unsigned32 boolean; /* Boolean value */
typedef float single_precision; /* single precision float */
typedef double double_precision; /* double precision float */
typedef void h8300_isr;
typedef void ( *h8300_isr_entry )( void );
#ifdef __cplusplus
}
#endif
#endif /* !ASM */
#endif
/* end of include file */

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/* h8300types.h
*
* This include file contains type definitions pertaining to the Hitachi
* h8300 processor family.
*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#ifndef __H8300_TYPES_h
#define __H8300_TYPES_h
#ifndef ASM
#ifdef __cplusplus
extern "C" {
#endif
/*
* This section defines the basic types for this processor.
*/
typedef unsigned char unsigned8; /* unsigned 8-bit integer */
typedef unsigned short unsigned16; /* unsigned 16-bit integer */
typedef unsigned long unsigned32; /* unsigned 32-bit integer */
typedef unsigned long long unsigned64; /* unsigned 64-bit integer */
typedef unsigned16 Priority_Bit_map_control;
typedef signed char signed8; /* 8-bit signed integer */
typedef signed short signed16; /* 16-bit signed integer */
typedef signed long signed32; /* 32-bit signed integer */
typedef signed long long signed64; /* 64 bit signed integer */
typedef unsigned32 boolean; /* Boolean value */
typedef float single_precision; /* single precision float */
typedef double double_precision; /* double precision float */
typedef void h8300_isr;
typedef void ( *h8300_isr_entry )( void );
#ifdef __cplusplus
}
#endif
#endif /* !ASM */
#endif
/* end of include file */