forked from Imagelibrary/rtems
Patch from Charles-Antoine Gauthier <charles.gauthier@iit.nrc.ca>.
to address m68k-rtemself for the MVME167.
Here is the rtems patch I promissed you a long time ago to enable ELF
with m68k. The target name I selected is m68k-rtemself. It preserves the
m68k-rtems COFF target, and is parterned after the other ELF/COFF dual
targets.
The mvme167.cfg file causes the -qelf flag to be used during compilation
if the name of the compiler contains rtemself. This flag is used in the
bsp_specs file to select the elflinkcmds file rather than the linkcmds
file. The former is for ELF, the latter for COFF.
Some patches are required to the mc68040 FPSP code. Some of the
assembler files contain instructions that were rejected by the
m68k-rtemself-as assembler. This is a minor bug in the m68k ELF
assembler, I think.
This commit is contained in:
@@ -7,16 +7,20 @@
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*cpp:
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%(old_cpp) %{qrtems: -D__embedded__} -Asystem(embedded)
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*endfile:
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crtend.o%s crtn.o%s
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*lib:
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%{!qrtems: %(old_lib)} %{qrtems: --start-group \
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%{!qrtems_debug: -lrtemsall} %{qrtems_debug: -lrtemsall_g} \
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-lc -lgcc --end-group \
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%{!qnolinkcmds: -T linkcmds%s}}
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%{!qelf: %{!qnolinkcmds: -T linkcmds%s}} %{qelf: %{!qnolinkcmd: -T
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elflinkcmds%s}}}
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*startfile:
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%{!qrtems: %(old_startfile)} %{qrtems: \
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%{!qrtems_debug: start.o%s} \
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%{qrtems_debug: start_g.o%s}}
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%{qrtems_debug: start_g.o%s} crti.o%s crtbegin.o%s}
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*link:
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%{!qrtems: %(old_link)} %{qrtems: -dc -dp -N -e start}
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@@ -23,7 +23,7 @@ C_O_FILES = $(C_PIECES:%=${ARCH}/%.o)
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H_FILES =
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SRCS = $(srcdir)/linkcmds $(C_FILES) $(H_FILES)
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SRCS = $(srcdir)/linkcmds $(srcdir)/elflinkcmds $(C_FILES) $(H_FILES)
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OBJS = $(C_O_FILES)
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include $(RTEMS_ROOT)/make/custom/@RTEMS_BSP@.cfg
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@@ -41,7 +41,9 @@ $(INSTALLDIRS):
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# (OPTIONAL) Add local stuff here using +=
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#
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DEFINES +=
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# USE_INIT_FINI tells main.c what C++ help we need.
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DEFINES += -DUSE_INIT_FINI
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CPPFLAGS +=
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CFLAGS +=
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@@ -64,6 +66,7 @@ ${PGM}: ${SRCS} ${OBJS}
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all: ${ARCH} $(SRCS) $(PGM)
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$(INSTALL_CHANGE) $(srcdir)/linkcmds $(PROJECT_RELEASE)/lib
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$(INSTALL_CHANGE) $(srcdir)/elflinkcmds $(PROJECT_RELEASE)/lib
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Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status
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cd $(top_builddir) \
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@@ -27,7 +27,7 @@ extern rtems_configuration_table BSP_Configuration;
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extern rtems_cpu_table Cpu_table;
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/* Initialize C++ global Ctor/Dtor and initializes exception handling. */
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#ifdef USE_INIT_FINI
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#if defined(USE_INIT_FINI)
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extern void _fini( void );
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extern void _init( void );
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#endif
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@@ -486,7 +486,7 @@ A9_str:
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fmovex (%a0),%fp0 //load X from memory
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fabsx %fp0 //use abs(X)
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tstw %d5 //LAMBDA is in lower word of d5
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bnes sc_mul //if neg (LAMBDA = 1), scale by mul
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bne sc_mul //if neg (LAMBDA = 1), scale by mul
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fdivx %fp1,%fp0 //calculate X / SCALE -> Y to fp0
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bras A10_st //branch to A10
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@@ -232,7 +232,7 @@ nextlw:
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//
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m_sign:
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btst #31,(%a0) //test sign of the mantissa
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beqs ap_st_z //if clear, go to append/strip zeros
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beq ap_st_z //if clear, go to append/strip zeros
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fnegx %fp0 //if set, negate fp0
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//
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@@ -290,7 +290,7 @@ ap_st_z:
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cmpl #27,%d1 //test is with 27
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ble pwrten //if abs(expA) <28, skip ap/st zeros
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btst #30,(%a0) //check sign of exp
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bnes ap_st_n //if neg, go to neg side
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bne ap_st_n //if neg, go to neg side
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clrl %d1 //zero count reg
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movel (%a0),%d4 //load lword 1 to d4
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bfextu %d4{#28:#4},%d0 //get M16 in d0
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@@ -338,7 +338,7 @@ ap_p_en:
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tstl %d0 //check if d0 is zero
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bnes ap_p_el //if not, get next bit
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fmulx %fp1,%fp0 //mul mantissa by 10**(no_bits_shifted)
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bras pwrten //go calc pwrten
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bra pwrten //go calc pwrten
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//
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// This section handles a negative adjusted exponent.
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//
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@@ -79,7 +79,7 @@ not_fmovecr:
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movew CMDREG1B(%a6),%d0
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andl #0x7F,%d0
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cmpil #0x38,%d0 //if the extension is >= $38,
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bges serror //it is illegal
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bge serror //it is illegal
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bfextu STAG(%a6){#0:#3},%d1
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lsll #3,%d0 //make room for STAG
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addl %d1,%d0 //combine for final index into table
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@@ -173,7 +173,7 @@ PTENRP:
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get_op:
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clrb DY_MO_FLG(%a6)
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tstb UFLG_TMP(%a6) //test flag for unsupp/unimp state
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beqs uni_getop
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beq uni_getop
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uns_getop:
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btstb #direction_bit,CMDREG1B(%a6)
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@@ -140,20 +140,20 @@ ovf_e1_exc:
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//
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ovf_fsgl:
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clrl %d0
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bras ovf_res
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bra ovf_res
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ovff_sgl:
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movel #0x00000001,%d0 //set single
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bras ovf_res
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bra ovf_res
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ovff_dbl:
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movel #0x00000002,%d0 //set double
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bras ovf_res
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bra ovf_res
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//
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// The precision is in the fpcr.
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//
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ovf_fpcr:
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bfextu FPCR_MODE(%a6){#0:#2},%d0 //set round precision
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bras ovf_res
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bra ovf_res
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//
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//
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@@ -94,7 +94,7 @@ opc011:
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cmpil #0,%d0 //if dest format is extended
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beq dest_ext //then branch
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cmpil #1,%d0 //if dest format is single
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beqs dest_sgl //then branch
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beq dest_sgl //then branch
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//
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// fall through to dest_dbl
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//
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