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2008-09-16 Joel Sherrill <joel.sherrill@oarcorp.com>

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* Makefile.am, include/bsp.h, startup/init68360.c, startup/linkcmds,
	startup/linkcmds.bootp, startup/linkcmds.prom: Use top level shared
	bsp_get_work_area() implementation.
This commit is contained in:
Joel Sherrill
2008-09-16 22:15:59 +00:00
parent e1ee0b599c
commit 53cb8234bb
7 changed files with 41 additions and 42 deletions
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6
c/src/lib/libbsp/m68k/gen68360/ChangeLog
View File

@@ -1,3 +1,9 @@
2008-09-16 Joel Sherrill <joel.sherrill@oarcorp.com>
* Makefile.am, include/bsp.h, startup/init68360.c, startup/linkcmds,
startup/linkcmds.bootp, startup/linkcmds.prom: Use top level shared
bsp_get_work_area() implementation.
2008-09-16 Joel Sherrill <joel.sherrill@oarcorp.com>
* Makefile.am, configure.ac, start/start.S: Add use of

2
c/src/lib/libbsp/m68k/gen68360/Makefile.am
View File

@@ -28,7 +28,7 @@ dist_project_lib_DATA += startup/linkcmds startup/linkcmds.prom \
startup_SOURCES = startup/alloc360.c ../../shared/bspclean.c \
../../shared/bsppredriverhook.c ../../shared/bsppretaskinghook.c \
../../shared/bsplibc.c ../../shared/bsppost.c \
../../m68k/shared/m68kbspgetworkarea.c ../../shared/bspstart.c \
../../shared/bspgetworkarea.c ../../shared/bspstart.c \
startup/init68360.c ../../shared/bootcard.c \
../../shared/sbrk.c ../../m68k/shared/setvec.c \
../../shared/gnatinstallhandler.c

13
c/src/lib/libbsp/m68k/gen68360/include/bsp.h
View File

@@ -96,13 +96,6 @@ m68k_isr_entry set_vector(
int type
);
/*
* Values assigned by link editor
*/
extern char _RamBase[];
extern char _HeapSize[];
/*
* Definitions for Atlas Computer Equipment Inc. High Speed Bridge (HSB)
*/
@@ -113,9 +106,9 @@ extern char _HeapSize[];
#define ATLASHSB_ROM_U6 0xFF080000L /* U6 flash ROM socket */
/*
* definitions for PGH360 board
*/
/*
* definitions for PGH360 board
*/
#if defined(PGH360)
/*
* logical SPI addresses of SPI slaves available

32
c/src/lib/libbsp/m68k/gen68360/startup/init68360.c
View File

@@ -45,7 +45,7 @@ void _Init68360 (void)
m68k_isr_entry *vbr;
unsigned long ramSize;
extern void _CopyDataClearBSSAndStart (unsigned long ramSize);
extern char _RamBase[];
extern void *RamBase;
extern void *_RomBase; /* From linkcmds */
#if (defined (__mc68040__))
@@ -146,13 +146,13 @@ void _Init68360 (void)
m360.memc[1].or = M360_MEMC_OR_TCYC(0) |
M360_MEMC_OR_1MB |
M360_MEMC_OR_DRAM;
m360.memc[1].br = (unsigned long)&_RamBase |
m360.memc[1].br = (unsigned long)&RamBase |
M360_MEMC_BR_BACK40 |
M360_MEMC_BR_V;
for (i = 0; i < 50000; i++)
continue;
for (i = 0; i < 8; ++i)
*((volatile unsigned long *)(unsigned long)&_RamBase);
*((volatile unsigned long *)(unsigned long)&RamBase);
/*
* Step 13: Copy the exception vector table to system RAM
@@ -284,12 +284,12 @@ void _Init68360 (void)
/* first bank 1MByte DRAM */
m360.memc[1].or = M360_MEMC_OR_TCYC(2) | M360_MEMC_OR_1MB |
M360_MEMC_OR_PGME | M360_MEMC_OR_DRAM;
m360.memc[1].br = (unsigned long)&_RamBase | M360_MEMC_BR_V;
m360.memc[1].br = (unsigned long)&RamBase | M360_MEMC_BR_V;
/* second bank 1MByte DRAM */
m360.memc[2].or = M360_MEMC_OR_TCYC(2) | M360_MEMC_OR_1MB |
M360_MEMC_OR_PGME | M360_MEMC_OR_DRAM;
m360.memc[2].br = ((unsigned long)&_RamBase + 0x100000) |
m360.memc[2].br = ((unsigned long)&RamBase + 0x100000) |
M360_MEMC_BR_V;
/* flash rom socket U6 on CS5 */
@@ -305,7 +305,7 @@ void _Init68360 (void)
for (i = 0; i < 50000; i++)
continue;
for (i = 0; i < 8; ++i)
*((volatile unsigned long *)(unsigned long)&_RamBase);
*((volatile unsigned long *)(unsigned long)&RamBase);
/*
* Step 13: Copy the exception vector table to system RAM
@@ -445,7 +445,7 @@ void _Init68360 (void)
m360.memc[7].or = M360_MEMC_OR_TCYC(1) | M360_MEMC_OR_16MB |
M360_MEMC_OR_FCMC(0) | /* M360_MEMC_OR_PGME | */
M360_MEMC_OR_32BIT | M360_MEMC_OR_DRAM;
m360.memc[7].br = (unsigned long)&_RamBase | M360_MEMC_BR_V;
m360.memc[7].br = (unsigned long)&RamBase | M360_MEMC_BR_V;
/*
* FIXME: here we should wait for 8 refresh cycles...
@@ -594,10 +594,10 @@ void _Init68360 (void)
* 0 wait states
*/
ramSize = 4 * 1024 * 1024;
m360.memc[1].br = (unsigned long)&_RamBase | M360_MEMC_BR_V;
m360.memc[1].br = (unsigned long)&RamBase | M360_MEMC_BR_V;
m360.memc[1].or = M360_MEMC_OR_WAITS(0) | M360_MEMC_OR_2MB |
M360_MEMC_OR_32BIT;
m360.memc[2].br = ((unsigned long)&_RamBase + 0x200000) | M360_MEMC_BR_V;
m360.memc[2].br = ((unsigned long)&RamBase + 0x200000) | M360_MEMC_BR_V;
m360.memc[2].or = M360_MEMC_OR_WAITS(0) | M360_MEMC_OR_2MB |
M360_MEMC_OR_32BIT;
/*
@@ -744,7 +744,7 @@ void _Init68360 (void)
m360.memc[1].or = M360_MEMC_OR_TCYC(0) |
M360_MEMC_OR_16MB |
M360_MEMC_OR_DRAM;
m360.memc[1].br = (unsigned long)&_RamBase | M360_MEMC_BR_V;
m360.memc[1].br = (unsigned long)&RamBase | M360_MEMC_BR_V;
/*
* Wait for chips to power up
@@ -753,7 +753,7 @@ void _Init68360 (void)
for (i = 0; i < 50000; i++)
continue;
for (i = 0; i < 8; ++i)
*((volatile unsigned long *)(unsigned long)&_RamBase);
*((volatile unsigned long *)(unsigned long)&RamBase);
/*
* Determine memory size (1, 4, or 16 Mbytes)
@@ -763,14 +763,14 @@ void _Init68360 (void)
* A 1 Mbyte or 4 Mbyte DRAM will show up several times in
* the memory map, but will work with the same bootstrap PROM.
*/
*(volatile char *)&_RamBase = 0;
*((volatile char *)&_RamBase+0x00C01800) = 1;
if (*(volatile char *)&_RamBase) {
*(volatile char *)&RamBase = 0;
*((volatile char *)&RamBase+0x00C01800) = 1;
if (*(volatile char *)&RamBase) {
m360.gmr = (m360.gmr & ~0x001C0000) | M360_GMR_PGS(1);
}
else {
*((volatile char *)&_RamBase+0x00801000) = 1;
if (*(volatile char *)&_RamBase) {
*((volatile char *)&RamBase+0x00801000) = 1;
if (*(volatile char *)&RamBase) {
m360.gmr = (m360.gmr & ~0x001C0000) | M360_GMR_PGS(3);
}
}

10
c/src/lib/libbsp/m68k/gen68360/startup/linkcmds
View File

@@ -15,9 +15,9 @@
* Declare some sizes.
* A heap size of 0 means `use all available memory for the heap'.
*/
_RamBase = DEFINED(_RamBase) ? _RamBase : 0x0;
_RamSize = DEFINED(_RamSize) ? _RamSize : 64M;
_HeapSize = DEFINED(_HeapSize) ? _HeapSize : 0x0;
RamBase = DEFINED(RamBase) ? RamBase : 0x0;
RamSize = DEFINED(RamSize) ? RamSize : 64M;
HeapSize = DEFINED(HeapSize) ? HeapSize : 0x0;
_StackSize = DEFINED(_StackSize) ? _StackSize : 0x1000;
/*
@@ -44,7 +44,7 @@ SECTIONS {
* Dynamic RAM
*/
ram : {
_RamBase = .;
RamBase = .;
} >ram
/*
@@ -133,7 +133,7 @@ SECTIONS {
_stack_init = .;
_clear_end = .;
_WorkspaceBase = .;
WorkAreaBase = .;
} >ram
/*

10
c/src/lib/libbsp/m68k/gen68360/startup/linkcmds.bootp
View File

@@ -19,9 +19,9 @@
* Declare some sizes.
* A heap size of 0 means `use all available memory for the heap'.
*/
_RamBase = DEFINED(_RamBase) ? _RamBase : 0x0;
_RamSize = DEFINED(_RamSize) ? _RamSize : 64M;
_HeapSize = DEFINED(_HeapSize) ? _HeapSize : 0x0;
RamBase = DEFINED(RamBase) ? RamBase : 0x0;
RamSize = DEFINED(RamSize) ? RamSize : 64M;
HeapSize = DEFINED(HeapSize) ? HeapSize : 0x0;
_StackSize = DEFINED(_StackSize) ? _StackSize : 0x1000;
/*
@@ -49,7 +49,7 @@ SECTIONS {
* Dynamic RAM
*/
ram : {
_RamBase = .;
RamBase = .;
} >ram
/*
@@ -138,7 +138,7 @@ SECTIONS {
_stack_init = .;
_clear_end = .;
_WorkspaceBase = .;
WorkAreaBase = .;
} >myram
/*

10
c/src/lib/libbsp/m68k/gen68360/startup/linkcmds.prom
View File

@@ -19,9 +19,9 @@
* Declare some sizes.
* A heap size of 0 means `use all available memory for the heap'.
*/
_RamBase = DEFINED(_RamBase) ? _RamBase : 0x0;
_RamSize = DEFINED(_RamSize) ? _RamSize : 64M;
_HeapSize = DEFINED(_HeapSize) ? _HeapSize : 0x0;
RamBase = DEFINED(RamBase) ? RamBase : 0x0;
RamSize = DEFINED(RamSize) ? RamSize : 64M;
HeapSize = DEFINED(HeapSize) ? HeapSize : 0x0;
_StackSize = DEFINED(_StackSize) ? _StackSize : 0x1000;
/*
@@ -48,7 +48,7 @@ SECTIONS {
* Dynamic RAM
*/
ram : {
_RamBase = .;
RamBase = .;
} >ram
/*
@@ -136,7 +136,7 @@ SECTIONS {
_stack_init = .;
_clear_end = .;
_WorkspaceBase = .;
WorkAreaBase = .;
} >ram
/*