2000-08-11 Joel Sherrill <joel@OARcorp.com>

* Shell added for or32 port based on no_cpu port with names replaced.

c/src/exec/score/cpu/or32/.cvsignore

@@ -0,0 +1,13 @@
+Makefile
+Makefile.in
+aclocal.m4
+config.cache
+config.guess
+config.log
+config.status
+config.sub
+configure
+depcomp
+install-sh
+missing
+mkinstalldirs

c/src/exec/score/cpu/or32/ChangeLog

@@ -0,0 +1,3 @@
+2000-08-11	Joel Sherrill <joel@OARcorp.com>
+
+	* Shell added for or32 port based on no_cpu port with names replaced.

c/src/exec/score/cpu/or32/Makefile.am

@@ -0,0 +1,46 @@
+##
+## $Id$
+##
+
+AUTOMAKE_OPTIONS = foreign 1.4
+ACLOCAL_AMFLAGS = -I $(RTEMS_TOPdir)/aclocal
+
+SUBDIRS = rtems
+
+C_FILES = cpu.c cpu_asm.c
+C_O_FILES = $(C_FILES:%.c=$(ARCH)/%.o)
+
+H_FILES = asm.h
+
+REL = $(ARCH)/rtems-cpu.rel
+
+rtems_cpu_rel_OBJECTS = $(C_O_FILES)
+
+include $(RTEMS_ROOT)/make/custom/@RTEMS_BSP@.cfg
+include $(top_srcdir)/../../../../../../automake/lib.am
+
+$(PROJECT_INCLUDE):
+	$(mkinstalldirs) $@
+
+$(PROJECT_INCLUDE)/%.h: %.h
+	$(INSTALL_DATA) $< $@
+
+$(PROJECT_RELEASE)/lib/rtems$(LIB_VARIANT).o: $(ARCH)/rtems.o
+	$(INSTALL_DATA) $< $@
+
+$(REL): $(rtems_cpu_rel_OBJECTS)
+	$(make-rel)
+
+PREINSTALL_FILES += $(PROJECT_INCLUDE) $(H_FILES:%=$(PROJECT_INCLUDE)/%)
+
+TMPINSTALL_FILES += $(PROJECT_RELEASE)/lib/rtems$(LIB_VARIANT).o
+
+all-local: $(ARCH) $(PREINSTALL_FILES) $(rtems_cpu_rel_OBJECTS) $(REL) \
+    $(TMPINSTALL_FILES)
+
+.PRECIOUS: $(REL)
+
+EXTRA_DIST = asm.h cpu.c cpu_asm.c rtems.c
+
+include $(top_srcdir)/../../../../../../automake/subdirs.am
+include $(top_srcdir)/../../../../../../automake/local.am

c/src/exec/score/cpu/or32/asm.h

@@ -0,0 +1,101 @@
+/*  asm.h
+ *
+ *  This include file attempts to address the problems
+ *  caused by incompatible flavors of assemblers and
+ *  toolsets.  It primarily addresses variations in the
+ *  use of leading underscores on symbols and the requirement
+ *  that register names be preceded by a %.
+ *
+ *
+ *  NOTE: The spacing in the use of these macros
+ *        is critical to them working as advertised.
+ *
+ *  COPYRIGHT:
+ *
+ *  This file is based on similar code found in newlib available
+ *  from ftp.cygnus.com.  The file which was used had no copyright
+ *  notice.  This file is freely distributable as long as the source
+ *  of the file is noted.  This file is:
+ *
+ *  COPYRIGHT (c) 1994-1997.
+ *  On-Line Applications Research Corporation (OAR).
+ *
+ *  $Id$
+ */
+
+#ifndef __OR32_ASM_h
+#define __OR32_ASM_h
+
+/*
+ *  Indicate we are in an assembly file and get the basic CPU definitions.
+ */
+
+#ifndef ASM
+#define ASM
+#endif
+#include <rtems/score/cpuopts.h>
+#include <rtems/score/or32.h>
+
+/*
+ *  Recent versions of GNU cpp define variables which indicate the
+ *  need for underscores and percents.  If not using GNU cpp or
+ *  the version does not support this, then you will obviously
+ *  have to define these as appropriate.
+ */
+
+#ifndef __USER_LABEL_PREFIX__
+#define __USER_LABEL_PREFIX__ _
+#endif
+
+#ifndef __REGISTER_PREFIX__
+#define __REGISTER_PREFIX__
+#endif
+
+/* ANSI concatenation macros.  */
+
+#define CONCAT1(a, b) CONCAT2(a, b)
+#define CONCAT2(a, b) a ## b
+
+/* Use the right prefix for global labels.  */
+
+#define SYM(x) CONCAT1 (__USER_LABEL_PREFIX__, x)
+
+/* Use the right prefix for registers.  */
+
+#define REG(x) CONCAT1 (__REGISTER_PREFIX__, x)
+
+/*
+ *  define macros for all of the registers on this CPU
+ *
+ *  EXAMPLE:     #define d0 REG (d0)
+ */
+
+/*
+ *  Define macros to handle section beginning and ends.
+ */
+
+
+#define BEGIN_CODE_DCL .text
+#define END_CODE_DCL
+#define BEGIN_DATA_DCL .data
+#define END_DATA_DCL
+#define BEGIN_CODE .text
+#define END_CODE
+#define BEGIN_DATA
+#define END_DATA
+#define BEGIN_BSS
+#define END_BSS
+#define END
+
+/*
+ *  Following must be tailor for a particular flavor of the C compiler.
+ *  They may need to put underscores in front of the symbols.
+ */
+
+#define PUBLIC(sym) .globl SYM (sym)
+#define EXTERN(sym) .globl SYM (sym)
+
+#endif
+/* end of include file */
+
+

c/src/exec/score/cpu/or32/configure.in

@@ -0,0 +1,31 @@
+dnl Process this file with autoconf to produce a configure script.
+dnl
+dnl $Id$
+
+AC_PREREQ(2.13)
+AC_INIT(cpu_asm.c)
+RTEMS_TOP(../../../../../..)
+AC_CONFIG_AUX_DIR(../../../../../..)
+
+RTEMS_CANONICAL_TARGET_CPU
+
+AM_INIT_AUTOMAKE(rtems-c-src-exec-score-cpu-or32,$RTEMS_VERSION,no)
+AM_MAINTAINER_MODE
+
+RTEMS_ENV_RTEMSCPU
+
+RTEMS_CHECK_CPU
+RTEMS_CANONICAL_HOST
+
+RTEMS_PROJECT_ROOT
+
+RTEMS_PROG_CC_FOR_TARGET
+RTEMS_CANONICALIZE_TOOLS
+
+RTEMS_CHECK_NEWLIB
+
+# Explicitly list all Makefiles here
+AC_OUTPUT( 
+Makefile
+rtems/Makefile
+rtems/score/Makefile)

c/src/exec/score/cpu/or32/cpu.c

@@ -0,0 +1,185 @@
+/*
+ *  XXX CPU Dependent Source
+ *
+ *
+ *  COPYRIGHT (c) 1989-1999.
+ *  On-Line Applications Research Corporation (OAR).
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.OARcorp.com/rtems/license.html.
+ *
+ *  $Id$
+ */
+
+#include <rtems/system.h>
+#include <rtems/score/isr.h>
+#include <rtems/score/wkspace.h>
+
+/*  _CPU_Initialize
+ *
+ *  This routine performs processor dependent initialization.
+ *
+ *  INPUT PARAMETERS:
+ *    cpu_table       - CPU table to initialize
+ *    thread_dispatch - address of disptaching routine
+ *
+ *  OR32 Specific Information:
+ *
+ *  XXX document implementation including references if appropriate
+ */
+
+
+void _CPU_Initialize(
+  rtems_cpu_table  *cpu_table,
+  void      (*thread_dispatch)      /* ignored on this CPU */
+)
+{
+  /*
+   *  The thread_dispatch argument is the address of the entry point
+   *  for the routine called at the end of an ISR once it has been
+   *  decided a context switch is necessary.  On some compilation
+   *  systems it is difficult to call a high-level language routine
+   *  from assembly.  This allows us to trick these systems.
+   *
+   *  If you encounter this problem save the entry point in a CPU
+   *  dependent variable.
+   */
+
+  _CPU_Thread_dispatch_pointer = thread_dispatch;
+
+  /*
+   *  If there is not an easy way to initialize the FP context
+   *  during Context_Initialize, then it is usually easier to
+   *  save an "uninitialized" FP context here and copy it to
+   *  the task's during Context_Initialize.
+   */
+
+  /* FP context initialization support goes here */
+
+  _CPU_Table = *cpu_table;
+}
+
+/*PAGE
+ *
+ *  _CPU_ISR_Get_level
+ *
+ *  OR32 Specific Information:
+ *
+ *  XXX document implementation including references if appropriate
+ */
+ 
+unsigned32 _CPU_ISR_Get_level( void )
+{
+  /*
+   *  This routine returns the current interrupt level.
+   */
+
+  return 0;
+}
+
+/*PAGE
+ *
+ *  _CPU_ISR_install_raw_handler
+ *
+ *  OR32 Specific Information:
+ *
+ *  XXX document implementation including references if appropriate
+ */
+ 
+void _CPU_ISR_install_raw_handler(
+  unsigned32  vector,
+  proc_ptr    new_handler,
+  proc_ptr   *old_handler
+)
+{
+  /*
+   *  This is where we install the interrupt handler into the "raw" interrupt
+   *  table used by the CPU to dispatch interrupt handlers.
+   */
+}
+
+/*PAGE
+ *
+ *  _CPU_ISR_install_vector
+ *
+ *  This kernel routine installs the RTEMS handler for the
+ *  specified vector.
+ *
+ *  Input parameters:
+ *    vector      - interrupt vector number
+ *    old_handler - former ISR for this vector number
+ *    new_handler - replacement ISR for this vector number
+ *
+ *  Output parameters:  NONE
+ *
+ *
+ *  OR32 Specific Information:
+ *
+ *  XXX document implementation including references if appropriate
+ */
+
+void _CPU_ISR_install_vector(
+  unsigned32  vector,
+  proc_ptr    new_handler,
+  proc_ptr   *old_handler
+)
+{
+   *old_handler = _ISR_Vector_table[ vector ];
+
+   /*
+    *  If the interrupt vector table is a table of pointer to isr entry
+    *  points, then we need to install the appropriate RTEMS interrupt
+    *  handler for this vector number.
+    */
+
+   _CPU_ISR_install_raw_handler( vector, new_handler, old_handler );
+
+   /*
+    *  We put the actual user ISR address in '_ISR_vector_table'.  This will
+    *  be used by the _ISR_Handler so the user gets control.
+    */
+
+    _ISR_Vector_table[ vector ] = new_handler;
+}
+
+/*PAGE
+ *
+ *  _CPU_Install_interrupt_stack
+ *
+ *  OR32 Specific Information:
+ *
+ *  XXX document implementation including references if appropriate
+ */
+
+void _CPU_Install_interrupt_stack( void )
+{
+}
+
+/*PAGE
+ *
+ *  _CPU_Thread_Idle_body
+ *
+ *  NOTES:
+ *
+ *  1. This is the same as the regular CPU independent algorithm.
+ *
+ *  2. If you implement this using a "halt", "idle", or "shutdown"
+ *     instruction, then don't forget to put it in an infinite loop.
+ *
+ *  3. Be warned. Some processors with onboard DMA have been known
+ *     to stop the DMA if the CPU were put in IDLE mode.  This might
+ *     also be a problem with other on-chip peripherals.  So use this
+ *     hook with caution.
+ *
+ *  OR32 Specific Information:
+ *
+ *  XXX document implementation including references if appropriate
+ */
+
+void _CPU_Thread_Idle_body( void )
+{
+
+  for( ; ; )
+    /* insert your "halt" instruction here */ ;
+}

c/src/exec/score/cpu/or32/cpu_asm.c

@@ -0,0 +1,183 @@
+/*  cpu_asm.c  ===> cpu_asm.S or cpu_asm.s
+ *
+ *  This file contains the basic algorithms for all assembly code used
+ *  in an specific CPU port of RTEMS.  These algorithms must be implemented
+ *  in assembly language
+ *
+ *  NOTE:  This is supposed to be a .S or .s file NOT a C file.
+ *
+ *  COPYRIGHT (c) 1989-1999.
+ *  On-Line Applications Research Corporation (OAR).
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.OARcorp.com/rtems/license.html.
+ *
+ *  $Id$
+ */
+
+/*
+ *  This is supposed to be an assembly file.  This means that system.h
+ *  and cpu.h should not be included in a "real" cpu_asm file.  An
+ *  implementation in assembly should include "cpu_asm.h>
+ */
+
+#include <rtems/system.h>
+#include <rtems/score/cpu.h>
+/* #include "cpu_asm.h> */
+
+/*
+ *  _CPU_Context_save_fp_context
+ *
+ *  This routine is responsible for saving the FP context
+ *  at *fp_context_ptr.  If the point to load the FP context
+ *  from is changed then the pointer is modified by this routine.
+ *
+ *  Sometimes a macro implementation of this is in cpu.h which dereferences
+ *  the ** and a similarly named routine in this file is passed something
+ *  like a (Context_Control_fp *).  The general rule on making this decision
+ *  is to avoid writing assembly language.
+ *
+ *  OR32 Specific Information:
+ *
+ *  XXX document implementation including references if appropriate
+ */
+
+void _CPU_Context_save_fp(
+  void **fp_context_ptr
+)
+{
+}
+
+/*
+ *  _CPU_Context_restore_fp_context
+ *
+ *  This routine is responsible for restoring the FP context
+ *  at *fp_context_ptr.  If the point to load the FP context
+ *  from is changed then the pointer is modified by this routine.
+ *
+ *  Sometimes a macro implementation of this is in cpu.h which dereferences
+ *  the ** and a similarly named routine in this file is passed something
+ *  like a (Context_Control_fp *).  The general rule on making this decision
+ *  is to avoid writing assembly language.
+ *
+ *  OR32 Specific Information:
+ *
+ *  XXX document implementation including references if appropriate
+ */
+
+void _CPU_Context_restore_fp(
+  void **fp_context_ptr
+)
+{
+}
+
+/*  _CPU_Context_switch
+ *
+ *  This routine performs a normal non-FP context switch.
+ *
+ *  OR32 Specific Information:
+ *
+ *  XXX document implementation including references if appropriate
+ */
+
+void _CPU_Context_switch(
+  Context_Control  *run,
+  Context_Control  *heir
+)
+{
+}
+
+/*
+ *  _CPU_Context_restore
+ *
+ *  This routine is generally used only to restart self in an
+ *  efficient manner.  It may simply be a label in _CPU_Context_switch.
+ *
+ *  NOTE: May be unnecessary to reload some registers.
+ *
+ *  OR32 Specific Information:
+ *
+ *  XXX document implementation including references if appropriate
+ */
+
+void _CPU_Context_restore(
+  Context_Control *new_context
+)
+{
+}
+
+/*  void __ISR_Handler()
+ *
+ *  This routine provides the RTEMS interrupt management.
+ *
+ *  OR32 Specific Information:
+ *
+ *  XXX document implementation including references if appropriate
+ */
+
+void _ISR_Handler()
+{
+   /*
+    *  This discussion ignores a lot of the ugly details in a real
+    *  implementation such as saving enough registers/state to be
+    *  able to do something real.  Keep in mind that the goal is
+    *  to invoke a user's ISR handler which is written in C and
+    *  uses a certain set of registers.
+    *
+    *  Also note that the exact order is to a large extent flexible.
+    *  Hardware will dictate a sequence for a certain subset of
+    *  _ISR_Handler while requirements for setting
+    */
+
+  /*
+   *  At entry to "common" _ISR_Handler, the vector number must be
+   *  available.  On some CPUs the hardware puts either the vector
+   *  number or the offset into the vector table for this ISR in a
+   *  known place.  If the hardware does not give us this information,
+   *  then the assembly portion of RTEMS for this port will contain
+   *  a set of distinct interrupt entry points which somehow place
+   *  the vector number in a known place (which is safe if another
+   *  interrupt nests this one) and branches to _ISR_Handler.
+   *
+   *  save some or all context on stack
+   *  may need to save some special interrupt information for exit
+   *
+   *  #if ( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE )
+   *    if ( _ISR_Nest_level == 0 )
+   *      switch to software interrupt stack
+   *  #endif
+   *
+   *  _ISR_Nest_level++;
+   *
+   *  _Thread_Dispatch_disable_level++;
+   *
+   *  (*_ISR_Vector_table[ vector ])( vector );
+   *
+   *  --_ISR_Nest_level;
+   *
+   *  if ( _ISR_Nest_level )
+   *    goto the label "exit interrupt (simple case)"
+   *
+   *  #if ( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE )
+   *    restore stack
+   *  #endif
+   *  
+   *  if ( !_Context_Switch_necessary )
+   *    goto the label "exit interrupt (simple case)"
+   *  
+   *  if ( !_ISR_Signals_to_thread_executing )
+   *    _ISR_Signals_to_thread_executing = FALSE;
+   *    goto the label "exit interrupt (simple case)"
+   *
+   *  call _Thread_Dispatch() or prepare to return to _ISR_Dispatch
+   *
+   *  prepare to get out of interrupt
+   *  return from interrupt  (maybe to _ISR_Dispatch)
+   *
+   *  LABEL "exit interrupt (simple case):
+   *  prepare to get out of interrupt
+   *  return from interrupt
+   */
+}
+

c/src/exec/score/cpu/or32/rtems.c

@@ -0,0 +1,48 @@
+/*  rtems.c  ===> rtems.S or rtems.s
+ *
+ *  This file contains the single entry point code for
+ *  the XXX implementation of RTEMS.
+ *
+ *  NOTE:  This is supposed to be a .S or .s file NOT a C file.
+ *
+ *  COPYRIGHT (c) 1989-1999.
+ *  On-Line Applications Research Corporation (OAR).
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.OARcorp.com/rtems/license.html.
+ *
+ *  $Id$
+ */
+
+/*
+ *  This is supposed to be an assembly file.  This means that system.h
+ *  and cpu.h should not be included in a "real" rtems file.
+ */
+
+#include <rtems/system.h>
+#include <rtems/score/cpu.h>
+/* #include "asm.h> */
+
+/*
+ *  RTEMS
+ *
+ *  This routine jumps to the directive indicated in the
+ *  CPU defined register.  This routine is used when RTEMS is
+ *  linked by itself and placed in ROM.  This routine is the
+ *  first address in the ROM space for RTEMS.  The user "calls"
+ *  this address with the directive arguments in the normal place.
+ *  This routine then jumps indirectly to the correct directive
+ *  preserving the arguments.  The directive should not realize
+ *  it has been "wrapped" in this way.  The table "_Entry_points"
+ *  is used to look up the directive.
+ *
+ *  OR32 Specific Information:
+ *
+ *  XXX document implementation including references if appropriate
+ */
+
+void RTEMS()
+{
+}
+

c/src/exec/score/cpu/or32/rtems/.cvsignore

@@ -0,0 +1,2 @@
+Makefile
+Makefile.in

c/src/exec/score/cpu/or32/rtems/Makefile.am

@@ -0,0 +1,10 @@
+##
+## $Id$
+##
+
+AUTOMAKE_OPTIONS = foreign 1.4
+
+SUBDIRS = score
+
+include $(top_srcdir)/../../../../../../automake/subdirs.am
+include $(top_srcdir)/../../../../../../automake/local.am

c/src/exec/score/cpu/or32/rtems/score/.cvsignore

@@ -0,0 +1,2 @@
+Makefile
+Makefile.in

c/src/exec/score/cpu/or32/rtems/score/Makefile.am

@@ -0,0 +1,25 @@
+##
+## $Id$
+##
+
+AUTOMAKE_OPTIONS = foreign 1.4
+
+H_FILES = cpu.h or32.h cpu_asm.h or32types.h
+noinst_HEADERS = $(H_FILES)
+
+#
+# (OPTIONAL) Add local stuff here using +=
+#
+
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/rtems/score \
+    $(H_FILES:%.h=$(PROJECT_INCLUDE)/rtems/score/%.h)
+
+$(PROJECT_INCLUDE)/rtems/score:
+	$(mkinstalldirs) $@
+
+$(PROJECT_INCLUDE)/rtems/score/%.h: %.h
+	$(INSTALL_DATA) $< $@
+
+all-local: $(PREINSTALL_FILES)
+
+include $(top_srcdir)/../../../../../../automake/local.am

c/src/exec/score/cpu/or32/rtems/score/cpu_asm.h

@@ -0,0 +1,70 @@
+/*
+ *  cpu_asm.h
+ *
+ *  Very loose template for an include file for the cpu_asm.? file
+ *  if it is implemented as a ".S" file (preprocessed by cpp) instead
+ *  of a ".s" file (preprocessed by gm4 or gasp).
+ *
+ *  COPYRIGHT (c) 1989-1999.
+ *  On-Line Applications Research Corporation (OAR).
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.OARcorp.com/rtems/license.html.
+ *
+ *  $Id$
+ *
+ */
+
+#ifndef __CPU_ASM_h
+#define __CPU_ASM_h
+
+/* pull in the generated offsets */
+
+#include <rtems/score/offsets.h>
+
+/*
+ * Hardware General Registers
+ */
+
+/* put something here */
+
+/*
+ * Hardware Floating Point Registers
+ */
+
+/* put something here */
+
+/*
+ * Hardware Control Registers
+ */
+
+/* put something here */
+
+/*
+ * Calling Convention
+ */
+
+/* put something here */
+
+/*
+ * Temporary registers
+ */
+
+/* put something here */
+
+/*
+ * Floating Point Registers - SW Conventions
+ */
+
+/* put something here */
+
+/*
+ * Temporary floating point registers
+ */
+
+/* put something here */
+
+#endif
+
+/* end of file */

c/src/exec/score/cpu/or32/rtems/score/or32.h

@@ -0,0 +1,70 @@
+/*  or32.h
+ *
+ *  This file sets up basic CPU dependency settings based on 
+ *  compiler settings.  For example, it can determine if
+ *  floating point is available.  This particular implementation
+ *  is specified to the OPENCORES.ORG OR32 port.
+ *
+ *
+ *  COPYRIGHT (c) 1989-1999.
+ *  On-Line Applications Research Corporation (OAR).
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.OARcorp.com/rtems/license.html.
+ *
+ *  $Id$
+ *
+ */
+
+#ifndef _INCLUDE_OR32_h
+#define _INCLUDE_OR32_h
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ *  This file contains the information required to build
+ *  RTEMS for a particular member of the OPENCORES.ORG OR32 family.
+ *  It does this by setting variables to indicate which
+ *  implementation dependent features are present in a particular
+ *  member of the family.
+ *
+ *  This is a good place to list all the known CPU models
+ *  that this port supports and which RTEMS CPU model they correspond
+ *  to.
+ */
+ 
+#if defined(rtems_multilib)
+/*
+ *  Figure out all CPU Model Feature Flags based upon compiler 
+ *  predefines. 
+ */
+
+#define CPU_MODEL_NAME  "rtems_multilib"
+#define OR32_HAS_FPU     1
+
+#elif defined(or32)
+ 
+#define CPU_MODEL_NAME  "or32_model"
+#define OR32_HAS_FPU     1
+ 
+#else
+ 
+#error "Unsupported CPU Model"
+ 
+#endif
+
+/*
+ *  Define the name of the CPU family.
+ */
+
+#define CPU_NAME "OPENCORES.ORG OR32"
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ! _INCLUDE_OR32_h */
+/* end of include file */

c/src/exec/score/cpu/or32/rtems/score/or32types.h

@@ -0,0 +1,56 @@
+/*  or32types.h
+ *
+ *  This include file contains type definitions pertaining to the Intel
+ *  or32 processor family.
+ *
+ *  COPYRIGHT (c) 1989-1999.
+ *  On-Line Applications Research Corporation (OAR).
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.OARcorp.com/rtems/license.html.
+ *
+ *  $Id$
+ */
+
+#ifndef __OR32_TYPES_h
+#define __OR32_TYPES_h
+
+#ifndef ASM
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ *  This section defines the basic types for this processor.
+ */
+
+typedef unsigned char  unsigned8;      /* unsigned 8-bit  integer */
+typedef unsigned short unsigned16;     /* unsigned 16-bit integer */
+typedef unsigned int   unsigned32;     /* unsigned 32-bit integer */
+typedef unsigned long long unsigned64; /* unsigned 64-bit integer */
+
+typedef unsigned16     Priority_Bit_map_control;
+
+typedef signed char      signed8;      /* 8-bit  signed integer */
+typedef signed short     signed16;     /* 16-bit signed integer */
+typedef signed int       signed32;     /* 32-bit signed integer */
+typedef signed long long signed64;     /* 64 bit signed integer */
+
+typedef unsigned32 boolean;     /* Boolean value   */
+
+typedef float          single_precision;     /* single precision float */
+typedef double         double_precision;     /* double precision float */
+
+typedef void or32_isr;
+typedef void ( *or32_isr_entry )( void );
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif  /* !ASM */
+
+#endif
+/* end of include file */

c/src/exec/score/cpu/or32/rtems/score/types.h

@@ -0,0 +1,56 @@
+/*  or32types.h
+ *
+ *  This include file contains type definitions pertaining to the Intel
+ *  or32 processor family.
+ *
+ *  COPYRIGHT (c) 1989-1999.
+ *  On-Line Applications Research Corporation (OAR).
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.OARcorp.com/rtems/license.html.
+ *
+ *  $Id$
+ */
+
+#ifndef __OR32_TYPES_h
+#define __OR32_TYPES_h
+
+#ifndef ASM
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ *  This section defines the basic types for this processor.
+ */
+
+typedef unsigned char  unsigned8;      /* unsigned 8-bit  integer */
+typedef unsigned short unsigned16;     /* unsigned 16-bit integer */
+typedef unsigned int   unsigned32;     /* unsigned 32-bit integer */
+typedef unsigned long long unsigned64; /* unsigned 64-bit integer */
+
+typedef unsigned16     Priority_Bit_map_control;
+
+typedef signed char      signed8;      /* 8-bit  signed integer */
+typedef signed short     signed16;     /* 16-bit signed integer */
+typedef signed int       signed32;     /* 32-bit signed integer */
+typedef signed long long signed64;     /* 64 bit signed integer */
+
+typedef unsigned32 boolean;     /* Boolean value   */
+
+typedef float          single_precision;     /* single precision float */
+typedef double         double_precision;     /* double precision float */
+
+typedef void or32_isr;
+typedef void ( *or32_isr_entry )( void );
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif  /* !ASM */
+
+#endif
+/* end of include file */

cpukit/score/cpu/or32/.cvsignore

@@ -0,0 +1,13 @@
+Makefile
+Makefile.in
+aclocal.m4
+config.cache
+config.guess
+config.log
+config.status
+config.sub
+configure
+depcomp
+install-sh
+missing
+mkinstalldirs

cpukit/score/cpu/or32/ChangeLog

@@ -0,0 +1,3 @@
+2000-08-11	Joel Sherrill <joel@OARcorp.com>
+
+	* Shell added for or32 port based on no_cpu port with names replaced.

cpukit/score/cpu/or32/Makefile.am

@@ -0,0 +1,46 @@
+##
+## $Id$
+##
+
+AUTOMAKE_OPTIONS = foreign 1.4
+ACLOCAL_AMFLAGS = -I $(RTEMS_TOPdir)/aclocal
+
+SUBDIRS = rtems
+
+C_FILES = cpu.c cpu_asm.c
+C_O_FILES = $(C_FILES:%.c=$(ARCH)/%.o)
+
+H_FILES = asm.h
+
+REL = $(ARCH)/rtems-cpu.rel
+
+rtems_cpu_rel_OBJECTS = $(C_O_FILES)
+
+include $(RTEMS_ROOT)/make/custom/@RTEMS_BSP@.cfg
+include $(top_srcdir)/../../../../../../automake/lib.am
+
+$(PROJECT_INCLUDE):
+	$(mkinstalldirs) $@
+
+$(PROJECT_INCLUDE)/%.h: %.h
+	$(INSTALL_DATA) $< $@
+
+$(PROJECT_RELEASE)/lib/rtems$(LIB_VARIANT).o: $(ARCH)/rtems.o
+	$(INSTALL_DATA) $< $@
+
+$(REL): $(rtems_cpu_rel_OBJECTS)
+	$(make-rel)
+
+PREINSTALL_FILES += $(PROJECT_INCLUDE) $(H_FILES:%=$(PROJECT_INCLUDE)/%)
+
+TMPINSTALL_FILES += $(PROJECT_RELEASE)/lib/rtems$(LIB_VARIANT).o
+
+all-local: $(ARCH) $(PREINSTALL_FILES) $(rtems_cpu_rel_OBJECTS) $(REL) \
+    $(TMPINSTALL_FILES)
+
+.PRECIOUS: $(REL)
+
+EXTRA_DIST = asm.h cpu.c cpu_asm.c rtems.c
+
+include $(top_srcdir)/../../../../../../automake/subdirs.am
+include $(top_srcdir)/../../../../../../automake/local.am

cpukit/score/cpu/or32/asm.h

@@ -0,0 +1,101 @@
+/*  asm.h
+ *
+ *  This include file attempts to address the problems
+ *  caused by incompatible flavors of assemblers and
+ *  toolsets.  It primarily addresses variations in the
+ *  use of leading underscores on symbols and the requirement
+ *  that register names be preceded by a %.
+ *
+ *
+ *  NOTE: The spacing in the use of these macros
+ *        is critical to them working as advertised.
+ *
+ *  COPYRIGHT:
+ *
+ *  This file is based on similar code found in newlib available
+ *  from ftp.cygnus.com.  The file which was used had no copyright
+ *  notice.  This file is freely distributable as long as the source
+ *  of the file is noted.  This file is:
+ *
+ *  COPYRIGHT (c) 1994-1997.
+ *  On-Line Applications Research Corporation (OAR).
+ *
+ *  $Id$
+ */
+
+#ifndef __OR32_ASM_h
+#define __OR32_ASM_h
+
+/*
+ *  Indicate we are in an assembly file and get the basic CPU definitions.
+ */
+
+#ifndef ASM
+#define ASM
+#endif
+#include <rtems/score/cpuopts.h>
+#include <rtems/score/or32.h>
+
+/*
+ *  Recent versions of GNU cpp define variables which indicate the
+ *  need for underscores and percents.  If not using GNU cpp or
+ *  the version does not support this, then you will obviously
+ *  have to define these as appropriate.
+ */
+
+#ifndef __USER_LABEL_PREFIX__
+#define __USER_LABEL_PREFIX__ _
+#endif
+
+#ifndef __REGISTER_PREFIX__
+#define __REGISTER_PREFIX__
+#endif
+
+/* ANSI concatenation macros.  */
+
+#define CONCAT1(a, b) CONCAT2(a, b)
+#define CONCAT2(a, b) a ## b
+
+/* Use the right prefix for global labels.  */
+
+#define SYM(x) CONCAT1 (__USER_LABEL_PREFIX__, x)
+
+/* Use the right prefix for registers.  */
+
+#define REG(x) CONCAT1 (__REGISTER_PREFIX__, x)
+
+/*
+ *  define macros for all of the registers on this CPU
+ *
+ *  EXAMPLE:     #define d0 REG (d0)
+ */
+
+/*
+ *  Define macros to handle section beginning and ends.
+ */
+
+
+#define BEGIN_CODE_DCL .text
+#define END_CODE_DCL
+#define BEGIN_DATA_DCL .data
+#define END_DATA_DCL
+#define BEGIN_CODE .text
+#define END_CODE
+#define BEGIN_DATA
+#define END_DATA
+#define BEGIN_BSS
+#define END_BSS
+#define END
+
+/*
+ *  Following must be tailor for a particular flavor of the C compiler.
+ *  They may need to put underscores in front of the symbols.
+ */
+
+#define PUBLIC(sym) .globl SYM (sym)
+#define EXTERN(sym) .globl SYM (sym)
+
+#endif
+/* end of include file */
+
+

cpukit/score/cpu/or32/cpu.c

@@ -0,0 +1,185 @@
+/*
+ *  XXX CPU Dependent Source
+ *
+ *
+ *  COPYRIGHT (c) 1989-1999.
+ *  On-Line Applications Research Corporation (OAR).
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.OARcorp.com/rtems/license.html.
+ *
+ *  $Id$
+ */
+
+#include <rtems/system.h>
+#include <rtems/score/isr.h>
+#include <rtems/score/wkspace.h>
+
+/*  _CPU_Initialize
+ *
+ *  This routine performs processor dependent initialization.
+ *
+ *  INPUT PARAMETERS:
+ *    cpu_table       - CPU table to initialize
+ *    thread_dispatch - address of disptaching routine
+ *
+ *  OR32 Specific Information:
+ *
+ *  XXX document implementation including references if appropriate
+ */
+
+
+void _CPU_Initialize(
+  rtems_cpu_table  *cpu_table,
+  void      (*thread_dispatch)      /* ignored on this CPU */
+)
+{
+  /*
+   *  The thread_dispatch argument is the address of the entry point
+   *  for the routine called at the end of an ISR once it has been
+   *  decided a context switch is necessary.  On some compilation
+   *  systems it is difficult to call a high-level language routine
+   *  from assembly.  This allows us to trick these systems.
+   *
+   *  If you encounter this problem save the entry point in a CPU
+   *  dependent variable.
+   */
+
+  _CPU_Thread_dispatch_pointer = thread_dispatch;
+
+  /*
+   *  If there is not an easy way to initialize the FP context
+   *  during Context_Initialize, then it is usually easier to
+   *  save an "uninitialized" FP context here and copy it to
+   *  the task's during Context_Initialize.
+   */
+
+  /* FP context initialization support goes here */
+
+  _CPU_Table = *cpu_table;
+}
+
+/*PAGE
+ *
+ *  _CPU_ISR_Get_level
+ *
+ *  OR32 Specific Information:
+ *
+ *  XXX document implementation including references if appropriate
+ */
+ 
+unsigned32 _CPU_ISR_Get_level( void )
+{
+  /*
+   *  This routine returns the current interrupt level.
+   */
+
+  return 0;
+}
+
+/*PAGE
+ *
+ *  _CPU_ISR_install_raw_handler
+ *
+ *  OR32 Specific Information:
+ *
+ *  XXX document implementation including references if appropriate
+ */
+ 
+void _CPU_ISR_install_raw_handler(
+  unsigned32  vector,
+  proc_ptr    new_handler,
+  proc_ptr   *old_handler
+)
+{
+  /*
+   *  This is where we install the interrupt handler into the "raw" interrupt
+   *  table used by the CPU to dispatch interrupt handlers.
+   */
+}
+
+/*PAGE
+ *
+ *  _CPU_ISR_install_vector
+ *
+ *  This kernel routine installs the RTEMS handler for the
+ *  specified vector.
+ *
+ *  Input parameters:
+ *    vector      - interrupt vector number
+ *    old_handler - former ISR for this vector number
+ *    new_handler - replacement ISR for this vector number
+ *
+ *  Output parameters:  NONE
+ *
+ *
+ *  OR32 Specific Information:
+ *
+ *  XXX document implementation including references if appropriate
+ */
+
+void _CPU_ISR_install_vector(
+  unsigned32  vector,
+  proc_ptr    new_handler,
+  proc_ptr   *old_handler
+)
+{
+   *old_handler = _ISR_Vector_table[ vector ];
+
+   /*
+    *  If the interrupt vector table is a table of pointer to isr entry
+    *  points, then we need to install the appropriate RTEMS interrupt
+    *  handler for this vector number.
+    */
+
+   _CPU_ISR_install_raw_handler( vector, new_handler, old_handler );
+
+   /*
+    *  We put the actual user ISR address in '_ISR_vector_table'.  This will
+    *  be used by the _ISR_Handler so the user gets control.
+    */
+
+    _ISR_Vector_table[ vector ] = new_handler;
+}
+
+/*PAGE
+ *
+ *  _CPU_Install_interrupt_stack
+ *
+ *  OR32 Specific Information:
+ *
+ *  XXX document implementation including references if appropriate
+ */
+
+void _CPU_Install_interrupt_stack( void )
+{
+}
+
+/*PAGE
+ *
+ *  _CPU_Thread_Idle_body
+ *
+ *  NOTES:
+ *
+ *  1. This is the same as the regular CPU independent algorithm.
+ *
+ *  2. If you implement this using a "halt", "idle", or "shutdown"
+ *     instruction, then don't forget to put it in an infinite loop.
+ *
+ *  3. Be warned. Some processors with onboard DMA have been known
+ *     to stop the DMA if the CPU were put in IDLE mode.  This might
+ *     also be a problem with other on-chip peripherals.  So use this
+ *     hook with caution.
+ *
+ *  OR32 Specific Information:
+ *
+ *  XXX document implementation including references if appropriate
+ */
+
+void _CPU_Thread_Idle_body( void )
+{
+
+  for( ; ; )
+    /* insert your "halt" instruction here */ ;
+}

cpukit/score/cpu/or32/cpu_asm.c

@@ -0,0 +1,183 @@
+/*  cpu_asm.c  ===> cpu_asm.S or cpu_asm.s
+ *
+ *  This file contains the basic algorithms for all assembly code used
+ *  in an specific CPU port of RTEMS.  These algorithms must be implemented
+ *  in assembly language
+ *
+ *  NOTE:  This is supposed to be a .S or .s file NOT a C file.
+ *
+ *  COPYRIGHT (c) 1989-1999.
+ *  On-Line Applications Research Corporation (OAR).
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.OARcorp.com/rtems/license.html.
+ *
+ *  $Id$
+ */
+
+/*
+ *  This is supposed to be an assembly file.  This means that system.h
+ *  and cpu.h should not be included in a "real" cpu_asm file.  An
+ *  implementation in assembly should include "cpu_asm.h>
+ */
+
+#include <rtems/system.h>
+#include <rtems/score/cpu.h>
+/* #include "cpu_asm.h> */
+
+/*
+ *  _CPU_Context_save_fp_context
+ *
+ *  This routine is responsible for saving the FP context
+ *  at *fp_context_ptr.  If the point to load the FP context
+ *  from is changed then the pointer is modified by this routine.
+ *
+ *  Sometimes a macro implementation of this is in cpu.h which dereferences
+ *  the ** and a similarly named routine in this file is passed something
+ *  like a (Context_Control_fp *).  The general rule on making this decision
+ *  is to avoid writing assembly language.
+ *
+ *  OR32 Specific Information:
+ *
+ *  XXX document implementation including references if appropriate
+ */
+
+void _CPU_Context_save_fp(
+  void **fp_context_ptr
+)
+{
+}
+
+/*
+ *  _CPU_Context_restore_fp_context
+ *
+ *  This routine is responsible for restoring the FP context
+ *  at *fp_context_ptr.  If the point to load the FP context
+ *  from is changed then the pointer is modified by this routine.
+ *
+ *  Sometimes a macro implementation of this is in cpu.h which dereferences
+ *  the ** and a similarly named routine in this file is passed something
+ *  like a (Context_Control_fp *).  The general rule on making this decision
+ *  is to avoid writing assembly language.
+ *
+ *  OR32 Specific Information:
+ *
+ *  XXX document implementation including references if appropriate
+ */
+
+void _CPU_Context_restore_fp(
+  void **fp_context_ptr
+)
+{
+}
+
+/*  _CPU_Context_switch
+ *
+ *  This routine performs a normal non-FP context switch.
+ *
+ *  OR32 Specific Information:
+ *
+ *  XXX document implementation including references if appropriate
+ */
+
+void _CPU_Context_switch(
+  Context_Control  *run,
+  Context_Control  *heir
+)
+{
+}
+
+/*
+ *  _CPU_Context_restore
+ *
+ *  This routine is generally used only to restart self in an
+ *  efficient manner.  It may simply be a label in _CPU_Context_switch.
+ *
+ *  NOTE: May be unnecessary to reload some registers.
+ *
+ *  OR32 Specific Information:
+ *
+ *  XXX document implementation including references if appropriate
+ */
+
+void _CPU_Context_restore(
+  Context_Control *new_context
+)
+{
+}
+
+/*  void __ISR_Handler()
+ *
+ *  This routine provides the RTEMS interrupt management.
+ *
+ *  OR32 Specific Information:
+ *
+ *  XXX document implementation including references if appropriate
+ */
+
+void _ISR_Handler()
+{
+   /*
+    *  This discussion ignores a lot of the ugly details in a real
+    *  implementation such as saving enough registers/state to be
+    *  able to do something real.  Keep in mind that the goal is
+    *  to invoke a user's ISR handler which is written in C and
+    *  uses a certain set of registers.
+    *
+    *  Also note that the exact order is to a large extent flexible.
+    *  Hardware will dictate a sequence for a certain subset of
+    *  _ISR_Handler while requirements for setting
+    */
+
+  /*
+   *  At entry to "common" _ISR_Handler, the vector number must be
+   *  available.  On some CPUs the hardware puts either the vector
+   *  number or the offset into the vector table for this ISR in a
+   *  known place.  If the hardware does not give us this information,
+   *  then the assembly portion of RTEMS for this port will contain
+   *  a set of distinct interrupt entry points which somehow place
+   *  the vector number in a known place (which is safe if another
+   *  interrupt nests this one) and branches to _ISR_Handler.
+   *
+   *  save some or all context on stack
+   *  may need to save some special interrupt information for exit
+   *
+   *  #if ( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE )
+   *    if ( _ISR_Nest_level == 0 )
+   *      switch to software interrupt stack
+   *  #endif
+   *
+   *  _ISR_Nest_level++;
+   *
+   *  _Thread_Dispatch_disable_level++;
+   *
+   *  (*_ISR_Vector_table[ vector ])( vector );
+   *
+   *  --_ISR_Nest_level;
+   *
+   *  if ( _ISR_Nest_level )
+   *    goto the label "exit interrupt (simple case)"
+   *
+   *  #if ( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE )
+   *    restore stack
+   *  #endif
+   *  
+   *  if ( !_Context_Switch_necessary )
+   *    goto the label "exit interrupt (simple case)"
+   *  
+   *  if ( !_ISR_Signals_to_thread_executing )
+   *    _ISR_Signals_to_thread_executing = FALSE;
+   *    goto the label "exit interrupt (simple case)"
+   *
+   *  call _Thread_Dispatch() or prepare to return to _ISR_Dispatch
+   *
+   *  prepare to get out of interrupt
+   *  return from interrupt  (maybe to _ISR_Dispatch)
+   *
+   *  LABEL "exit interrupt (simple case):
+   *  prepare to get out of interrupt
+   *  return from interrupt
+   */
+}
+

cpukit/score/cpu/or32/rtems/.cvsignore

@@ -0,0 +1,2 @@
+Makefile
+Makefile.in

cpukit/score/cpu/or32/rtems/asm.h

@@ -0,0 +1,101 @@
+/*  asm.h
+ *
+ *  This include file attempts to address the problems
+ *  caused by incompatible flavors of assemblers and
+ *  toolsets.  It primarily addresses variations in the
+ *  use of leading underscores on symbols and the requirement
+ *  that register names be preceded by a %.
+ *
+ *
+ *  NOTE: The spacing in the use of these macros
+ *        is critical to them working as advertised.
+ *
+ *  COPYRIGHT:
+ *
+ *  This file is based on similar code found in newlib available
+ *  from ftp.cygnus.com.  The file which was used had no copyright
+ *  notice.  This file is freely distributable as long as the source
+ *  of the file is noted.  This file is:
+ *
+ *  COPYRIGHT (c) 1994-1997.
+ *  On-Line Applications Research Corporation (OAR).
+ *
+ *  $Id$
+ */
+
+#ifndef __OR32_ASM_h
+#define __OR32_ASM_h
+
+/*
+ *  Indicate we are in an assembly file and get the basic CPU definitions.
+ */
+
+#ifndef ASM
+#define ASM
+#endif
+#include <rtems/score/cpuopts.h>
+#include <rtems/score/or32.h>
+
+/*
+ *  Recent versions of GNU cpp define variables which indicate the
+ *  need for underscores and percents.  If not using GNU cpp or
+ *  the version does not support this, then you will obviously
+ *  have to define these as appropriate.
+ */
+
+#ifndef __USER_LABEL_PREFIX__
+#define __USER_LABEL_PREFIX__ _
+#endif
+
+#ifndef __REGISTER_PREFIX__
+#define __REGISTER_PREFIX__
+#endif
+
+/* ANSI concatenation macros.  */
+
+#define CONCAT1(a, b) CONCAT2(a, b)
+#define CONCAT2(a, b) a ## b
+
+/* Use the right prefix for global labels.  */
+
+#define SYM(x) CONCAT1 (__USER_LABEL_PREFIX__, x)
+
+/* Use the right prefix for registers.  */
+
+#define REG(x) CONCAT1 (__REGISTER_PREFIX__, x)
+
+/*
+ *  define macros for all of the registers on this CPU
+ *
+ *  EXAMPLE:     #define d0 REG (d0)
+ */
+
+/*
+ *  Define macros to handle section beginning and ends.
+ */
+
+
+#define BEGIN_CODE_DCL .text
+#define END_CODE_DCL
+#define BEGIN_DATA_DCL .data
+#define END_DATA_DCL
+#define BEGIN_CODE .text
+#define END_CODE
+#define BEGIN_DATA
+#define END_DATA
+#define BEGIN_BSS
+#define END_BSS
+#define END
+
+/*
+ *  Following must be tailor for a particular flavor of the C compiler.
+ *  They may need to put underscores in front of the symbols.
+ */
+
+#define PUBLIC(sym) .globl SYM (sym)
+#define EXTERN(sym) .globl SYM (sym)
+
+#endif
+/* end of include file */
+
+

cpukit/score/cpu/or32/rtems/score/.cvsignore

@@ -0,0 +1,2 @@
+Makefile
+Makefile.in

cpukit/score/cpu/or32/rtems/score/cpu_asm.h

@@ -0,0 +1,70 @@
+/*
+ *  cpu_asm.h
+ *
+ *  Very loose template for an include file for the cpu_asm.? file
+ *  if it is implemented as a ".S" file (preprocessed by cpp) instead
+ *  of a ".s" file (preprocessed by gm4 or gasp).
+ *
+ *  COPYRIGHT (c) 1989-1999.
+ *  On-Line Applications Research Corporation (OAR).
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.OARcorp.com/rtems/license.html.
+ *
+ *  $Id$
+ *
+ */
+
+#ifndef __CPU_ASM_h
+#define __CPU_ASM_h
+
+/* pull in the generated offsets */
+
+#include <rtems/score/offsets.h>
+
+/*
+ * Hardware General Registers
+ */
+
+/* put something here */
+
+/*
+ * Hardware Floating Point Registers
+ */
+
+/* put something here */
+
+/*
+ * Hardware Control Registers
+ */
+
+/* put something here */
+
+/*
+ * Calling Convention
+ */
+
+/* put something here */
+
+/*
+ * Temporary registers
+ */
+
+/* put something here */
+
+/*
+ * Floating Point Registers - SW Conventions
+ */
+
+/* put something here */
+
+/*
+ * Temporary floating point registers
+ */
+
+/* put something here */
+
+#endif
+
+/* end of file */

cpukit/score/cpu/or32/rtems/score/or32.h

@@ -0,0 +1,70 @@
+/*  or32.h
+ *
+ *  This file sets up basic CPU dependency settings based on 
+ *  compiler settings.  For example, it can determine if
+ *  floating point is available.  This particular implementation
+ *  is specified to the OPENCORES.ORG OR32 port.
+ *
+ *
+ *  COPYRIGHT (c) 1989-1999.
+ *  On-Line Applications Research Corporation (OAR).
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.OARcorp.com/rtems/license.html.
+ *
+ *  $Id$
+ *
+ */
+
+#ifndef _INCLUDE_OR32_h
+#define _INCLUDE_OR32_h
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ *  This file contains the information required to build
+ *  RTEMS for a particular member of the OPENCORES.ORG OR32 family.
+ *  It does this by setting variables to indicate which
+ *  implementation dependent features are present in a particular
+ *  member of the family.
+ *
+ *  This is a good place to list all the known CPU models
+ *  that this port supports and which RTEMS CPU model they correspond
+ *  to.
+ */
+ 
+#if defined(rtems_multilib)
+/*
+ *  Figure out all CPU Model Feature Flags based upon compiler 
+ *  predefines. 
+ */
+
+#define CPU_MODEL_NAME  "rtems_multilib"
+#define OR32_HAS_FPU     1
+
+#elif defined(or32)
+ 
+#define CPU_MODEL_NAME  "or32_model"
+#define OR32_HAS_FPU     1
+ 
+#else
+ 
+#error "Unsupported CPU Model"
+ 
+#endif
+
+/*
+ *  Define the name of the CPU family.
+ */
+
+#define CPU_NAME "OPENCORES.ORG OR32"
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ! _INCLUDE_OR32_h */
+/* end of include file */

cpukit/score/cpu/or32/rtems/score/types.h

@@ -0,0 +1,56 @@
+/*  or32types.h
+ *
+ *  This include file contains type definitions pertaining to the Intel
+ *  or32 processor family.
+ *
+ *  COPYRIGHT (c) 1989-1999.
+ *  On-Line Applications Research Corporation (OAR).
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.OARcorp.com/rtems/license.html.
+ *
+ *  $Id$
+ */
+
+#ifndef __OR32_TYPES_h
+#define __OR32_TYPES_h
+
+#ifndef ASM
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ *  This section defines the basic types for this processor.
+ */
+
+typedef unsigned char  unsigned8;      /* unsigned 8-bit  integer */
+typedef unsigned short unsigned16;     /* unsigned 16-bit integer */
+typedef unsigned int   unsigned32;     /* unsigned 32-bit integer */
+typedef unsigned long long unsigned64; /* unsigned 64-bit integer */
+
+typedef unsigned16     Priority_Bit_map_control;
+
+typedef signed char      signed8;      /* 8-bit  signed integer */
+typedef signed short     signed16;     /* 16-bit signed integer */
+typedef signed int       signed32;     /* 32-bit signed integer */
+typedef signed long long signed64;     /* 64 bit signed integer */
+
+typedef unsigned32 boolean;     /* Boolean value   */
+
+typedef float          single_precision;     /* single precision float */
+typedef double         double_precision;     /* double precision float */
+
+typedef void or32_isr;
+typedef void ( *or32_isr_entry )( void );
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif  /* !ASM */
+
+#endif
+/* end of include file */