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m68k/csb360: Fix warnings

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This commit is contained in:
Joel Sherrill
2014-10-19 21:27:09 -05:00
parent 3d4898f74e
commit 4f21badbb9
3 changed files with 74 additions and 75 deletions
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5
c/src/lib/libbsp/m68k/csb360/include/bsp.h
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@@ -178,6 +178,11 @@ rtems_isr_entry set_vector(
int type int type
); );
/*
* Prototypes for BSP methods which cross file boundaries
*/
void init5272(void);
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif

4
c/src/lib/libbsp/m68k/csb360/start/start.S
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@@ -5,7 +5,9 @@
* The name of this entry point is compiler dependent. * The name of this entry point is compiler dependent.
* It jumps to the BSP which is responsible for performing * It jumps to the BSP which is responsible for performing
* all initialization. * all initialization.
* */
/*
* Copyright (C) 2004 Cogent Computer Systems * Copyright (C) 2004 Cogent Computer Systems
* Author: Jay Monkman <jtm@lopingdog.com> * Author: Jay Monkman <jtm@lopingdog.com>
* *

24
c/src/lib/libbsp/m68k/csb360/startup/init5272.c
View File

@@ -8,7 +8,9 @@
* This initialization code based on hardware settings of dBUG * This initialization code based on hardware settings of dBUG
* monitor. This must be changed if you like to run it immediately * monitor. This must be changed if you like to run it immediately
* after reset. * after reset.
* */
/*
* Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russia * Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russia
* Author: Victor V. Vengerov <vvv@oktet.ru> * Author: Victor V. Vengerov <vvv@oktet.ru>
* *
@@ -25,7 +27,6 @@
* http://www.rtems.org/license/LICENSE. * http://www.rtems.org/license/LICENSE.
*/ */
#include <rtems.h>
#include <bsp.h> #include <bsp.h>
#include <mcf5272/mcf5272.h> #include <mcf5272/mcf5272.h>
@@ -71,17 +72,10 @@ usb_regs_t *g_usb_regs = (void *) MCF5272_USB_BASE(BSP_MBAR);
"nop\n\t" \ "nop\n\t" \
: : "d" (MCF5272_CACR_CINV) ) : : "d" (MCF5272_CACR_CINV) )
/* init5272 -- /*
* Initialize MCF5272 on-chip modules * Initialize MCF5272 on-chip modules
*
* PARAMETERS:
* none
*
* RETURNS:
* none
*/ */
void void init5272(void)
init5272(void)
{ {
/* Invalidate the cache - WARNING: It won't complete for 64 clocks */ /* Invalidate the cache - WARNING: It won't complete for 64 clocks */
m68k_set_cacr(MCF5272_CACR_CINV); m68k_set_cacr(MCF5272_CACR_CINV);
@@ -113,8 +107,7 @@ init5272(void)
uint32_t *inttab = (uint32_t *)&INTERRUPT_VECTOR; uint32_t *inttab = (uint32_t *)&INTERRUPT_VECTOR;
uint32_t *intvec = (uint32_t *)BSP_RAMBAR; uint32_t *intvec = (uint32_t *)BSP_RAMBAR;
register int i; register int i;
for (i = 0; i < 256; i++) for (i = 0; i < 256; i++) {
{
*(intvec++) = *(inttab++); *(intvec++) = *(inttab++);
} }
} }
@@ -125,7 +118,6 @@ init5272(void)
* Setup ACRs so that if cache turned on, periphal accesses * Setup ACRs so that if cache turned on, periphal accesses
* are not messed up. (Non-cacheable, serialized) * are not messed up. (Non-cacheable, serialized)
*/ */
m68k_set_acr0(MCF5272_ACR_BASE(BSP_MEM_ADDR_SDRAM) | m68k_set_acr0(MCF5272_ACR_BASE(BSP_MEM_ADDR_SDRAM) |
MCF5272_ACR_MASK(BSP_MEM_MASK_SDRAM) | MCF5272_ACR_MASK(BSP_MEM_MASK_SDRAM) |
MCF5272_ACR_EN | MCF5272_ACR_EN |
@@ -142,11 +134,11 @@ init5272(void)
m68k_set_cacr(MCF5272_CACR_CENB | m68k_set_cacr(MCF5272_CACR_CENB |
MCF5272_CACR_DCM); /* Default is not cached */ MCF5272_CACR_DCM); /* Default is not cached */
/* /*
* Copy data, clear BSS, switch stacks and call boot_card() * Copy data, clear BSS, switch stacks and call boot_card()
*/ */
/* /*
CopyDataClearBSSAndStart(BSP_MEM_SIZE_ESRAM - 0x400); CopyDataClearBSSAndStart(BSP_MEM_SIZE_ESRAM - 0x400);
*/ */
clear_bss(); clear_bss();
start_csb360(); start_csb360();