forked from Imagelibrary/rtems
DRVMGR: KEY_TYPE now a enum drvmgr_kt
This commit is contained in:
@@ -497,7 +497,7 @@ static int at697pci_init(struct at697pci_priv *priv)
|
||||
/* User may override hardcoded IRQ setup */
|
||||
keyname_sysirq[3] = 'A' + (pin-1);
|
||||
value = drvmgr_dev_key_get(priv->dev,
|
||||
keyname_sysirq, KEY_TYPE_INT);
|
||||
keyname_sysirq, DRVMGR_KT_INT);
|
||||
if ( value )
|
||||
at697_pci_irq_table[pin-1] = value->i;
|
||||
}
|
||||
@@ -505,7 +505,7 @@ static int at697pci_init(struct at697pci_priv *priv)
|
||||
/* User may override hardcoded IRQ setup */
|
||||
keyname_pio[3] = 'A' + (pin-1);
|
||||
value = drvmgr_dev_key_get(priv->dev,
|
||||
keyname_pio, KEY_TYPE_INT);
|
||||
keyname_pio, DRVMGR_KT_INT);
|
||||
if ( value )
|
||||
at697_pci_irq_pio_table[pin-1] = value->i;
|
||||
}
|
||||
@@ -517,13 +517,13 @@ static int at697pci_init(struct at697pci_priv *priv)
|
||||
* Defualt is to map system RAM at pci address 0x40000000 and system
|
||||
* SDRAM to pci address 0x60000000
|
||||
*/
|
||||
value = drvmgr_dev_key_get(priv->dev, "tgtbar1", KEY_TYPE_INT);
|
||||
value = drvmgr_dev_key_get(priv->dev, "tgtbar1", DRVMGR_KT_INT);
|
||||
if (value)
|
||||
priv->bar1_pci_adr = value->i;
|
||||
else
|
||||
priv->bar1_pci_adr = SYSTEM_MAINMEM_START; /* default */
|
||||
|
||||
value = drvmgr_dev_key_get(priv->dev, "tgtbar2", KEY_TYPE_INT);
|
||||
value = drvmgr_dev_key_get(priv->dev, "tgtbar2", DRVMGR_KT_INT);
|
||||
if (value)
|
||||
priv->bar2_pci_adr = value->i;
|
||||
else
|
||||
|
||||
@@ -454,7 +454,7 @@ int b1553brm_device_init(brm_priv *pDev)
|
||||
#endif
|
||||
|
||||
/* Get memory configuration from bus resources */
|
||||
value = drvmgr_dev_key_get(pDev->dev, "dmaBaseAdr", KEY_TYPE_POINTER);
|
||||
value = drvmgr_dev_key_get(pDev->dev, "dmaBaseAdr", DRVMGR_KT_POINTER);
|
||||
if (value)
|
||||
mem = (unsigned int)value->ptr;
|
||||
|
||||
@@ -505,17 +505,17 @@ int b1553brm_device_init(brm_priv *pDev)
|
||||
pDev->cfg_clkdiv = 0;
|
||||
pDev->cfg_freq = BRM_FREQ_24MHZ;
|
||||
|
||||
value = drvmgr_dev_key_get(pDev->dev, "clkSel", KEY_TYPE_INT);
|
||||
value = drvmgr_dev_key_get(pDev->dev, "clkSel", DRVMGR_KT_INT);
|
||||
if ( value ) {
|
||||
pDev->cfg_clksel = value->i & CLKSEL_MASK;
|
||||
}
|
||||
|
||||
value = drvmgr_dev_key_get(pDev->dev, "clkDiv", KEY_TYPE_INT);
|
||||
value = drvmgr_dev_key_get(pDev->dev, "clkDiv", DRVMGR_KT_INT);
|
||||
if ( value ) {
|
||||
pDev->cfg_clkdiv = value->i & CLKDIV_MASK;
|
||||
}
|
||||
|
||||
value = drvmgr_dev_key_get(pDev->dev, "coreFreq", KEY_TYPE_INT);
|
||||
value = drvmgr_dev_key_get(pDev->dev, "coreFreq", DRVMGR_KT_INT);
|
||||
if ( value ) {
|
||||
pDev->cfg_freq = value->i & BRM_FREQ_MASK;
|
||||
}
|
||||
|
||||
@@ -300,7 +300,7 @@ int b1553rt_device_init(rt_priv *pDev)
|
||||
#endif
|
||||
|
||||
/* Get memory configuration from bus resources */
|
||||
value = drvmgr_dev_key_get(pDev->dev, "dmaBaseAdr", KEY_TYPE_POINTER);
|
||||
value = drvmgr_dev_key_get(pDev->dev, "dmaBaseAdr", DRVMGR_KT_POINTER);
|
||||
if (value)
|
||||
mem = (unsigned int)value->ptr;
|
||||
|
||||
@@ -362,7 +362,7 @@ int b1553rt_device_init(rt_priv *pDev)
|
||||
}
|
||||
}
|
||||
|
||||
value = drvmgr_dev_key_get(pDev->dev, "coreFreq", KEY_TYPE_INT);
|
||||
value = drvmgr_dev_key_get(pDev->dev, "coreFreq", DRVMGR_KT_INT);
|
||||
if ( value ) {
|
||||
pDev->cfg_freq = value->i & RT_FREQ_MASK;
|
||||
}
|
||||
|
||||
@@ -1267,19 +1267,19 @@ static rtems_device_driver grcan_open(rtems_device_major_number major, rtems_dev
|
||||
pDev->rxbuf_size = RX_BUF_SIZE;
|
||||
|
||||
/* Override default buffer sizes if available from bus resource */
|
||||
value = drvmgr_dev_key_get(pDev->dev, "txBufSize", KEY_TYPE_INT);
|
||||
value = drvmgr_dev_key_get(pDev->dev, "txBufSize", DRVMGR_KT_INT);
|
||||
if ( value )
|
||||
pDev->txbuf_size = value->i;
|
||||
|
||||
value = drvmgr_dev_key_get(pDev->dev, "rxBufSize", KEY_TYPE_INT);
|
||||
value = drvmgr_dev_key_get(pDev->dev, "rxBufSize", DRVMGR_KT_INT);
|
||||
if ( value )
|
||||
pDev->rxbuf_size = value->i;
|
||||
|
||||
value = drvmgr_dev_key_get(pDev->dev, "txBufAdr", KEY_TYPE_POINTER);
|
||||
value = drvmgr_dev_key_get(pDev->dev, "txBufAdr", DRVMGR_KT_POINTER);
|
||||
if ( value )
|
||||
pDev->txbuf_adr = value->ptr;
|
||||
|
||||
value = drvmgr_dev_key_get(pDev->dev, "rxBufAdr", KEY_TYPE_POINTER);
|
||||
value = drvmgr_dev_key_get(pDev->dev, "rxBufAdr", DRVMGR_KT_POINTER);
|
||||
if ( value )
|
||||
pDev->rxbuf_adr = value->ptr;
|
||||
|
||||
|
||||
@@ -157,7 +157,7 @@ int ambapp_leon2_init1(struct drvmgr_dev *dev)
|
||||
|
||||
/* Try to get Configuration from resource configuration */
|
||||
|
||||
value = drvmgr_dev_key_get(dev, "busFreq", KEY_TYPE_INT);
|
||||
value = drvmgr_dev_key_get(dev, "busFreq", DRVMGR_KT_INT);
|
||||
if (value) {
|
||||
/* Set frequency of AMBA bus if specified by user. The frequency
|
||||
* must be for AHB bus which IOAREA matches (AHB bus 0).
|
||||
@@ -173,7 +173,7 @@ int ambapp_leon2_init1(struct drvmgr_dev *dev)
|
||||
/* Note that this can be overrided by a driver on the AMBA PnP bus.*/
|
||||
ambapp_freq_init(&priv->abus, NULL, freq_hz);
|
||||
|
||||
value = drvmgr_dev_key_get(dev, "drvRes", KEY_TYPE_POINTER);
|
||||
value = drvmgr_dev_key_get(dev, "drvRes", DRVMGR_KT_POINTER);
|
||||
if (!value) {
|
||||
DBG("ambapp_leon2_init1: Failed getting resource drvRes\n");
|
||||
config->resources = NULL;
|
||||
|
||||
@@ -81,40 +81,40 @@ struct leon2_isr_handler {
|
||||
|
||||
struct drvmgr_key leon2_timers[] =
|
||||
{
|
||||
{"REG0", KEY_TYPE_INT, {0x80000040}},
|
||||
{"IRQ0", KEY_TYPE_INT, {8}},
|
||||
{"IRQ1", KEY_TYPE_INT, {9}},
|
||||
KEY_EMPTY
|
||||
{"REG0", DRVMGR_KT_INT, {0x80000040}},
|
||||
{"IRQ0", DRVMGR_KT_INT, {8}},
|
||||
{"IRQ1", DRVMGR_KT_INT, {9}},
|
||||
DRVMGR_KEY_EMPTY
|
||||
};
|
||||
|
||||
struct drvmgr_key leon2_uart1[] =
|
||||
{
|
||||
{"REG0", KEY_TYPE_INT, {0x80000070}},
|
||||
{"IRQ0", KEY_TYPE_INT, {3}},
|
||||
KEY_EMPTY
|
||||
{"REG0", DRVMGR_KT_INT, {0x80000070}},
|
||||
{"IRQ0", DRVMGR_KT_INT, {3}},
|
||||
DRVMGR_KEY_EMPTY
|
||||
};
|
||||
|
||||
struct drvmgr_key leon2_uart2[] =
|
||||
{
|
||||
{"REG0", KEY_TYPE_INT, {0x80000080}},
|
||||
{"IRQ0", KEY_TYPE_INT, {2}},
|
||||
KEY_EMPTY
|
||||
{"REG0", DRVMGR_KT_INT, {0x80000080}},
|
||||
{"IRQ0", DRVMGR_KT_INT, {2}},
|
||||
DRVMGR_KEY_EMPTY
|
||||
};
|
||||
|
||||
struct drvmgr_key leon2_irqctrl[] =
|
||||
{
|
||||
{"REG0", KEY_TYPE_INT, {0x80000090}},
|
||||
KEY_EMPTY
|
||||
{"REG0", DRVMGR_KT_INT, {0x80000090}},
|
||||
DRVMGR_KEY_EMPTY
|
||||
};
|
||||
|
||||
struct drvmgr_key leon2_gpio0[] =
|
||||
{
|
||||
{"REG0", KEY_TYPE_INT, {0x800000A0}},
|
||||
{"IRQ0", KEY_TYPE_INT, {4}},
|
||||
{"IRQ1", KEY_TYPE_INT, {5}},
|
||||
{"IRQ2", KEY_TYPE_INT, {6}},
|
||||
{"IRQ3", KEY_TYPE_INT, {7}},
|
||||
KEY_EMPTY
|
||||
{"REG0", DRVMGR_KT_INT, {0x800000A0}},
|
||||
{"IRQ0", DRVMGR_KT_INT, {4}},
|
||||
{"IRQ1", DRVMGR_KT_INT, {5}},
|
||||
{"IRQ2", DRVMGR_KT_INT, {6}},
|
||||
{"IRQ3", DRVMGR_KT_INT, {7}},
|
||||
DRVMGR_KEY_EMPTY
|
||||
};
|
||||
|
||||
struct leon2_core leon2_std_cores[] =
|
||||
@@ -163,7 +163,7 @@ static int leon2_amba_dev_register(
|
||||
info->core_id = core->id.core_id;
|
||||
|
||||
/* Get information from bus configuration */
|
||||
value = drvmgr_key_val_get(core->keys, "REG0", KEY_TYPE_INT);
|
||||
value = drvmgr_key_val_get(core->keys, "REG0", DRVMGR_KT_INT);
|
||||
if ( !value ) {
|
||||
printk("leon2_amba_dev_register: Failed getting resource REG0\n");
|
||||
info->reg_base = 0x00000000;
|
||||
@@ -183,7 +183,7 @@ static int leon2_amba_dev_register(
|
||||
irq_name[5] = '\0';
|
||||
}
|
||||
|
||||
value = drvmgr_key_val_get(core->keys, irq_name, KEY_TYPE_INT);
|
||||
value = drvmgr_key_val_get(core->keys, irq_name, DRVMGR_KT_INT);
|
||||
if ( !value ) {
|
||||
DBG("leon2_amba_dev_register: Failed getting resource IRQ%d for REG 0x%x\n", i, info->reg_base);
|
||||
info->irqs[i] = 0;
|
||||
|
||||
@@ -415,7 +415,7 @@ int grgpio_device_init(struct grgpio_priv *priv)
|
||||
/* Let the user configure the port count, this might be needed
|
||||
* when the GPIO lines must not be changed (assigned during bootup)
|
||||
*/
|
||||
value = drvmgr_dev_key_get(priv->dev, "nBits", KEY_TYPE_INT);
|
||||
value = drvmgr_dev_key_get(priv->dev, "nBits", DRVMGR_KT_INT);
|
||||
if ( value ) {
|
||||
priv->port_cnt = value->i;
|
||||
} else {
|
||||
@@ -434,7 +434,7 @@ int grgpio_device_init(struct grgpio_priv *priv)
|
||||
/* Let the user configure the BYPASS register, this might be needed
|
||||
* to select which cores can do I/O on a pin.
|
||||
*/
|
||||
value = drvmgr_dev_key_get(priv->dev, "bypass", KEY_TYPE_INT);
|
||||
value = drvmgr_dev_key_get(priv->dev, "bypass", DRVMGR_KT_INT);
|
||||
if ( value ) {
|
||||
priv->bypass = value->i;
|
||||
} else {
|
||||
|
||||
@@ -153,7 +153,7 @@ static int mctrl_init1(struct drvmgr_dev *dev)
|
||||
strcpy(res_name, "mcfgX");
|
||||
for(i=0; i<8; i++) {
|
||||
res_name[4] = '1' + i;
|
||||
value = drvmgr_dev_key_get(priv->dev, res_name, KEY_TYPE_INT);
|
||||
value = drvmgr_dev_key_get(priv->dev, res_name, DRVMGR_KT_INT);
|
||||
if ( value ) {
|
||||
priv->mcfg[i] = value->i;
|
||||
priv->configured |= (1<<i);
|
||||
@@ -174,12 +174,12 @@ static int mctrl_init1(struct drvmgr_dev *dev)
|
||||
for (i=0; i<9; i++) {
|
||||
strcpy(res_name, "washXStart");
|
||||
res_name[4] = '0' + i;
|
||||
value = drvmgr_dev_key_get(priv->dev, res_name, KEY_TYPE_INT);
|
||||
value = drvmgr_dev_key_get(priv->dev, res_name, DRVMGR_KT_INT);
|
||||
if ( value ) {
|
||||
start = value->i;
|
||||
strcpy(res_name, "washXLength");
|
||||
res_name[4] = '0' + i;
|
||||
value = drvmgr_dev_key_get(priv->dev, res_name, KEY_TYPE_INT);
|
||||
value = drvmgr_dev_key_get(priv->dev, res_name, DRVMGR_KT_INT);
|
||||
if ( value ) {
|
||||
length = value->i;
|
||||
|
||||
|
||||
@@ -1443,15 +1443,15 @@ int greth_device_init(struct greth_softc *sc)
|
||||
sc->rxbufs = 32;
|
||||
sc->phyaddr = -1;
|
||||
|
||||
value = drvmgr_dev_key_get(sc->dev, "txDescs", KEY_TYPE_INT);
|
||||
value = drvmgr_dev_key_get(sc->dev, "txDescs", DRVMGR_KT_INT);
|
||||
if ( value && (value->i <= 128) )
|
||||
sc->txbufs = value->i;
|
||||
|
||||
value = drvmgr_dev_key_get(sc->dev, "rxDescs", KEY_TYPE_INT);
|
||||
value = drvmgr_dev_key_get(sc->dev, "rxDescs", DRVMGR_KT_INT);
|
||||
if ( value && (value->i <= 128) )
|
||||
sc->rxbufs = value->i;
|
||||
|
||||
value = drvmgr_dev_key_get(sc->dev, "phyAdr", KEY_TYPE_INT);
|
||||
value = drvmgr_dev_key_get(sc->dev, "phyAdr", DRVMGR_KT_INT);
|
||||
if ( value && (value->i < 32) )
|
||||
sc->phyaddr = value->i;
|
||||
|
||||
|
||||
@@ -516,7 +516,7 @@ int gr_cpci_leon4_n2x_init1(struct drvmgr_dev *dev)
|
||||
*
|
||||
* Only the 2 MSB bits have an effect.
|
||||
*/
|
||||
value = drvmgr_dev_key_get(priv->dev, "ahbmst2pci", KEY_TYPE_INT);
|
||||
value = drvmgr_dev_key_get(priv->dev, "ahbmst2pci", DRVMGR_KT_INT);
|
||||
if (value)
|
||||
priv->ahbmst2pci_map = value->i;
|
||||
else
|
||||
@@ -525,7 +525,7 @@ int gr_cpci_leon4_n2x_init1(struct drvmgr_dev *dev)
|
||||
/* Let user override the default AMBA system frequency of the
|
||||
* CPU-bus of the remote GR-CPCI-LEON4-N2X. Default is 200MHz.
|
||||
*/
|
||||
value = drvmgr_dev_key_get(priv->dev, "ambaFreq", KEY_TYPE_INT);
|
||||
value = drvmgr_dev_key_get(priv->dev, "ambaFreq", DRVMGR_KT_INT);
|
||||
if (value)
|
||||
priv->amba_freq_hz = value->i;
|
||||
else
|
||||
@@ -534,7 +534,7 @@ int gr_cpci_leon4_n2x_init1(struct drvmgr_dev *dev)
|
||||
/* Let user determine clock-gating unit configuration. The default
|
||||
* is to turn all cores on (disable gating). PCI is always turned ON.
|
||||
*/
|
||||
value = drvmgr_dev_key_get(priv->dev, "cgEnMask", KEY_TYPE_INT);
|
||||
value = drvmgr_dev_key_get(priv->dev, "cgEnMask", DRVMGR_KT_INT);
|
||||
if (value)
|
||||
priv->cg_en_mask = (value->i & CG_MASK) | 0x08;
|
||||
else
|
||||
|
||||
@@ -418,7 +418,7 @@ int gr_rasta_adcdac_init1(struct drvmgr_dev *dev)
|
||||
* goes out on the PCI bus.
|
||||
* Only the 4 MSB bits have an effect;
|
||||
*/
|
||||
value = drvmgr_dev_key_get(priv->dev, "ahbmst2pci", KEY_TYPE_INT);
|
||||
value = drvmgr_dev_key_get(priv->dev, "ahbmst2pci", DRVMGR_KT_INT);
|
||||
if (value)
|
||||
priv->ahbmst2pci_map = value->i;
|
||||
else
|
||||
|
||||
@@ -597,7 +597,7 @@ int gr_rasta_io_init1(struct drvmgr_dev *dev)
|
||||
* goes out on the PCI bus.
|
||||
* Only the 4 MSB bits have an effect;
|
||||
*/
|
||||
value = drvmgr_dev_key_get(priv->dev, "ahbmst2pci", KEY_TYPE_INT);
|
||||
value = drvmgr_dev_key_get(priv->dev, "ahbmst2pci", DRVMGR_KT_INT);
|
||||
if (value)
|
||||
priv->ahbmst2pci_map = value->i;
|
||||
else
|
||||
|
||||
@@ -430,7 +430,7 @@ int gr_rasta_spw_router_init1(struct drvmgr_dev *dev)
|
||||
* goes out on the PCI bus.
|
||||
* Only the 4 MSB bits have an effect;
|
||||
*/
|
||||
value = drvmgr_dev_key_get(priv->dev, "ahbmst2pci", KEY_TYPE_INT);
|
||||
value = drvmgr_dev_key_get(priv->dev, "ahbmst2pci", DRVMGR_KT_INT);
|
||||
if (value)
|
||||
priv->ahbmst2pci_map = value->i;
|
||||
else
|
||||
|
||||
@@ -609,7 +609,7 @@ int gr_rasta_tmtc_init1(struct drvmgr_dev *dev)
|
||||
* goes out on the PCI bus.
|
||||
* Only the 4 MSB bits have an effect;
|
||||
*/
|
||||
value = drvmgr_dev_key_get(priv->dev, "ahbmst2pci", KEY_TYPE_INT);
|
||||
value = drvmgr_dev_key_get(priv->dev, "ahbmst2pci", DRVMGR_KT_INT);
|
||||
if (value)
|
||||
priv->ahbmst2pci_map = value->i;
|
||||
else
|
||||
|
||||
@@ -545,21 +545,21 @@ static int grpci_init(struct grpci_priv *priv)
|
||||
|
||||
/* User may override Both hardcoded IRQ setup and Plug & Play IRQ */
|
||||
keyname[3] = 'A' + (pin-1);
|
||||
value = drvmgr_dev_key_get(priv->dev, keyname, KEY_TYPE_INT);
|
||||
value = drvmgr_dev_key_get(priv->dev, keyname, DRVMGR_KT_INT);
|
||||
if ( value )
|
||||
grpci_pci_irq_table[pin-1] = value->i;
|
||||
}
|
||||
}
|
||||
|
||||
/* User may override DEFAULT_BT_ENABLED to enable/disable byte twisting */
|
||||
value = drvmgr_dev_key_get(priv->dev, "byteTwisting", KEY_TYPE_INT);
|
||||
value = drvmgr_dev_key_get(priv->dev, "byteTwisting", DRVMGR_KT_INT);
|
||||
if ( value )
|
||||
priv->bt_enabled = value->i;
|
||||
|
||||
/* Use GRPCI target BAR1 to map CPU RAM to PCI, this is to make it
|
||||
* possible for PCI peripherals to do DMA directly to CPU memory.
|
||||
*/
|
||||
value = drvmgr_dev_key_get(priv->dev, "tgtbar1", KEY_TYPE_INT);
|
||||
value = drvmgr_dev_key_get(priv->dev, "tgtbar1", DRVMGR_KT_INT);
|
||||
if (value)
|
||||
priv->bar1_pci_adr = value->i;
|
||||
else
|
||||
|
||||
@@ -761,7 +761,7 @@ static int grpci2_init(struct grpci2_priv *priv)
|
||||
|
||||
/* User may override Both hardcoded IRQ setup and Plug & Play IRQ */
|
||||
keyname[3] = 'A' + (pin-1);
|
||||
value = drvmgr_dev_key_get(priv->dev, keyname, KEY_TYPE_INT);
|
||||
value = drvmgr_dev_key_get(priv->dev, keyname, DRVMGR_KT_INT);
|
||||
if (value)
|
||||
grpci2_pci_irq_table[pin-1] = value->i;
|
||||
}
|
||||
@@ -772,12 +772,12 @@ static int grpci2_init(struct grpci2_priv *priv)
|
||||
}
|
||||
|
||||
/* User may override DEFAULT_BT_ENABLED to enable/disable byte twisting */
|
||||
value = drvmgr_dev_key_get(priv->dev, "byteTwisting", KEY_TYPE_INT);
|
||||
value = drvmgr_dev_key_get(priv->dev, "byteTwisting", DRVMGR_KT_INT);
|
||||
if (value)
|
||||
priv->bt_enabled = value->i;
|
||||
|
||||
/* Let user Configure the 6 target BARs */
|
||||
value = drvmgr_dev_key_get(priv->dev, "tgtBarCfg", KEY_TYPE_POINTER);
|
||||
value = drvmgr_dev_key_get(priv->dev, "tgtBarCfg", DRVMGR_KT_POINTER);
|
||||
if (value)
|
||||
priv->barcfg = value->ptr;
|
||||
else
|
||||
|
||||
@@ -457,14 +457,14 @@ static int pcif_init(struct pcif_priv *priv)
|
||||
|
||||
/* User may override Plug & Play IRQ */
|
||||
keyname[3] = 'A' + (pin-1);
|
||||
value = drvmgr_dev_key_get(priv->dev, keyname, KEY_TYPE_INT);
|
||||
value = drvmgr_dev_key_get(priv->dev, keyname, DRVMGR_KT_INT);
|
||||
if ( value )
|
||||
pcif_pci_irq_table[pin-1] = value->i;
|
||||
}
|
||||
}
|
||||
|
||||
priv->irq_mask = 0xf;
|
||||
value = drvmgr_dev_key_get(priv->dev, "", KEY_TYPE_INT);
|
||||
value = drvmgr_dev_key_get(priv->dev, "", DRVMGR_KT_INT);
|
||||
if ( value )
|
||||
priv->irq_mask = value->i & 0xf;
|
||||
|
||||
|
||||
@@ -1005,7 +1005,7 @@ int spictrl_device_init(struct spictrl_priv *priv)
|
||||
priv->regs->mode = 0;
|
||||
|
||||
/* Get custom */
|
||||
value = drvmgr_dev_key_get(priv->dev, "slvSelFunc", KEY_TYPE_POINTER);
|
||||
value = drvmgr_dev_key_get(priv->dev, "slvSelFunc", DRVMGR_KT_POINTER);
|
||||
if ( value ) {
|
||||
priv->slvSelFunc = value->ptr;
|
||||
}
|
||||
|
||||
@@ -536,39 +536,39 @@ int grspw_device_init(GRSPW_DEV *pDev)
|
||||
|
||||
/* Get Configuration from Bus resources (Let user override defaults) */
|
||||
|
||||
value = drvmgr_dev_key_get(pDev->dev, "txBdCnt", KEY_TYPE_INT);
|
||||
value = drvmgr_dev_key_get(pDev->dev, "txBdCnt", DRVMGR_KT_INT);
|
||||
if ( value )
|
||||
pDev->txbufcnt = value->i;
|
||||
|
||||
value = drvmgr_dev_key_get(pDev->dev, "rxBdCnt", KEY_TYPE_INT);
|
||||
value = drvmgr_dev_key_get(pDev->dev, "rxBdCnt", DRVMGR_KT_INT);
|
||||
if ( value )
|
||||
pDev->rxbufcnt = value->i;
|
||||
|
||||
value = drvmgr_dev_key_get(pDev->dev, "txDataSize", KEY_TYPE_INT);
|
||||
value = drvmgr_dev_key_get(pDev->dev, "txDataSize", DRVMGR_KT_INT);
|
||||
if ( value )
|
||||
pDev->txdbufsize = value->i;
|
||||
|
||||
value = drvmgr_dev_key_get(pDev->dev, "txHdrSize", KEY_TYPE_INT);
|
||||
value = drvmgr_dev_key_get(pDev->dev, "txHdrSize", DRVMGR_KT_INT);
|
||||
if ( value )
|
||||
pDev->txhbufsize = value->i;
|
||||
|
||||
value = drvmgr_dev_key_get(pDev->dev, "rxPktSize", KEY_TYPE_INT);
|
||||
value = drvmgr_dev_key_get(pDev->dev, "rxPktSize", DRVMGR_KT_INT);
|
||||
if ( value )
|
||||
pDev->rxbufsize = value->i;
|
||||
|
||||
value = drvmgr_dev_key_get(pDev->dev, "rxDmaArea", KEY_TYPE_INT);
|
||||
value = drvmgr_dev_key_get(pDev->dev, "rxDmaArea", DRVMGR_KT_INT);
|
||||
if ( value )
|
||||
pDev->rx_dma_area = value->i;
|
||||
|
||||
value = drvmgr_dev_key_get(pDev->dev, "txDataDmaArea", KEY_TYPE_INT);
|
||||
value = drvmgr_dev_key_get(pDev->dev, "txDataDmaArea", DRVMGR_KT_INT);
|
||||
if ( value )
|
||||
pDev->tx_data_dma_area = value->i;
|
||||
|
||||
value = drvmgr_dev_key_get(pDev->dev, "txHdrDmaArea", KEY_TYPE_INT);
|
||||
value = drvmgr_dev_key_get(pDev->dev, "txHdrDmaArea", DRVMGR_KT_INT);
|
||||
if ( value )
|
||||
pDev->tx_hdr_dma_area = value->i;
|
||||
|
||||
value = drvmgr_dev_key_get(pDev->dev, "bdDmaArea", KEY_TYPE_INT);
|
||||
value = drvmgr_dev_key_get(pDev->dev, "bdDmaArea", DRVMGR_KT_INT);
|
||||
if ( value )
|
||||
pDev->bd_dma_area = value->i;
|
||||
|
||||
|
||||
@@ -547,7 +547,7 @@ void *grspw_open(int dev_no)
|
||||
* - 64 TX descriptors per DMA Channel
|
||||
*/
|
||||
bdtabsize = 2 * BDTAB_SIZE * priv->hwsup.ndma_chans;
|
||||
value = drvmgr_dev_key_get(priv->dev, "bdDmaArea", KEY_TYPE_INT);
|
||||
value = drvmgr_dev_key_get(priv->dev, "bdDmaArea", DRVMGR_KT_INT);
|
||||
if (value) {
|
||||
priv->bd_mem = value->i;
|
||||
priv->bd_mem_alloced = 0;
|
||||
@@ -2830,7 +2830,7 @@ static int grspw2_init3(struct drvmgr_dev *dev)
|
||||
/* Let user limit the number of DMA channels on this core to save
|
||||
* space. Only the first nDMA channels will be available.
|
||||
*/
|
||||
value = drvmgr_dev_key_get(priv->dev, "nDMA", KEY_TYPE_INT);
|
||||
value = drvmgr_dev_key_get(priv->dev, "nDMA", DRVMGR_KT_INT);
|
||||
if (value && (value->i < priv->hwsup.ndma_chans))
|
||||
priv->hwsup.ndma_chans = value->i;
|
||||
|
||||
|
||||
@@ -213,12 +213,12 @@ int gptimer_init1(struct drvmgr_dev *dev)
|
||||
timer_start = LEON3_Cpu_Index;
|
||||
}
|
||||
#endif
|
||||
value = drvmgr_dev_key_get(dev, "timerStart", KEY_TYPE_INT);
|
||||
value = drvmgr_dev_key_get(dev, "timerStart", DRVMGR_KT_INT);
|
||||
if ( value) {
|
||||
timer_start = value->i;
|
||||
timer_cnt = timer_hw_cnt - timer_start;
|
||||
}
|
||||
value = drvmgr_dev_key_get(dev, "timerCnt", KEY_TYPE_INT);
|
||||
value = drvmgr_dev_key_get(dev, "timerCnt", DRVMGR_KT_INT);
|
||||
if ( value && (value->i < timer_cnt) ) {
|
||||
timer_cnt = value->i;
|
||||
}
|
||||
@@ -264,7 +264,7 @@ int gptimer_init1(struct drvmgr_dev *dev)
|
||||
* that doing so for the Root-Bus GPTIMER may affect the RTEMS Clock
|
||||
* so that Clock frequency is wrong.
|
||||
*/
|
||||
value = drvmgr_dev_key_get(priv->dev, "prescaler", KEY_TYPE_INT);
|
||||
value = drvmgr_dev_key_get(priv->dev, "prescaler", DRVMGR_KT_INT);
|
||||
if ( value )
|
||||
regs->scaler_reload = value->i;
|
||||
|
||||
@@ -312,7 +312,7 @@ int gptimer_init1(struct drvmgr_dev *dev)
|
||||
* the timer must be registered at the Clock Driver.
|
||||
*/
|
||||
#if defined(LEON3) && defined(RTEMS_DRVMGR_STARTUP)
|
||||
value = drvmgr_dev_key_get(priv->dev, "clockTimer", KEY_TYPE_INT);
|
||||
value = drvmgr_dev_key_get(priv->dev, "clockTimer", DRVMGR_KT_INT);
|
||||
if ( value && (value->i < timer_cnt) ) {
|
||||
LEON3_Timer_Regs = (void *)regs;
|
||||
Clock_timer_register(timer_index[value->i]);
|
||||
|
||||
@@ -578,7 +578,7 @@ static int grtm_device_init(struct grtm_priv *pDev)
|
||||
/* Allocate Memory for Buffer Descriptor Table, or let user provide a custom
|
||||
* address.
|
||||
*/
|
||||
value = drvmgr_dev_key_get(pDev->dev, "bdTabAdr", KEY_TYPE_POINTER);
|
||||
value = drvmgr_dev_key_get(pDev->dev, "bdTabAdr", DRVMGR_KT_POINTER);
|
||||
if ( value ) {
|
||||
pDev->bds = (struct grtm_bd *)value->ptr;
|
||||
pDev->_bds = (void *)value->ptr;
|
||||
|
||||
@@ -238,7 +238,7 @@ int apbuart_init1(struct drvmgr_dev *dev)
|
||||
priv->condev.flags = 0;
|
||||
}
|
||||
|
||||
value = drvmgr_dev_key_get(priv->dev, "syscon", KEY_TYPE_INT);
|
||||
value = drvmgr_dev_key_get(priv->dev, "syscon", DRVMGR_KT_INT);
|
||||
if (value) {
|
||||
if (value->i)
|
||||
priv->condev.flags |= CONSOLE_FLAG_SYSCON;
|
||||
@@ -250,7 +250,7 @@ int apbuart_init1(struct drvmgr_dev *dev)
|
||||
priv->condev.ops.get_uart_attrs = apbuart_get_attributes;
|
||||
|
||||
/* Select 0=Polled, 1=IRQ, 2=Task-Driven UART Mode */
|
||||
value = drvmgr_dev_key_get(priv->dev, "mode", KEY_TYPE_INT);
|
||||
value = drvmgr_dev_key_get(priv->dev, "mode", DRVMGR_KT_INT);
|
||||
if (value)
|
||||
priv->mode = value->i;
|
||||
else
|
||||
|
||||
@@ -170,12 +170,15 @@ struct drvmgr_func {
|
||||
*/
|
||||
|
||||
/* Key Data Types */
|
||||
#define KEY_TYPE_NONE 0
|
||||
#define KEY_TYPE_INT 1
|
||||
#define KEY_TYPE_STRING 2
|
||||
#define KEY_TYPE_POINTER 3
|
||||
enum drvmgr_kt {
|
||||
DRVMGR_KT_ANY = -1,
|
||||
DRVMGR_KT_NONE = 0,
|
||||
DRVMGR_KT_INT = 1,
|
||||
DRVMGR_KT_STRING = 2,
|
||||
DRVMGR_KT_POINTER = 3,
|
||||
};
|
||||
|
||||
#define KEY_EMPTY {NULL, KEY_TYPE_NONE, {0}}
|
||||
#define DRVMGR_KEY_EMPTY {NULL, DRVMGR_KT_NONE, {0}}
|
||||
#define RES_EMPTY {0, 0, NULL}
|
||||
#define MMAP_EMPTY {0, 0, 0}
|
||||
|
||||
@@ -189,7 +192,7 @@ union drvmgr_key_value {
|
||||
/* One key. One Value. Holding information relevant to the driver. */
|
||||
struct drvmgr_key {
|
||||
char *key_name; /* Name of key */
|
||||
int key_type; /* How to interpret key_value */
|
||||
enum drvmgr_kt key_type; /* How to interpret key_value */
|
||||
union drvmgr_key_value key_value; /* The value or pointer to value */
|
||||
};
|
||||
|
||||
@@ -438,7 +441,7 @@ extern int drvmgr_keys_get(struct drvmgr_dev *dev, struct drvmgr_key **keys);
|
||||
/*! Return the one key that matches key name from a driver keys array. The keys
|
||||
* can be obtained using drvmgr_keys_get().
|
||||
*
|
||||
* \param keys An array of keys ended with KEY_EMPTY to search among.
|
||||
* \param keys An array of keys ended with DRVMGR_KEY_EMPTY to search among.
|
||||
* \param key_name Name of key to search for among the keys.
|
||||
*/
|
||||
extern struct drvmgr_key *drvmgr_key_get(struct drvmgr_key *keys, char *key_name);
|
||||
@@ -449,7 +452,7 @@ extern struct drvmgr_key *drvmgr_key_get(struct drvmgr_key *keys, char *key_name
|
||||
* name), then determines if the type is correct. A pointer to the key value
|
||||
* is returned.
|
||||
*
|
||||
* \param keys An array of keys ended with KEY_EMPTY to search among.
|
||||
* \param keys An array of keys ended with DRVMGR_KEY_EMPTY to search among.
|
||||
* \param key_name Name of key to search for among the keys.
|
||||
* \param key_type Data Type of value. INTEGER, ADDRESS, STRING.
|
||||
* \return Returns NULL if no value found matching Key Name and Key
|
||||
@@ -458,7 +461,7 @@ extern struct drvmgr_key *drvmgr_key_get(struct drvmgr_key *keys, char *key_name
|
||||
extern union drvmgr_key_value *drvmgr_key_val_get(
|
||||
struct drvmgr_key *keys,
|
||||
char *key_name,
|
||||
int key_type);
|
||||
enum drvmgr_kt key_type);
|
||||
|
||||
/*! Get key value from the bus resources matching [device, key name, key type]
|
||||
* if no matching key is found NULL is returned.
|
||||
@@ -475,7 +478,7 @@ extern union drvmgr_key_value *drvmgr_key_val_get(
|
||||
extern union drvmgr_key_value *drvmgr_dev_key_get(
|
||||
struct drvmgr_dev *dev,
|
||||
char *key_name,
|
||||
int key_type);
|
||||
enum drvmgr_kt key_type);
|
||||
|
||||
/*** DRIVER INTERACE USED TO REQUEST INFORMATION/SERVICES FROM BUS DRIVER ***/
|
||||
|
||||
|
||||
@@ -135,7 +135,7 @@ void drvmgr_print_mem(void)
|
||||
resmem += sizeof(struct drvmgr_drv_res);
|
||||
|
||||
key = res->keys;
|
||||
while (key->key_type != KEY_TYPE_NONE) {
|
||||
while (key->key_type != DRVMGR_KT_NONE) {
|
||||
resmem += sizeof
|
||||
(struct drvmgr_key);
|
||||
key++;
|
||||
|
||||
@@ -61,7 +61,7 @@ struct drvmgr_key *drvmgr_key_get(
|
||||
return NULL;
|
||||
|
||||
key = keys;
|
||||
while (key->key_type != KEY_TYPE_NONE) {
|
||||
while (key->key_type != DRVMGR_KT_NONE) {
|
||||
if (strcmp(key_name, key->key_name) == 0)
|
||||
return key;
|
||||
key++;
|
||||
@@ -72,14 +72,15 @@ struct drvmgr_key *drvmgr_key_get(
|
||||
union drvmgr_key_value *drvmgr_key_val_get(
|
||||
struct drvmgr_key *keys,
|
||||
char *key_name,
|
||||
int key_type)
|
||||
enum drvmgr_kt key_type)
|
||||
{
|
||||
struct drvmgr_key *key_match;
|
||||
|
||||
key_match = drvmgr_key_get(keys, key_name);
|
||||
if (key_match) {
|
||||
/* Found key, put pointer to value into */
|
||||
if ((key_type == -1) || (key_match->key_type == key_type))
|
||||
if ((key_type == DRVMGR_KT_ANY) ||
|
||||
(key_match->key_type == key_type))
|
||||
return &key_match->key_value;
|
||||
}
|
||||
return NULL;
|
||||
@@ -88,7 +89,7 @@ union drvmgr_key_value *drvmgr_key_val_get(
|
||||
union drvmgr_key_value *drvmgr_dev_key_get(
|
||||
struct drvmgr_dev *dev,
|
||||
char *key_name,
|
||||
int key_type)
|
||||
enum drvmgr_kt key_type)
|
||||
{
|
||||
struct drvmgr_key *keys = NULL;
|
||||
|
||||
|
||||
@@ -149,7 +149,7 @@ static void shell_drvmgr_print_key_array(struct drvmgr_key *keys)
|
||||
{
|
||||
struct drvmgr_key *key;
|
||||
static char *type_strs[4] = {"UNKNOWN","INTEGER","STRING ","POINTER"};
|
||||
int type;
|
||||
enum drvmgr_kt type;
|
||||
union drvmgr_key_value *val;
|
||||
|
||||
if (keys == NULL) {
|
||||
@@ -158,23 +158,23 @@ static void shell_drvmgr_print_key_array(struct drvmgr_key *keys)
|
||||
}
|
||||
|
||||
key = &keys[0];
|
||||
while (key->key_type != KEY_TYPE_NONE) {
|
||||
if (key->key_type > KEY_TYPE_POINTER)
|
||||
type = 0;
|
||||
while (key->key_type != DRVMGR_KT_NONE) {
|
||||
if (key->key_type > DRVMGR_KT_POINTER)
|
||||
type = DRVMGR_KT_NONE;
|
||||
else
|
||||
type = key->key_type;
|
||||
printf(" NAME=%-14s TYPE=%s VALUE=", key->key_name, type_strs[type]);
|
||||
val = &key->key_value;
|
||||
switch (type) {
|
||||
default:
|
||||
case 0:
|
||||
case KEY_TYPE_INT:
|
||||
case DRVMGR_KT_NONE:
|
||||
case DRVMGR_KT_INT:
|
||||
printf("0x%x (%d)\n", val->i, val->i);
|
||||
break;
|
||||
case KEY_TYPE_STRING:
|
||||
case DRVMGR_KT_STRING:
|
||||
printf("%s\n", val->str);
|
||||
break;
|
||||
case KEY_TYPE_POINTER:
|
||||
case DRVMGR_KT_POINTER:
|
||||
printf("%p\n", val->ptr);
|
||||
break;
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user