forked from Imagelibrary/rtems
Patch from "John M. Mills" <jmills@tga.com> with subsequent cleanup from
Ralf Corsepius <corsepiu@faw.uni-ulm.de> that adds initial Hitachi SH-2 support to RTEMS. Ralf's comments are: Changes: ------ 1. SH-Port: * Many files renamed. * CONSOLE_DEVNAME and MHZ defines removed from libcpu. * console.c moved to libbsp/sh/shared, build in libbsp/sh/<BSP>/console applying VPATH. * CONSOLE_DEVNAME made BSP-specific, replacement is defined in bsp.h * MHZ define replaced with HZ (extendent resolution) in custom/*.cfg * -DHZ=HZ used in bspstart.c, only * Makefile variable HZ used in bsp-dependent directories only. 2. SH1-Port * clock-driver rewritten to provide better resolution for odd CPU frequencies. This driver is only partially tested on hardware, ie. sightly experimental, but I don't expect severe problems with it. * Polling SCI-driver added. This driver is experimental and completly untested yet. Therefore it is not yet used for the console (/dev/console is still pointing to /dev/null, cf. gensh1/bsp.h). * minor changes to the timer driver * SH1 specific delay()/CPU_delay() now is implemented as a function 3. SH2-Port * Merged * IMO, the code is still in its infancy. Therefore I have interspersed comments (FIXME) it for items which I think John should look after. * sci and console drivers partially rewritten and extended (John, I hope you don't mind). * Copyright notices are not yet adapted
This commit is contained in:
Joel Sherrill
208
c/src/lib/libcpu/sh/sh7045/timer/timer.c
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208
c/src/lib/libcpu/sh/sh7045/timer/timer.c
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@@ -0,0 +1,208 @@
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/*
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* timer for the Hitachi SH 704X
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*
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* This file manages the benchmark timer used by the RTEMS Timing Test
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* Suite. Each measured time period is demarcated by calls to
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* Timer_initialize() and Read_timer(). Read_timer() usually returns
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* the number of microseconds since Timer_initialize() exitted.
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*
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* NOTE: It is important that the timer start/stop overhead be
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* determined when porting or modifying this code.
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*
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* Authors: Ralf Corsepius (corsepiu@faw.uni-ulm.de) and
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* Bernd Becker (becker@faw.uni-ulm.de)
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*
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* COPYRIGHT (c) 1997-1998, FAW Ulm, Germany
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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*
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* COPYRIGHT (c) 1998.
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* On-Line Applications Research Corporation (OAR).
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* Copyright assigned to U.S. Government, 1994.
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.OARcorp.com/rtems/license.html.
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*
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* $Id$
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*/
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#include <rtems.h>
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#include <rtems/score/sh_io.h>
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#include <rtems/score/iosh7045.h>
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/*
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* We use a Phi/4 timer
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*/
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#define SCALE (Timer_MHZ/4)
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#define MTU1_STARTMASK 0xfd
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#define MTU1_SYNCMASK 0xfd
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#define MTU1_MODEMASK 0xc0
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#define MTU1_TCRMASK 0x01
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#define MTU1_TIORMASK 0x88
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#define MTU1_STAT_MASK 0xf8
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#define MTU1_TIERMASK 0xfc
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#define IPRC_MTU1_MASK 0xfff0
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#ifndef MTU1_PRIO
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#define MTU1_PRIO 15
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#endif
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#define MTU1_VECTOR 86
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rtems_isr timerisr();
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static rtems_unsigned32 Timer_interrupts;
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rtems_boolean Timer_driver_Find_average_overhead;
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static rtems_unsigned32 Timer_MHZ ;
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void Timer_initialize( void )
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{
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rtems_unsigned8 temp8;
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rtems_unsigned16 temp16;
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rtems_unsigned32 level;
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rtems_isr *ignored;
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Timer_MHZ = rtems_cpu_configuration_get_clicks_per_second() / 1000000 ;
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/*
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* Timer has never overflowed. This may not be necessary on some
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* implemenations of timer but ....
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*/
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Timer_interrupts /* .i */ = 0;
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_CPU_ISR_Disable( level);
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/*
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* Somehow start the timer
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*/
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/* stop Timer 1 */
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temp8 = read8( MTU_TSTR) & MTU1_STARTMASK;
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write8( temp8, MTU_TSTR);
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/* initialize counter 1 */
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write16( 0, MTU_TCNT1);
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/* Timer 1 is independent of other timers */
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temp8 = read8( MTU_TSYR) & MTU1_SYNCMASK;
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write8( temp8, MTU_TSYR);
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/* Timer 1, normal mode */
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temp8 = read8( MTU_TMDR1) & MTU1_MODEMASK;
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write8( temp8, MTU_TMDR1);
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/* x0000000
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* |||||+++--- Internal Clock
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* |||++------ Count on rising edge
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* |++-------- disable TCNT clear
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* +---------- don`t care
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*/
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write8( MTU1_TCRMASK, MTU_TCR1);
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/* gra and grb are not used */
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write8( MTU1_TIORMASK, MTU_TIOR1);
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/* reset all status flags */
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temp8 = read8( MTU_TSR1) & MTU1_STAT_MASK;
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write8( temp8, MTU_TSR1);
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/* enable overflow interrupt */
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write8( MTU1_TIERMASK, MTU_TIER1);
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/* set interrupt priority */
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temp16 = read16( INTC_IPRC) & IPRC_MTU1_MASK;
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temp16 |= MTU1_PRIO;
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write16( temp16, INTC_IPRC);
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/* initialize ISR */
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_CPU_ISR_install_raw_handler( MTU1_VECTOR, timerisr, &ignored );
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_CPU_ISR_Enable( level);
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/* start timer 1 */
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temp8 = read8( MTU_TSTR) | ~MTU1_STARTMASK;
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write8( temp8, MTU_TSTR);
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}
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/*
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* The following controls the behavior of Read_timer().
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*
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* AVG_OVERHEAD is the overhead for starting and stopping the timer. It
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* is usually deducted from the number returned.
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*
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* LEAST_VALID is the lowest number this routine should trust. Numbers
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* below this are "noise" and zero is returned.
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*/
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#define AVG_OVERHEAD 1 /* It typically takes X.X microseconds */
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/* (Y countdowns) to start/stop the timer. */
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/* This value is in microseconds. */
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#define LEAST_VALID 0 /* 20 */ /* Don't trust a clicks value lower than this */
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int Read_timer( void )
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{
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rtems_unsigned32 clicks;
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rtems_unsigned32 total ;
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/*
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* Read the timer and see how many clicks it has been since we started.
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*/
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clicks = read16( MTU_TCNT1); /* XXX: read some HW here */
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/*
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* Total is calculated by taking into account the number of timer overflow
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* interrupts since the timer was initialized and clicks since the last
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* interrupts.
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*/
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total = clicks + Timer_interrupts * 65536 ;
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if ( Timer_driver_Find_average_overhead )
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return total / SCALE; /* in XXX microsecond units */
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else
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{
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if ( total < LEAST_VALID )
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return 0; /* below timer resolution */
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/*
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* Somehow convert total into microseconds
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*/
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return (total / SCALE - AVG_OVERHEAD) ;
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}
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}
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/*
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* Empty function call used in loops to measure basic cost of looping
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* in Timing Test Suite.
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*/
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rtems_status_code Empty_function( void )
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{
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return RTEMS_SUCCESSFUL;
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}
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void Set_find_average_overhead(
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rtems_boolean find_flag
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)
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{
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Timer_driver_Find_average_overhead = find_flag;
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}
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/* Timer 1 is used */
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#pragma interrupt
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void timerisr( void )
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{
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unsigned8 temp8;
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/* reset the flags of the status register */
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temp8 = read8( MTU_TSR1) & MTU1_STAT_MASK;
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write8( temp8, MTU_TSR1);
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Timer_interrupts += 1;
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}
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