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m68k/mrm332: Remove obsolete BSP family

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Confirmed with Robominds

Updates #5031
This commit is contained in:
Joel Sherrill
2025-02-05 15:24:19 -06:00
committed by Kinsey Moore
parent 2188c428fb
commit 46e90be362
23 changed files with 0 additions and 3132 deletions
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21
bsps/m68k/mrm332/README.md
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mrm322
======
```
CPU: MC68332 @16 or 25MHz
RAM: 32k or 512k
ROM: 512k flash
```
The Mini RoboMind is a small board based on the 68332 microcontroller
designed and build by Mark Castelluccio. For details, see:
http://www.robominds.com
This BSP was ported from the efi332 BSP by Matt Cross (profesor@gweep.net),
the efi332 BSP was written by John S Gwynne.
TODO
----
- integrate the interrupt driven stdin/stdout into RTEMS to (a) reduce
the interrupt priority and (2) to prevent it from blocking.
- add a timer driver for the tmtest set.

77
bsps/m68k/mrm332/btimer/btimer.c
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/* SPDX-License-Identifier: BSD-2-Clause */
/*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <bsp.h>
#include <rtems/btimer.h>
bool benchmark_timer_find_average_overhead;
void benchmark_timer_initialize( void )
{
}
/*
* The following controls the behavior of benchmark_timer_read().
*
* FIND_AVG_OVERHEAD * instructs the routine to return the "raw" count.
*
* AVG_OVEREHAD is the overhead for starting and stopping the timer. It
* is usually deducted from the number returned.
*
* LEAST_VALID is the lowest number this routine should trust. Numbers
* below this are "noise" and zero is returned.
*/
#define AVG_OVERHEAD 0 /* It typically takes X.X microseconds */
/* (Y countdowns) to start/stop the timer. */
/* This value is in microseconds. */
#define LEAST_VALID 1 /* Don't trust a clicks value lower than this */
/*
* Return timer value in 1/2-microsecond units
*/
benchmark_timer_t benchmark_timer_read( void )
{
uint32_t total;
total = 0;
if ( benchmark_timer_find_average_overhead == true )
return total; /* in XXX microsecond units */
if ( total < LEAST_VALID )
return 0; /* below timer resolution */
return (total - AVG_OVERHEAD);
}
void benchmark_timer_disable_subtracting_average_overhead(
bool find_flag
)
{
benchmark_timer_find_average_overhead = find_flag;
}

88
bsps/m68k/mrm332/clock/ckinit.c
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/* SPDX-License-Identifier: BSD-2-Clause */
/*
* This routine initailizes the periodic interrupt timer on
* the Motorola 68332.
*/
/*
* COPYRIGHT (c) 1989-2014.
* On-Line Applications Research Corporation (OAR).
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <stdlib.h>
#include <bsp.h>
#include <mrm332.h>
#include <rtems/clockdrv.h>
#include <rtems/m68k/sim.h>
#define CLOCK_VECTOR MRM_PIV
uint32_t Clock_isrs; /* ISRs until next tick */
volatile uint32_t Clock_driver_ticks; /* ticks since initialization */
static rtems_isr_entry Old_ticker;
static void Clock_exit( void );
static rtems_isr Clock_isr(rtems_vector_number vector)
{
Clock_driver_ticks += 1;
if ( Clock_isrs == 1 ) {
rtems_clock_tick();
Clock_isrs = rtems_configuration_get_microseconds_per_tick() / 1000;
}
else
Clock_isrs -= 1;
}
static void Install_clock(rtems_isr_entry clock_isr)
{
Clock_driver_ticks = 0;
Clock_isrs = rtems_configuration_get_microseconds_per_tick() / 1000;
Old_ticker = (rtems_isr_entry) set_vector( clock_isr, CLOCK_VECTOR, 1 );
/* enable 1mS interrupts */
*PITR = (unsigned short int)( SAM(0x09,0,PITM) );/* load counter */
*PICR = (unsigned short int) /* enable interrupt */
( SAM(ISRL_PIT,8,PIRQL) | SAM(CLOCK_VECTOR,0,PIV) );
atexit( Clock_exit );
}
void Clock_exit( void )
{
/* shutdown the periodic interrupt */
*PICR = (unsigned short int)
( SAM(0,8,PIRQL) | SAM(CLOCK_VECTOR,0,PIV) );
/* ^^ zero disables interrupt */
/* do not restore old vector */
}
void _Clock_Initialize( void )
{
Install_clock( Clock_isr );
}

18
bsps/m68k/mrm332/config/mrm332-testsuite.tcfg
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#
# mrm332 RTEMS Test Database.
#
# Format is one line per test that is _NOT_ built.
#
include: testdata/disable-iconv-tests.tcfg
exclude: cdtest
exclude: dl05
exclude: dl10
exclude: fileio
exclude: fsdosfsname01
exclude: iostream
exclude: linpack
exclude: record02
exclude: sptls01
exclude: sptls02
exclude: utf8proc01

18
bsps/m68k/mrm332/config/mrm332.cfg
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#
# Config file for the mrm332 BSP
#
include $(RTEMS_ROOT)/make/custom/default.cfg
RTEMS_CPU=m68k
# This contains the compiler options necessary to select the CPU model
# and (hopefully) optimize for it.
CPU_CFLAGS = -mcpu=cpu32
# using optimise for size due to small memory on target board.
CFLAGS_OPTIMIZE_V = -Os -g -fomit-frame-pointer
# The following two lines enable compiling and linking on per element.
CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections
LDFLAGS = -Wl,--gc-sections

174
bsps/m68k/mrm332/console/console.c
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/* SPDX-License-Identifier: BSD-2-Clause */
/*
* COPYRIGHT (c) 1989-1997.
* On-Line Applications Research Corporation (OAR).
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <termios.h>
#include <rtems/console.h>
#include <rtems/libio.h>
#include <bsp.h>
#include "sci.h"
/*
* console_open
*
* open a port as a termios console.
*/
rtems_device_driver console_open(
rtems_device_major_number major,
rtems_device_minor_number minor,
void * arg
)
{
rtems_status_code status;
/* the console is opened three times at startup */
/* for standard input, output, and error */
/* Get correct callback structure for the device */
/* argument of FALSE gives us interrupt driven serial io */
/* argument of TRUE gives us polling based serial io */
/* SCI internal uart */
status = rtems_termios_open( major, minor, arg, SciGetTermiosHandlers( FALSE ) );
return status;
}
/*
* console_close
*
* This routine closes a port that has been opened as console.
*/
rtems_device_driver console_close(
rtems_device_major_number major,
rtems_device_minor_number minor,
void * arg
)
{
return rtems_termios_close (arg);
}
/*
* console_read
*
* This routine uses the termios driver to read a character.
*/
rtems_device_driver console_read(
rtems_device_major_number major,
rtems_device_minor_number minor,
void * arg
)
{
return rtems_termios_read (arg);
}
/*
* console_write
*
* this routine uses the termios driver to write a character.
*/
rtems_device_driver console_write(
rtems_device_major_number major,
rtems_device_minor_number minor,
void * arg
)
{
return rtems_termios_write (arg);
}
/*
* console_control
*
* this routine uses the termios driver to process io
*/
rtems_device_driver console_control(
rtems_device_major_number major,
rtems_device_minor_number minor,
void * arg
)
{
return rtems_termios_ioctl (arg);
}
/*
* console_initialize
*
* Routine called to initialize the console device driver.
*/
rtems_device_driver console_initialize(
rtems_device_major_number major,
rtems_device_minor_number minor_arg,
void *arg
)
{
rtems_status_code status;
/*
* initialize the termio interface.
*/
rtems_termios_initialize();
/*
* register the SCI device name for termios
* do this over in the sci driver init routine?
*/
status = rtems_io_register_name( "/dev/sci", major, 0 );
if (status != RTEMS_SUCCESSFUL)
{
rtems_fatal_error_occurred(status);
}
/*
* Link the uart device to the console device
*/
#if 1
status = rtems_io_register_name( "/dev/console", major, 0 );
if (status != RTEMS_SUCCESSFUL)
{
rtems_fatal_error_occurred(status);
}
#else
if ( link( "/dev/sci", "/dev/console") < 0 )
{
rtems_fatal_error_occurred( RTEMS_IO_ERROR );
}
#endif
/*
* Console Initialize Succesful
*/
return RTEMS_SUCCESSFUL;
}

1586
bsps/m68k/mrm332/console/sci.c
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233
bsps/m68k/mrm332/console/sci.h
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/****************************************************************************
* File: sci.h
*
* Desc: This is the include file for the serial communications interface.
*
* Note: See bsp.h,confdefs.h,system.h for installing drivers into RTEMS.
*
****************************************************************************/
#ifndef _sci_h_
#define _sci_h_
/*******************************************************************************
IOCTL commands for the sci driver.
I'm still working on these...
*******************************************************************************/
#define SCI_IOCTL_PARITY_NONE 0x00 /* no parity bit after the data bits */
#define SCI_IOCTL_PARITY_ODD 0x01 /* parity bit added after data bits */
#define SCI_IOCTL_PARITY_EVEN 0x02 /* parity bit added after data bits */
#define SCI_IOCTL_PARITY_MARK 0x03 /* parity bit is lo, -12 volts, logical 1 */
#define SCI_IOCTL_PARITY_SPACE 0x04 /* parity bit is hi, +12 volts, logical 0 */
#define SCI_IOCTL_PARITY_FORCED_ON 0x03 /* parity bit is forced hi or lo */
#define SCI_IOCTL_PARITY_FORCED_OFF 0x04 /* parity bit is forced hi or lo */
#define SCI_IOCTL_BAUD_RATE 0x20 /* set the baud rate, arg is baud */
#define SCI_IOCTL_DATA_BITS 0x30 /* set the data bits, arg is # bits */
#define SCI_IOCTL_STOP_BITS_1 0x40 /* 1 stop bit after char frame */
#define SCI_IOCTL_STOP_BITS_2 0x41 /* 2 stop bit after char frame */
#define SCI_IOCTL_MODE_NORMAL 0x50 /* normal operating mode */
#define SCI_IOCTL_MODE_LOOP 0x51 /* internal loopback mode */
#define SCI_IOCTL_FLOW_NONE 0x60 /* no flow control */
#define SCI_IOCTL_FLOW_RTS_CTS 0x61 /* hardware flow control */
#define SCI_IOCTL_SEND_BREAK 0x70 /* send an rs-232 break */
#define SCI_IOCTL_MODE_1200 0x80 /* 1200,n,8,1 download mode */
#define SCI_IOCTL_MODE_9600 0x81 /* 9600,n,8,1 download mode */
#define SCI_IOCTL_MODE_9_BIT 0x82 /* 9600,forced,8,1 command mode */
/*******************************************************************************
SCI Registers
*******************************************************************************/
/* SCI Control Register 0 (SCCR0) $FFFC08
8 4 2 1 - 8 4 2 1 - 8 4 2 1 - 8 4 2 1
^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^
| | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | +----- 0 baud rate divisor
| | | | | | | | | | | | | | +------- 1 baud rate divisor
| | | | | | | | | | | | | +--------- 2 baud rate divisor
| | | | | | | | | | | | +----------- 3 baud rate divisor
| | | | | | | | | | | |
| | | | | | | | | | | +--------------- 4 baud rate divisor
| | | | | | | | | | +----------------- 5 baud rate divisor
| | | | | | | | | +------------------- 6 baud rate divisor
| | | | | | | | +--------------------- 7 baud rate divisor
| | | | | | | |
| | | | | | | +------------------------- 8 baud rate divisor
| | | | | | +--------------------------- 9 baud rate divisor
| | | | | +----------------------------- 10 baud rate divisor
| | | | +------------------------------- 11 baud rate divisor
| | | |
| | | +----------------------------------- 12 baud rate divisor
| | +------------------------------------- 13 unused
| +--------------------------------------- 14 unused
+----------------------------------------- 15 unused
0 0 0 0 - 0 0 0 0 - 0 0 0 0 - 0 1 0 0 reset value - (64k baud?)
*/
#define SCI_BAUD_57_6K 9
#define SCI_BAUD_38_4K 14
#define SCI_BAUD_19_2K 27
#define SCI_BAUD_9600 55
#define SCI_BAUD_4800 109
#define SCI_BAUD_2400 218
#define SCI_BAUD_1200 437
/* SCI Control Register 1 (SCCR1) $FFFC0A
8 4 2 1 - 8 4 2 1 - 8 4 2 1 - 8 4 2 1
^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^
| | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | +----- 0 send a break
| | | | | | | | | | | | | | +------- 1 rcvr wakeup mode
| | | | | | | | | | | | | +--------- 2 rcvr enable
| | | | | | | | | | | | +----------- 3 xmtr enable
| | | | | | | | | | | |
| | | | | | | | | | | +--------------- 4 idle line intr enable
| | | | | | | | | | +----------------- 5 rcvr intr enable
| | | | | | | | | +------------------- 6 xmit complete intr enable
| | | | | | | | +--------------------- 7 xmtr intr enable
| | | | | | | |
| | | | | | | +------------------------- 8 wakeup on address mark
| | | | | | +--------------------------- 9 mode 1=9 bits, 0=8 bits
| | | | | +----------------------------- 10 parity enable 1=on, 0=off
| | | | +------------------------------- 11 parity type 1=odd, 0=even
| | | |
| | | +----------------------------------- 12 idle line select
| | +------------------------------------- 13 wired-or mode
| +--------------------------------------- 14 loop mode
+----------------------------------------- 15 unused
0 0 0 0 - 0 0 0 0 - 0 0 0 0 - 0 0 0 0 reset value
*/
#define SCI_SEND_BREAK 0x0001 /* 0000-0000-0000-0001 */
#define SCI_RCVR_WAKEUP 0x0002 /* 0000-0000-0000-0010 */
#define SCI_ENABLE_RCVR 0x0004 /* 0000-0000-0000-0100 */
#define SCI_ENABLE_XMTR 0x0008 /* 0000-0000-0000-1000 */
#define SCI_DISABLE_RCVR 0xFFFB /* 1111-1111-1111-1011 */
#define SCI_DISABLE_XMTR 0xFFF7 /* 1111-1111-1111-0111 */
#define SCI_ENABLE_INT_IDLE 0x0010 /* 0000-0000-0001-0000 */
#define SCI_ENABLE_INT_RX 0x0020 /* 0000-0000-0010-0000 */
#define SCI_ENABLE_INT_TX_DONE 0x0040 /* 0000-0000-0100-0000 */
#define SCI_ENABLE_INT_TX 0x0080 /* 0000-0000-1000-0000 */
#define SCI_DISABLE_INT_ALL 0xFF00 /* 1111-1111-0000-0000 ??? */
#define SCI_DISABLE_INT_RX 0xFFDF /* 1111-1111-1101-1111 */
#define SCI_CLEAR_RX_INT 0xFFBF /* 1111-1111-1011-1111 */
#define SCI_DISABLE_INT_TX 0xFF7F /* 1111-1111-0111-1111 */
#define SCI_CLEAR_TDRE 0xFEFF /* 1111-1110-1111-1111 */
#define SCI_RCVR_WAKE_ON_MARK 0x0100 /* 0000-0001-0000-0000 */
#define SCI_9_DATA_BITS 0x0200 /* 0000-0010-0000-0000 */
#define SCI_PARITY_ENABLE 0x0400 /* 0000-0100-0000-0000 */
#define SCI_PARITY_ODD 0x0800 /* 0000-1000-0000-0000 */
#define SCI_RCVR_WAKE_ON_IDLE 0xFEFF /* 1111-1110-1111-1111 */
#define SCI_8_DATA_BITS 0xFDFF /* 1111-1101-1111-1111 */
#define SCI_PARITY_DISABLE 0xFBFF /* 1111-1011-1111-1111 */
#define SCI_PARITY_EVEN 0xF7FF /* 1111-0111-1111-1111 */
#define SCI_PARITY_NONE 0xF3FF /* 1111-0011-1111-1111 */
#define SCI_IDLE_LINE_LONG 0x1000 /* 0001-0000-0000-0000 */
#define SCI_TXD_OPEN_DRAIN 0x2000 /* 0010-0000-0000-0000 */
#define SCI_LOOPBACK_MODE 0x4000 /* 0100-0000-0000-0000 */
#define SCI_SCCR1_UNUSED 0x8000 /* 1000-0000-0000-0000 */
/* SCI Status Register (SCSR) $FFFC0C
8 4 2 1 - 8 4 2 1 - 8 4 2 1 - 8 4 2 1
^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^
| | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | +----- 0 PF - parity error
| | | | | | | | | | | | | | +------- 1 FE - framing error
| | | | | | | | | | | | | +--------- 2 NF - noise flag
| | | | | | | | | | | | +----------- 3 OR - overrun flag
| | | | | | | | | | | |
| | | | | | | | | | | +--------------- 4 IDLE - idle line detected
| | | | | | | | | | +----------------- 5 RAF - rcvr active flag
| | | | | | | | | +------------------- 6 RDRF - rcv data reg full
| | | | | | | | +--------------------- 7 TC - xmt complete flag
| | | | | | | |
| | | | | | | +------------------------- 8 TDRE - xmt data reg empty
| | | | | | +--------------------------- 9 always zero
| | | | | +----------------------------- 10 always zero
| | | | +------------------------------- 11 always zero
| | | |
| | | +----------------------------------- 12 always zero
| | +------------------------------------- 13 always zero
| +--------------------------------------- 14 always zero
+----------------------------------------- 15 always zero
0 0 0 0 - 0 0 0 1 - 1 0 0 0 - 0 0 0 0 reset value
*/
#define SCI_ERROR_PARITY 0x0001 /* 0000-0000-0000-0001 */
#define SCI_ERROR_FRAMING 0x0002 /* 0000-0000-0000-0010 */
#define SCI_ERROR_NOISE 0x0004 /* 0000-0000-0000-0100 */
#define SCI_ERROR_OVERRUN 0x0008 /* 0000-0000-0000-1000 */
#define SCI_IDLE_LINE 0x0010 /* 0000-0000-0001-0000 */
#define SCI_RCVR_ACTIVE 0x0020 /* 0000-0000-0010-0000 */
#define SCI_RCVR_READY 0x0040 /* 0000-0000-0100-0000 */
#define SCI_XMTR_IDLE 0x0080 /* 0000-0000-1000-0000 */
#define SCI_CLEAR_RX_INT 0xFFBF /* 1111-1111-1011-1111 */
#define SCI_XMTR_READY 0x0100 /* 0000-0001-0000-0000 */
#define SCI_CLEAR_TDRE 0xFEFF /* 1111-1110-1111-1111 */
#define SCI_XMTR_AVAILABLE 0x0180 /* 0000-0001-1000-0000 */
/*******************************************************************************
Function prototypes
*******************************************************************************/
#ifdef __cplusplus
extern "C" {
#endif
/* look at console_open to see how this is called */
const rtems_termios_callbacks * SciGetTermiosHandlers( int32_t polled );
/* SCI interrupt */
/*rtems_isr SciIsr( rtems_vector_number vector ); */
/*int32_t SciOpenPolled ( int32_t major, int32_t minor, void *arg ); */
/*int32_t SciOpenInterrupt ( int32_t major, int32_t minor, void *arg ); */
/*int32_t SciClose ( int32_t major, int32_t minor, void *arg ); */
/*int32_t SciWritePolled ( int32_t minor, const char *buf, int32_t len ); */
/*int32_t SciWriteInterrupt( int32_t minor, const char *buf, int32_t len ); */
/*int32_t SciReadPolled ( int32_t minor ); */
/*int32_t SciSetAttributes ( int32_t minor, const struct termios *t ); */
#ifdef __cplusplus
}
#endif
#endif /* _sci_h_ */

129
bsps/m68k/mrm332/include/bsp.h
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/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsM68kMRM332
*
* @brief Global BSP definitions.
*/
/* bsp.h
*
* This include file contains all mrm board IO definitions.
*/
/*
* COPYRIGHT (c) 1989-2009.
* On-Line Applications Research Corporation (OAR).
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef LIBBSP_M68K_MRM332_BSP_H
#define LIBBSP_M68K_MRM332_BSP_H
/**
* @defgroup RTEMSBSPsM68kMRM332 MRM332
*
* @ingroup RTEMSBSPsM68k
*
* @brief MRM332 Board Support Package.
*
* @{
*/
#include <bspopts.h>
#include <bsp/default-initial-extension.h>
#include <rtems.h>
#include <rtems/bspIo.h>
#include <mrm332.h>
#ifdef __cplusplus
extern "C" {
#endif
#define CONSOLE_SCI
/* externals */
extern char _etext[];
extern char _copy_start[];
extern char _edata[];
extern char _clear_start[];
extern char end[];
extern bool _copy_data_from_rom;
/* constants */
#ifdef __START_C__
#define STACK_SIZE "#0x800"
#else
#define STACK_SIZE 0x800
#endif
/* macros */
#define RAW_PUTS(str) \
{ register char *ptr = str; \
while (*ptr) SCI_output_char(*ptr++); \
}
#define RAW_PUTI(n) { \
register int i, j; \
\
RAW_PUTS("0x"); \
for (i=28;i>=0;i -= 4) { \
j = (n>>i) & 0xf; \
SCI_output_char( (j>9 ? j-10+'a' : j+'0') ); \
} \
}
/* miscellaneous stuff assumed to exist */
extern rtems_isr_entry M68Kvec[]; /* vector table address */
extern int stack_size;
extern int stack_start;
/* functions */
rtems_isr_entry set_vector(
rtems_isr_entry handler,
rtems_vector_number vector,
int type
);
void Spurious_Initialize(void);
void _UART_flush(void);
void outbyte(char);
#ifdef __cplusplus
}
#endif
/** @} */
#endif

1
bsps/m68k/mrm332/include/bsp/irq.h
View File

@@ -1 +0,0 @@
#include <bsp/irq-default.h>

71
bsps/m68k/mrm332/include/mrm332.h
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@@ -1,71 +0,0 @@
/* mrm332.h
*/
#ifndef _MRM332_H_
#define _MRM332_H_
/* SIM_MM (SIM Module Mapping) determines the location of the control
register block. When MM=0, register addresses range fom 0x7ff000 to
0x7FFFFF. When MM=1, register addresses range from 0xfff000 to
0xffffff. */
#define SIM_MM 1
/* Interrupt related definitions */
#define SIM_IARB 15
#define QSM_IARB 10
#define MRM_PIV 64
#define ISRL_PIT 4 /* zero disables PIT */
#define EFI_QIVR 66 /* 66=>SCI and 67=>QSPI interrupt */
#define ISRL_QSPI 0
#define EFI_SPINT 24 /* spurious interrupt */
#define EFI_INT1 25 /* CTS interrupt */
#define ISRL_SCI 6
/* System Clock definitions */
#define XTAL 32768.0 /* crystal frequency in Hz */
/* Specify the CPU frequency. Do not specify a faster clock than your */
/* CPU is rated for! */
#if 0
/* Default MRM clock rate (8.388688 MHz) set by CPU32: */
#define MRM_W 0 /* system clock parameters */
#define MRM_X 0
#define MRM_Y 0x3f
#endif
#if 0
/* 16.77722 MHz: */
#define MRM_W 1 /* system clock parameters */
#define MRM_X 1
#define MRM_Y 0x0f
#endif
#if 1
/* 25.16582 MHz: */
#define MRM_W 1 /* system clock parameters */
#define MRM_X 1
#define MRM_Y 0x17
#define SET_EDIV
#endif
#define SYS_CLOCK (XTAL*4.0*(MRM_Y+1)*(1 << (2*MRM_W+MRM_X)))
#define SCI_BAUD 19200 /* RS232 Baud Rate */
/* macros/functions */
#ifndef ASM
/*
* This prototype really should have the noreturn attribute but
* that causes a warning. Not sure how to fix that.
*/
/* static void reboot(void) __attribute__ ((noreturn)); */
static void reboot(void);
__inline__ static void reboot() {__asm__ ("trap #15; .word 0x0063");}
#endif /* ASM */
#endif /* _MRM_H_ */

1
bsps/m68k/mrm332/include/tm27.h
View File

@@ -1 +0,0 @@
#include <rtems/tm27-default.h>

12
bsps/m68k/mrm332/misc/dotests
View File

@@ -1,12 +0,0 @@
#! /bin/bash
mkdir MyTests
find -name MyTests -prune -or -name "*.nxe" -exec cp {} MyTests \;
stty 1:0:80001cb2:0:3:1c:7f:15:4:5:1:0:11:13:1a:0:12:f:17:16:0:0:0:0:0:0:0:0:0:0:0:0:0:0:0:0 </dev/ttyS1
/bin/cp /dev/ttyS1 screen &
cpJob=$!
( cd MyTests; for f in *nxe; do m68k-elf-gdb ${f} </dev/null; done )
kill -9 $cpJob

13
bsps/m68k/mrm332/misc/gdbinit68
View File

@@ -1,13 +0,0 @@
echo Setting up the environment for mrm debuging.\n
target bdm /dev/bdmcpu320
bdm_setdelay 1000
bdm_autoreset on
set remotecache off
bdm_timetocomeup 0
bdm_init
bdm_reset
set $sfc=5
set $dfc=5
r
q

47
bsps/m68k/mrm332/start/bspstart.c
View File

@@ -1,47 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/*
* COPYRIGHT (c) 1989-2014.
* On-Line Applications Research Corporation (OAR).
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <bsp.h>
#include <bsp/bootcard.h>
#include <rtems/sysinit.h>
extern void Spurious_Initialize(void);
/*
* Must be called after the _ISR_Vector_Table allocation
*/
RTEMS_SYSINIT_ITEM(
Spurious_Initialize,
RTEMS_SYSINIT_BSP_PRE_DRIVERS,
RTEMS_SYSINIT_ORDER_MIDDLE
);
void bsp_start(void)
{
/* Nothing to do */
}

211
bsps/m68k/mrm332/start/linkcmds
View File

@@ -1,211 +0,0 @@
/* linkcmds
*/
OUTPUT_ARCH(m68k)
ENTRY(start)
STARTUP(start.o)
__DYNAMIC = 0;
/*
* ROM:
* +--------------------+ <- low memory
* | .text |
* | etext |
* | ctor list | the ctor and dtor lists are for
* | dtor list | C++ support
* | _endtext |
* | temporary .data | .data is moved to RAM by crt0
* | |
* +--------------------+ <- high memory
*
*
* RAM:
* +--------------------+ <- low memory
* | .data | initialized data goes here
* | _sdata |
* | _edata |
* +--------------------+
* | .bss |
* | __bss_start | start of bss, cleared by crt0
* | _end | start of heap, used by sbrk()
* +--------------------+
* | heap space |
* | _ENDHEAP |
* | stack space |
* +--------------------+ <- high memory
*/
/*
* Declare some sizes.
*/
RomBase = DEFINED(RomBase) ? RomBase : 0x90000;
RamBase = DEFINED(RamBase) ? RamBase : 0x03000;
RamSize = DEFINED(RamSize) ? RamSize : 0x7d000;
RamEnd = RamBase + RamSize;
MEMORY
{
rom : ORIGIN = 0x90000, LENGTH = 0x70000
ram : ORIGIN = 0x03000, LENGTH = 0x7d000
}
_copy_data_from_rom = 1;
HeapSize = DEFINED(HeapSize) ? HeapSize : 0x0;
/*
*
*/
SECTIONS
{
.text :
{
. = .;
text_start = .;
_text_start = .;
*(.text*)
. = ALIGN (16);
/*
* C++ constructors/destructors
*/
*(.gnu.linkonce.t.*)
/*
* Initialization and finalization code.
*
* Various files can provide initialization and finalization
* functions. crtbegin.o and crtend.o are two instances. The
* body of these functions are in .init and .fini sections. We
* accumulate the bodies here, and prepend function prologues
* from crti.o and function epilogues from crtn.o. crti.o must
* be linked first; crtn.o must be linked last. Because these
* are wildcards, it doesn't matter if the user does not
* actually link against crti.o and crtn.o; the linker won't
* look for a file to match a wildcard. The wildcard also
* means that it doesn't matter which directory crti.o and
* crtn.o are in.
*/
PROVIDE (_init = .);
*crti.o(.init)
*(.init)
*crtn.o(.init)
PROVIDE (_fini = .);
*crti.o(.fini)
*(.fini)
*crtn.o(.fini)
/*
* Special FreeBSD sysctl sections.
*/
. = ALIGN (16);
__start_set_sysctl_set = .;
*(set_sysctl_*);
__stop_set_sysctl_set = ABSOLUTE(.);
*(set_domain_*);
*(set_pseudo_*);
/*
* C++ constructors/destructors
*
* gcc uses crtbegin.o to find the start of the constructors
* and destructors so we make sure it is first. Because this
* is a wildcard, it doesn't matter if the user does not
* actually link against crtbegin.o; the linker won't look for
* a file to match a wildcard. The wildcard also means that
* it doesn't matter which directory crtbegin.o is in. The
* constructor and destructor list are terminated in
* crtend.o. The same comments apply to it.
*/
. = ALIGN (16);
*crtbegin.o(.ctors)
*(.ctors)
*crtend.o(.ctors)
*crtbegin.o(.dtors)
*(.dtors)
*crtend.o(.dtors)
/*
* Exception frame info
*/
. = ALIGN (16);
*(.eh_frame)
/*
* Read-only data
*/
. = ALIGN (16);
_rodata_start = . ;
*(.rodata*)
KEEP (*(SORT(.rtemsroset.*)))
*(.gnu.linkonce.r*)
} > rom
.tdata : {
_TLS_Data_begin = .;
*(.tdata .tdata.* .gnu.linkonce.td.*)
_TLS_Data_end = .;
} > rom
.tbss : {
_TLS_BSS_begin = .;
*(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon)
_TLS_BSS_end = .;
. = ALIGN (16);
PROVIDE (_etext = .);
_endtext = .;
__data_start_rom = .;
} > rom
_TLS_Data_size = _TLS_Data_end - _TLS_Data_begin;
_TLS_Data_begin = _TLS_Data_size != 0 ? _TLS_Data_begin : _TLS_BSS_begin;
_TLS_Data_end = _TLS_Data_size != 0 ? _TLS_Data_end : _TLS_BSS_begin;
_TLS_BSS_size = _TLS_BSS_end - _TLS_BSS_begin;
_TLS_Size = _TLS_BSS_end - _TLS_Data_begin;
_TLS_Alignment = MAX (ALIGNOF (.tdata), ALIGNOF (.tbss));
.data : AT(__data_start_rom)
{
PROVIDE (_copy_start = .);
*(.data*)
KEEP (*(SORT(.rtemsrwset.*)))
*(.gnu.linkonce.d*)
*(.gcc_exc)
*(.gcc_except_table*)
*(.jcr)
. = ALIGN (16);
PROVIDE (_edata = .);
PROVIDE (_copy_end = .);
} > ram
.shbss :
{
*(.shbss)
} > ram
.bss :
{
M68Kvec = .;
. += (256 * 4);
_clear_start = .;
*(.dynbss)
*(.bss* .gnu.linkonce.b.*)
*(COMMON)
. = ALIGN (16);
PROVIDE (end = .);
_clear_end = .;
} > ram
.noinit (NOLOAD) : {
*(SORT_BY_NAME (SORT_BY_ALIGNMENT (.noinit*)))
} > ram
.rtemsstack (NOLOAD) : {
*(SORT(.rtemsstack.*))
WorkAreaBase = .;
} > ram
.stab . (NOLOAD) :
{
[ .stab ]
}
.stabstr . (NOLOAD) :
{
[ .stabstr ]
}
/* Addition to let linker know about custom section for GDB pretty-printing support. */
.debug_gdb_scripts 0 : { *(.debug_gdb_scripts) }
}

115
bsps/m68k/mrm332/start/spinit.c
View File

@@ -1,115 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/*
* This routine installs spurious interrupt handlers for the mrm.
*/
/*
* COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993.
* On-Line Applications Research Corporation (OAR).
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <bsp.h>
#include <bsp/fatal.h>
#include <stdio.h>
const char * const _Spurious_Error_[] = {"Reset","Bus Error","Address Error",
"Illegal Instruction","Zero Division","CHK, CHK2 Instruction",
"TRAPcc, TRAPV Instruction","Privilege Violation","Trace",
"Line 1010 Emulation","Line 1111 Emulation","Hardware Breakpoint",
"Coprocessor Protocal Violation",
"Format Error ans Uninitialized Interrupt","Unassigned",
"Spurious Interrupt","AVec1","AVec2","AVec3","AVec4","AVec5","AVec6",
"AVec7","Trap Instruction","Debug","Reboot","Reserved Coprocessor",
"Reserved Unassigned","User Defined"};
static rtems_isr Spurious_Isr(
rtems_vector_number vector
)
{
/*int sp = 0; */
#if 0
const char * const VectDescrip[] = {
_Spurious_Error_[0], _Spurious_Error_[0], _Spurious_Error_[1],
_Spurious_Error_[2], _Spurious_Error_[3], _Spurious_Error_[4],
_Spurious_Error_[5], _Spurious_Error_[6], _Spurious_Error_[7],
_Spurious_Error_[8], _Spurious_Error_[9], _Spurious_Error_[10],
_Spurious_Error_[11], _Spurious_Error_[12], _Spurious_Error_[13],
_Spurious_Error_[13], _Spurious_Error_[14], _Spurious_Error_[14],
_Spurious_Error_[14], _Spurious_Error_[14], _Spurious_Error_[14],
_Spurious_Error_[14], _Spurious_Error_[14], _Spurious_Error_[14],
_Spurious_Error_[15], _Spurious_Error_[16], _Spurious_Error_[17],
_Spurious_Error_[18], _Spurious_Error_[19], _Spurious_Error_[20],
_Spurious_Error_[21], _Spurious_Error_[22], _Spurious_Error_[23],
_Spurious_Error_[24], _Spurious_Error_[23], _Spurious_Error_[23],
_Spurious_Error_[23], _Spurious_Error_[23], _Spurious_Error_[23],
_Spurious_Error_[23], _Spurious_Error_[23], _Spurious_Error_[23],
_Spurious_Error_[23], _Spurious_Error_[23], _Spurious_Error_[23],
_Spurious_Error_[23], _Spurious_Error_[23], _Spurious_Error_[25],
_Spurious_Error_[26], _Spurious_Error_[26], _Spurious_Error_[26],
_Spurious_Error_[26], _Spurious_Error_[26], _Spurious_Error_[26],
_Spurious_Error_[26], _Spurious_Error_[26], _Spurious_Error_[26],
_Spurious_Error_[26], _Spurious_Error_[26], _Spurious_Error_[27],
_Spurious_Error_[27], _Spurious_Error_[27], _Spurious_Error_[27],
_Spurious_Error_[27], _Spurious_Error_[28]};
#endif
/*asm volatile ( "movea.l %%sp,%0 " : "=a" (sp) : "0" (sp) ); */
_CPU_ISR_Set_level( 7 );
/*_UART_flush(); */
#if 0
RAW_PUTS("\n\rRTEMS: Spurious interrupt: ");
RAW_PUTS((char *)VectDescrip[( (vector>64) ? 64 : vector )]);
RAW_PUTS("\n\rRTEMS: Vector: ");
RAW_PUTI(vector);
RAW_PUTS(" sp: ");
RAW_PUTI(sp);
RAW_PUTS("\n\r");
#endif
bsp_fatal( MRM332_FATAL_SPURIOUS_INTERRUPT );
}
void Spurious_Initialize(void)
{
rtems_vector_number vector;
for ( vector = 0x0 ; vector <= 0xFF ; vector++ )
{
switch (vector)
{
case 4:
case 9:
case 31:
case 47:
case 66:
/* These vectors used by CPU32bug - don't overwrite them. */
break;
default:
(void) set_vector( Spurious_Isr, vector, 1 );
break;
}
}
}

71
bsps/m68k/mrm332/start/start.S
View File

@@ -1,71 +0,0 @@
/**
* @file
*
* MRM332 Assembly Start Up Code
*/
/*
* COPYRIGHT (c) 2000.
* Matt Cross <profesor@gweep.net>
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*
*/
#include "mrm332.h"
#include <rtems/asm.h>
#include <rtems/m68k/sim.h>
BEGIN_CODE
/* Put the header necessary for the modified CPU32bug to automatically
start up rtems: */
#if 1
.long 0xbeefbeef ;
#endif
.long 0 ;
.long start ;
.global start
start:
oriw #0x0700,sr /* Mask off interupts */
// Set VBR to CPU32Bug vector table address
movel #0x0,d0 /* Use the initial vectors until we get going */
movecl d0,vbr
/* Set stack pointer */
movel #_ISR_Stack_area_end,d0
movel d0,sp
movel d0,a6
/* include in ram_init.S */
/*
* Initalize the SIM module.
* The stack pointer is not usable until the RAM chip select lines
* are configured. The following code must remain inline.
*/
/* Module Configuration Register */
/* see section(s) 3.1.3-3.1.6 of the SIM Reference Manual */
/* SIMCR etc and SAM macro all defined in sim.h found at */
/* /cpukit/score/cpu/m68k/rtems/m68k/sim.h */
/* The code below does the following: */
/* - Sets Freeze Software Enable */
/* - Turns off Show Cycle Enable */
/* - Sets the location of SIM module mapping */
/* - Sets the SIM Interrupt Arbitration Field */
lea SIMCR, a0
movew #FRZSW,d0
oriw #SAM(0,8,SHEN),d0
oriw #(MM*SIM_MM),d0
oriw #SAM(SIM_IARB,0,IARB),d0
movew d0, a0@
jsr start_c /* Jump to the C startup code */
END_CODE

130
bsps/m68k/mrm332/start/start_c.c
View File

@@ -1,130 +0,0 @@
/**
* @file
*
* MRM332 C Start Up Code
*/
/*
* COPYRIGHT (c) 2000.
* Matt Cross <profesor@gweep.net>
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*
*/
#include <bsp.h>
#include <bsp/bootcard.h>
#include <mrm332.h>
#include <rtems/m68k/sim.h>
#define __START_C__
/*
* This prototype really should have the noreturn attribute but
* that causes a warning. Not sure how to fix that.
*/
/* void dumby_start () __attribute__ ((noreturn)); */
void start_c(void);
void start_c(void) {
#ifdef SET_EDIV
#define OPTIONAL_EDIV EDIV
#else
#define OPTIONAL_EDIV 0
#endif
/* Synthesizer Control Register */
/* see section(s) 4.8 */
/* end include in ram_init.S */
*SYNCR = (unsigned short int) (SAM(MRM_W, 15, VCO) | SAM(0x0, 14, PRESCALE)
| SAM(MRM_Y, 8, COUNTER) | OPTIONAL_EDIV);
while (!(*SYNCR & SLOCK))
; /* protect from clock overshoot */
/* include in ram_init.S */
*SYNCR = (unsigned short int) (SAM(MRM_W, 15, VCO) | SAM(MRM_X, 14,
PRESCALE) | SAM(MRM_Y, 8, COUNTER) | OPTIONAL_EDIV);
/* System Protection Control Register */
/* !!! can only write to once after reset !!! */
/* see section 3.8.4 of the SIM Reference Manual */
*SYPCR = (unsigned char) (HME | BME);
/* Periodic Interrupr Control Register */
/* see section 3.8.2 of the SIM Reference Manual */
*PICR = (unsigned short int) (SAM(0, 8, PIRQL) | SAM(MRM_PIV, 0, PIV));
/* ^^^ zero disables interrupt, don't enable here or ram_init will
be wrong. It's enabled below. */
/* Periodic Interrupt Timer Register */
/* see section 3.8.3 of the SIM Reference Manual */
*PITR = (unsigned short int) (SAM(0x09, 0, PITM));
/* 1.098mS interrupt, assuming 32.768 KHz input clock */
/* Port C Data */
/* load values before enabled */
*PORTC = (unsigned char) 0x0;
/* Port E and F Data Register */
/* see section 9 of the SIM Reference Manual */
*PORTE0 = (unsigned char) 0;
*PORTF0 = (unsigned char) 0;
/* Port E and F Data Direction Register */
/* see section 9 of the SIM Reference Manual */
*DDRE = (unsigned char) 0xff;
*DDRF = (unsigned char) 0xfd;
/* Port E and F Pin Assignment Register. Set up Port E and F as I/O */
/* see section 9 of the SIM Reference Manual */
*PEPAR = (unsigned char) 0;
*PFPAR = (unsigned char) 0;
/* end of SIM initalization code */
/* end include in ram_init.S */
/*
* Initialize RAM by copying the .data section out of ROM (if
* needed) and "zero-ing" the .bss section.
*/
{
register char *src = _etext;
register char *dst = _copy_start;
if (_copy_data_from_rom) {
/* ROM has data at end of text; copy it. */
while (dst < _edata)
*dst++ = *src++;
}
/* Zero bss */
for (dst = _clear_start; dst < end; dst++) {
*dst = 0;
}
}
/*
* Initialize vector table.
*/
{
rtems_isr_entry *monitors_vector_table;
m68k_get_vbr(monitors_vector_table);
M68Kvec[4] = monitors_vector_table[4]; /* breakpoints vector */
M68Kvec[9] = monitors_vector_table[9]; /* trace vector */
M68Kvec[31] = monitors_vector_table[31]; /* level 7 interrupt */
M68Kvec[47] = monitors_vector_table[47]; /* system call vector */
M68Kvec[66] = monitors_vector_table[66]; /* user defined */
m68k_set_vbr(&M68Kvec);
}
/*
* Execute main with arguments argc and agrv.
*/
boot_card((void*)0);
reboot();
}