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move timebase access functions from cpukit to libcpu

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This commit is contained in:
Thomas Doerfler
2009-10-30 19:28:46 +00:00
parent 94d9beecf4
commit 3fcc78aef9
7 changed files with 127 additions and 107 deletions
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5
c/src/lib/libcpu/powerpc/ChangeLog
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@@ -1,3 +1,8 @@
2009-10-23 Thomas Doerfler <Thomas.Doerfler@imd-systems.de>
* shared/include/powerpc-utility.h, mpc6xx/timer/timer.c:
moved timebase/decrementer access from cpukit to libcpu
2009-10-23 Sebastian Huber <sebastian.huber@embedded-brains.de>
* new-exceptions/e500_raw_exc_init.c, new-exceptions/raw_exception.c,

2
c/src/lib/libcpu/powerpc/mpc6xx/timer/timer.c
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@@ -18,6 +18,8 @@
#include <assert.h>
#include <rtems.h>
#include <bsp.h>
#include <libcpu/powerpc-utility.h>
uint64_t Timer_driver_Start_time;

110
c/src/lib/libcpu/powerpc/shared/include/powerpc-utility.h
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@@ -242,6 +242,116 @@ static inline void ppc_external_exceptions_disable(uint32_t msr)
RTEMS_COMPILER_MEMORY_BARRIER();
}
#ifndef ASM
/*
* Simple spin delay in microsecond units for device drivers.
* This is very dependent on the clock speed of the target.
*/
#if defined(mpx8xx) || defined(mpc860) || defined(mpc821)
/* Wonderful bookE doesn't have mftb/mftbu; they only
* define the TBRU/TBRL SPRs so we use these. Luckily,
* we run in supervisory mode so that should work on
* all CPUs. In user mode we'd have a problem...
* 2007/11/30, T.S.
*
* OTOH, PSIM currently lacks support for reading
* SPRs 268/269. You need GDB patch sim/2376 to avoid
* a crash...
* OTOH, the MPC8xx do not allow to read the timebase registers via mfspr.
* we NEED a mftb to access the time base.
* 2009/10/30 Th. D.
*/
#define CPU_Get_timebase_low( _value ) \
asm volatile( "mftb %0" : "=r" (_value) )
#else
#define CPU_Get_timebase_low( _value ) \
asm volatile( "mfspr %0,268" : "=r" (_value) )
#endif
/* Must be provided for rtems_bsp_delay to work */
extern uint32_t bsp_clicks_per_usec;
#define rtems_bsp_delay( _microseconds ) \
do { \
uint32_t start, ticks, now; \
CPU_Get_timebase_low( start ) ; \
ticks = (_microseconds) * bsp_clicks_per_usec; \
do \
CPU_Get_timebase_low( now ) ; \
while (now - start < ticks); \
} while (0)
#define rtems_bsp_delay_in_bus_cycles( _cycles ) \
do { \
uint32_t start, now; \
CPU_Get_timebase_low( start ); \
do \
CPU_Get_timebase_low( now ); \
while (now - start < (_cycles)); \
} while (0)
#endif /* ASM */
#ifndef ASM
/*
* Routines to access the decrementer register
*/
#define PPC_Set_decrementer( _clicks ) \
do { \
asm volatile( "mtdec %0" : : "r" ((_clicks)) ); \
} while (0)
#define PPC_Get_decrementer( _clicks ) \
asm volatile( "mfdec %0" : "=r" (_clicks) )
#endif /* ASM */
#ifndef ASM
/*
* Routines to access the time base register
*/
static inline uint64_t PPC_Get_timebase_register( void )
{
uint32_t tbr_low;
uint32_t tbr_high;
uint32_t tbr_high_old;
uint64_t tbr;
do {
#if defined(mpx8xx) || defined(mpc860) || defined(mpc821)
/* See comment above (CPU_Get_timebase_low) */
asm volatile( "mftbu %0" : "=r" (tbr_high_old));
asm volatile( "mftb %0" : "=r" (tbr_low));
asm volatile( "mftbu %0" : "=r" (tbr_high));
#else
asm volatile( "mfspr %0, 269" : "=r" (tbr_high_old));
asm volatile( "mfspr %0, 268" : "=r" (tbr_low));
asm volatile( "mfspr %0, 269" : "=r" (tbr_high));
#endif
} while ( tbr_high_old != tbr_high );
tbr = tbr_high;
tbr <<= 32;
tbr |= tbr_low;
return tbr;
}
static inline void PPC_Set_timebase_register (uint64_t tbr)
{
uint32_t tbr_low;
uint32_t tbr_high;
tbr_low = (uint32_t) tbr;
tbr_high = (uint32_t) (tbr >> 32);
asm volatile( "mtspr 284, %0" : : "r" (tbr_low));
asm volatile( "mtspr 285, %0" : : "r" (tbr_high));
}
#endif /* ASM */
static inline uint32_t ppc_decrementer_register(void)
{
uint32_t dec;