From 3ca279e5b191f04769c0fe024a71e48d8b73be6a Mon Sep 17 00:00:00 2001 From: Matheus Pecoraro Date: Wed, 19 Jun 2024 04:22:19 -0300 Subject: [PATCH] amd64: Use proper interrupt disable directive Use rtems_interrupt_local_disable and enable in clock.c to avoid enabling interrupts during system initialization --- bsps/x86_64/amd64/clock/clock.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/bsps/x86_64/amd64/clock/clock.c b/bsps/x86_64/amd64/clock/clock.c index 76e537755a..13e2883254 100644 --- a/bsps/x86_64/amd64/clock/clock.c +++ b/bsps/x86_64/amd64/clock/clock.c @@ -169,14 +169,15 @@ uint32_t apic_timer_calibrate(void) ); /* - * Disable interrupts while we calibrate for 2 reasons: + * Make sure interrupts are disabled while we calibrate for 2 reasons: * - Writing values to the PIT should be atomic (for now, this is okay * because we're the only ones ever touching the PIT ports, but an * interrupt resetting the PIT could mess calibration up). * - We need to make sure that no interrupts throw our synchronization of * the APIC timer off. */ - amd64_disable_interrupts(); + rtems_interrupt_level level; + rtems_interrupt_local_disable(level); /* Set PIT reload value */ uint32_t pit_ticks = PIT_CALIBRATE_TICKS; @@ -222,8 +223,8 @@ uint32_t apic_timer_calibrate(void) /* We ran the PIT for a fraction of a second */ apic_ticks_per_sec = apic_ticks_per_sec * PIT_CALIBRATE_DIVIDER; - /* Re-enable interrupts now that calibration is complete */ - amd64_enable_interrupts(); + /* Restore interrupts now that calibration is complete */ + rtems_interrupt_local_enable(level); /* Confirm that the APIC timer never hit 0 and IRQ'd during calibration */ assert(Clock_driver_ticks == 0);