arm: Use compiler memory barrier by default

This commit is contained in:
Sebastian Huber
2015-09-01 09:42:46 +02:00
parent 509e8d7f4d
commit 39e3e20140

View File

@@ -8,7 +8,7 @@
* This include file contains information pertaining to the ARM * This include file contains information pertaining to the ARM
* processor. * processor.
* *
* Copyright (c) 2009-2014 embedded brains GmbH. * Copyright (c) 2009-2015 embedded brains GmbH.
* *
* Copyright (c) 2007 Ray Xu <Rayx.cn@gmail.com> * Copyright (c) 2007 Ray Xu <Rayx.cn@gmail.com>
* *
@@ -301,6 +301,8 @@ static inline void _ARM_Data_memory_barrier( void )
{ {
#ifdef ARM_MULTILIB_HAS_BARRIER_INSTRUCTIONS #ifdef ARM_MULTILIB_HAS_BARRIER_INSTRUCTIONS
__asm__ volatile ( "dmb" : : : "memory" ); __asm__ volatile ( "dmb" : : : "memory" );
#else
RTEMS_COMPILER_MEMORY_BARRIER();
#endif #endif
} }
@@ -308,6 +310,8 @@ static inline void _ARM_Data_synchronization_barrier( void )
{ {
#ifdef ARM_MULTILIB_HAS_BARRIER_INSTRUCTIONS #ifdef ARM_MULTILIB_HAS_BARRIER_INSTRUCTIONS
__asm__ volatile ( "dsb" : : : "memory" ); __asm__ volatile ( "dsb" : : : "memory" );
#else
RTEMS_COMPILER_MEMORY_BARRIER();
#endif #endif
} }
@@ -315,6 +319,8 @@ static inline void _ARM_Instruction_synchronization_barrier( void )
{ {
#ifdef ARM_MULTILIB_HAS_BARRIER_INSTRUCTIONS #ifdef ARM_MULTILIB_HAS_BARRIER_INSTRUCTIONS
__asm__ volatile ( "isb" : : : "memory" ); __asm__ volatile ( "isb" : : : "memory" );
#else
RTEMS_COMPILER_MEMORY_BARRIER();
#endif #endif
} }