forked from Imagelibrary/rtems
arm: Use compiler memory barrier by default
This commit is contained in:
@@ -8,7 +8,7 @@
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* This include file contains information pertaining to the ARM
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* This include file contains information pertaining to the ARM
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* processor.
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* processor.
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*
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*
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* Copyright (c) 2009-2014 embedded brains GmbH.
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* Copyright (c) 2009-2015 embedded brains GmbH.
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*
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*
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* Copyright (c) 2007 Ray Xu <Rayx.cn@gmail.com>
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* Copyright (c) 2007 Ray Xu <Rayx.cn@gmail.com>
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*
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*
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@@ -301,6 +301,8 @@ static inline void _ARM_Data_memory_barrier( void )
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{
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{
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#ifdef ARM_MULTILIB_HAS_BARRIER_INSTRUCTIONS
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#ifdef ARM_MULTILIB_HAS_BARRIER_INSTRUCTIONS
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__asm__ volatile ( "dmb" : : : "memory" );
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__asm__ volatile ( "dmb" : : : "memory" );
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#else
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RTEMS_COMPILER_MEMORY_BARRIER();
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#endif
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#endif
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}
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}
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@@ -308,6 +310,8 @@ static inline void _ARM_Data_synchronization_barrier( void )
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{
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{
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#ifdef ARM_MULTILIB_HAS_BARRIER_INSTRUCTIONS
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#ifdef ARM_MULTILIB_HAS_BARRIER_INSTRUCTIONS
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__asm__ volatile ( "dsb" : : : "memory" );
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__asm__ volatile ( "dsb" : : : "memory" );
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#else
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RTEMS_COMPILER_MEMORY_BARRIER();
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#endif
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#endif
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}
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}
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@@ -315,6 +319,8 @@ static inline void _ARM_Instruction_synchronization_barrier( void )
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{
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{
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#ifdef ARM_MULTILIB_HAS_BARRIER_INSTRUCTIONS
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#ifdef ARM_MULTILIB_HAS_BARRIER_INSTRUCTIONS
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__asm__ volatile ( "isb" : : : "memory" );
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__asm__ volatile ( "isb" : : : "memory" );
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#else
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RTEMS_COMPILER_MEMORY_BARRIER();
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#endif
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#endif
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}
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}
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