forked from Imagelibrary/rtems
bsps/powerpc: Add and use ppc_cpu_is_specific_e200
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@@ -105,7 +105,10 @@ static void ppc_exc_initialize_booke(void)
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/* Interupt vector prefix register */
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MTIVPR(ppc_exc_vector_base);
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if (ppc_cpu_is(PPC_e200z0) || ppc_cpu_is(PPC_e200z1)) {
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if (
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ppc_cpu_is_specific_e200(PPC_e200z0)
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|| ppc_cpu_is_specific_e200(PPC_e200z1)
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) {
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/*
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* These cores have hard wired IVOR registers. An access will case a
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* program exception.
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@@ -135,7 +138,7 @@ static void ppc_exc_initialize_booke(void)
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MTIVOR(33, ppc_exc_vector_address(ASM_E500_EMB_FP_DATA_VECTOR));
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MTIVOR(34, ppc_exc_vector_address(ASM_E500_EMB_FP_ROUND_VECTOR));
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}
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if (ppc_cpu_is_e500()) {
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if (ppc_cpu_is_specific_e200(PPC_e200z7) || ppc_cpu_is_e500()) {
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MTIVOR(35, ppc_exc_vector_address(ASM_E500_PERFMON_VECTOR));
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}
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}
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@@ -124,6 +124,11 @@ static inline bool ppc_cpu_is_e200(void)
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return (ppc_cpu_current() & 0xff80) == 0x8100;
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}
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static inline bool ppc_cpu_is_specific_e200(ppc_cpu_id_t id)
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{
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return (ppc_cpu_current() & 0xfff0) == id;
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}
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static inline bool ppc_cpu_is_e300(void)
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{
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return ppc_cpu_current() == PPC_e300c1
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