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powerpc: Add r2 to CPU context

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The r2 may be used for thread-local storage.
This commit is contained in:
Sebastian Huber
2013-06-24 15:21:46 +02:00
parent 8dc2e7bd7e
commit 39a4574652
5 changed files with 20 additions and 12 deletions
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2
c/src/lib/libcpu/powerpc/new-exceptions/cpu.c
View File

@@ -68,6 +68,7 @@ void _CPU_Context_Initialize(
ppc_context *the_ppc_context;
uint32_t msr_value;
uint32_t sp;
register uint32_t gpr2 __asm__("2");
sp = (uint32_t)stack_base + size - PPC_MINIMUM_STACK_FRAME_SIZE;
@@ -127,6 +128,7 @@ void _CPU_Context_Initialize(
the_ppc_context->gpr1 = sp;
the_ppc_context->msr = msr_value;
the_ppc_context->lr = (uint32_t) entry_point;
the_ppc_context->gpr2 = gpr2;
#ifdef __ALTIVEC__
_CPU_Context_initialize_altivec( the_ppc_context );

6
c/src/lib/libcpu/powerpc/new-exceptions/cpu_asm.S
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@@ -23,7 +23,7 @@
* COPYRIGHT (c) 1989-1997.
* On-Line Applications Research Corporation (OAR).
*
* Copyright (c) 2011-2012 embedded brains GmbH.
* Copyright (c) 2011-2013 embedded brains GmbH.
*
* The license and distribution terms for this file may in
* the file LICENSE in this distribution or at
@@ -323,6 +323,8 @@ PROC (_CPU_Context_switch):
PPC_GPR_STORE r30, PPC_CONTEXT_OFFSET_GPR30(r3)
PPC_GPR_STORE r31, PPC_CONTEXT_OFFSET_GPR31(r3)
stw r2, PPC_CONTEXT_OFFSET_GPR2(r3)
/* Restore context from r4 */
restore_context:
@@ -363,6 +365,8 @@ restore_context:
PPC_GPR_LOAD r30, PPC_CONTEXT_OFFSET_GPR30(r4)
PPC_GPR_LOAD r31, PPC_CONTEXT_OFFSET_GPR31(r4)
lwz r2, PPC_CONTEXT_OFFSET_GPR2(r4)
mtcr r7
mtlr r6
mtmsr r5

1
cpukit/score/cpu/powerpc/cpu.c
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@@ -51,6 +51,7 @@ PPC_ASSERT_OFFSET(gpr28, GPR28);
PPC_ASSERT_OFFSET(gpr29, GPR29);
PPC_ASSERT_OFFSET(gpr30, GPR30);
PPC_ASSERT_OFFSET(gpr31, GPR31);
PPC_ASSERT_OFFSET(gpr2, GPR2);
RTEMS_STATIC_ASSERT(
sizeof(Context_Control) % PPC_DEFAULT_CACHE_LINE_SIZE == 0,

13
cpukit/score/cpu/powerpc/ppc-context-validate.S
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@@ -110,7 +110,9 @@ _CPU_Context_validate:
addi r25, r3, 20
addi r26, r3, 21
addi r27, r3, 22
addi r28, r3, 23
/* GPR28 contains the GPR2 pattern */
xor r28, r2, r3
/* GPR29 and CR are equal most of the time */
addi r29, r3, 24
@@ -197,7 +199,7 @@ check:
addi r4, r3, 22
cmpw r4, r27
bne restore
addi r4, r3, 23
xor r4, r2, r3
cmpw r4, r28
bne restore
addi r4, r3, 24
@@ -224,13 +226,6 @@ check:
bne restore
cmpw r31, r1
bne restore
#if 0
/* This is only valid if we use the EABI */
lis r4, _SDA2_BASE_@h
ori r4, r4, _SDA2_BASE_@l
cmpw r4, r2
bne restore
#endif
mtcr r29
addi r5, r3, 1
b check

10
cpukit/score/cpu/powerpc/rtems/score/cpu.h
View File

@@ -25,7 +25,7 @@
*
* Copyright (c) 2001 Surrey Satellite Technology Limited (SSTL).
*
* Copyright (c) 2010-2012 embedded brains GmbH.
* Copyright (c) 2010-2013 embedded brains GmbH.
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
@@ -273,7 +273,11 @@ typedef struct {
/* There is no CPU specific per-CPU state */
} CPU_Per_CPU_control;
/* Non-volatile context according to E500ABIUG and EABI */
/*
* Non-volatile context according to E500ABIUG, EABI and 32-bit TLS (according
* to "Power Architecture 32-bit Application Binary Interface Supplement 1.0 -
* Linux and Embedded")
*/
typedef struct {
uint32_t gpr1;
uint32_t msr;
@@ -297,6 +301,7 @@ typedef struct {
PPC_GPR_TYPE gpr29;
PPC_GPR_TYPE gpr30;
PPC_GPR_TYPE gpr31;
uint32_t gpr2;
#ifdef __ALTIVEC__
/*
* 12 non-volatile vector registers, cache-aligned area for vscr/vrsave
@@ -361,6 +366,7 @@ static inline ppc_context *ppc_get_context( Context_Control *context )
#define PPC_CONTEXT_OFFSET_GPR29 PPC_CONTEXT_GPR_OFFSET( 29 )
#define PPC_CONTEXT_OFFSET_GPR30 PPC_CONTEXT_GPR_OFFSET( 30 )
#define PPC_CONTEXT_OFFSET_GPR31 PPC_CONTEXT_GPR_OFFSET( 31 )
#define PPC_CONTEXT_OFFSET_GPR2 PPC_CONTEXT_GPR_OFFSET( 32 )
#ifndef ASM
typedef struct {