forked from Imagelibrary/rtems
corrected bug in ata.c to avoid lockup of libblock
added remote frequest support to gen5200 BSP
This commit is contained in:
@@ -1,3 +1,8 @@
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2006-12-18 Thomas Doerfler <Thomas.Doerfler@embedded-brains.de>
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* libchip/ide/ata.c: in ata_request_done: moved call to free()
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from preemption disabled region
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2006-12-13 Joel Sherrill <joel@OARcorp.com>
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PR 1181/bsps
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@@ -1,3 +1,11 @@
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2006-12-18 Thomas Doerfler <Thomas.Doerfler@embedded-brains.de>
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* gen5200/mscan/mscan.c,
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* gen5200/mscan/mscan.h,
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* gen5200/mscan/mscan_int.h:
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split mscan.h into two headers, corrected CAN filtering code to
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support remote requests
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2006-12-13 Till Straumann <strauman@slac.stanford.edu>
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* mvme5500/Makefile.am, mvme5500/preinstall.am:
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@@ -84,7 +84,7 @@ irq_rel_CPPFLAGS = $(AM_CPPFLAGS)
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irq_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
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noinst_PROGRAMS += mscan.rel
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mscan_rel_SOURCES = mscan/mscan.c mscan/mscan.h
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mscan_rel_SOURCES = mscan/mscan.c mscan/mscan.h mscan/mscan_int.h
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mscan_rel_CPPFLAGS = $(AM_CPPFLAGS)
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mscan_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
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@@ -91,6 +91,8 @@
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#define MIN(a,b) (((a)<(b))?(a):(b))
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#endif
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#define IDE_DMA_TEST FALSE
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#ifdef BRS5L
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#define IDE_USE_INT TRUE
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#define IDE_READ_USE_DMA TRUE
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#define IDE_USE_READ_PIO_OPT FALSE
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@@ -98,6 +100,16 @@
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#define IDE_USE_WRITE_PIO_OPT TRUE
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/* #define IDE_USE_DMA (IDE_READ_USE_DMA||IDE_WRITE_USE_DMA) */
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#define IDE_USE_DMA TRUE
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#else
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#define IDE_USE_INT TRUE
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#define IDE_READ_USE_DMA FALSE
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#define IDE_USE_READ_PIO_OPT FALSE
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#define IDE_WRITE_USE_DMA FALSE
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#define IDE_USE_WRITE_PIO_OPT FALSE
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/* #define IDE_USE_DMA (IDE_READ_USE_DMA||IDE_WRITE_USE_DMA) */
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#define IDE_USE_DMA FALSE
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#endif
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#define IDE_USE_STATISTICS TRUE
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#if IDE_USE_DMA
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@@ -26,12 +26,10 @@
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#include "../include/bsp.h"
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#include "../irq/irq.h"
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#include "../include/mpc5200.h"
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#include "mscan.h"
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#include "../mscan/mscan_int.h"
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/* #define MSCAN_LOOPBACK */
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volatile uint32_t tx_int_wr_count = 0;
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struct mpc5200_rx_cntrl mpc5200_mscan_rx_cntrl[MPC5200_CAN_NO];
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static struct mscan_channel_info chan_info[MPC5200_CAN_NO];
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@@ -176,46 +174,42 @@ static void mpc5200_mscan_interrupt_handler(rtems_irq_hdl_param handle)
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mscan->txidr2 = 0;
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mscan->txidr3 = 0;
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/* insert dlc into mscan register */
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mscan->txdlr = (uint8_t)((tx_mess_ptr->mess_len) & 0x000F);
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}
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/* select one free tx buffer if TOUCAN not registered) */
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if(((mscan_hdl->toucan_callback) == NULL) || (((mscan_hdl->toucan_callback) != NULL) && ((tx_mess_ptr->toucan_tx_id) == idx)))
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/* fill in tx data if TOUCAN is activ an TOUCAN index have a match with the tx buffer or TOUCAN is disabled */
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if(((mscan_hdl->toucan_callback) == NULL) || (((mscan_hdl->toucan_callback) != NULL) && ((tx_mess_ptr->toucan_tx_idx) == idx)))
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{
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/* set tx id */
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mscan->txidr0 = SET_IDR0(tx_mess_ptr->mess_id);
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mscan->txidr1 = SET_IDR1(tx_mess_ptr->mess_id);
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mscan->txidr2 = 0;
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mscan->txidr3 = 0;
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/* insert dlc into mscan register */
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mscan->txdlr = (uint8_t)((tx_mess_ptr->mess_len) & 0x000F);
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/* copy tx data to MSCAN registers */
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switch(mscan->txdlr)
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/* skip data copy in case of RTR */
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if(!(MSCAN_MESS_ID_HAS_RTR(tx_mess_ptr->mess_id)))
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{
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case 8:
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mscan->txdsr7 = tx_mess_ptr->mess_data[7];
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case 7:
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mscan->txdsr6 = tx_mess_ptr->mess_data[6];
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case 6:
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mscan->txdsr5 = tx_mess_ptr->mess_data[5];
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case 5:
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mscan->txdsr4 = tx_mess_ptr->mess_data[4];
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case 4:
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mscan->txdsr3 = tx_mess_ptr->mess_data[3];
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case 3:
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mscan->txdsr2 = tx_mess_ptr->mess_data[2];
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case 2:
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mscan->txdsr1 = tx_mess_ptr->mess_data[1];
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case 1:
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mscan->txdsr0 = tx_mess_ptr->mess_data[0];
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break;
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default:
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break;
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}
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/* copy tx data to MSCAN registers */
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switch(mscan->txdlr)
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{
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case 8:
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mscan->txdsr7 = tx_mess_ptr->mess_data[7];
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case 7:
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mscan->txdsr6 = tx_mess_ptr->mess_data[6];
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case 6:
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mscan->txdsr5 = tx_mess_ptr->mess_data[5];
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case 5:
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mscan->txdsr4 = tx_mess_ptr->mess_data[4];
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case 4:
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mscan->txdsr3 = tx_mess_ptr->mess_data[3];
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case 3:
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mscan->txdsr2 = tx_mess_ptr->mess_data[2];
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case 2:
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mscan->txdsr1 = tx_mess_ptr->mess_data[1];
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case 1:
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mscan->txdsr0 = tx_mess_ptr->mess_data[0];
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break;
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default:
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break;
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}
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}
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/* enable message buffer specific interrupt */
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mscan->tier |= mscan->bsel;
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@@ -226,8 +220,6 @@ static void mpc5200_mscan_interrupt_handler(rtems_irq_hdl_param handle)
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/* release counting semaphore of tx ring buffer */
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rtems_semaphore_release((rtems_id)(chan->tx_rb_sid));
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tx_int_wr_count++;
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}
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else
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{
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@@ -301,30 +293,34 @@ static void mpc5200_mscan_interrupt_handler(rtems_irq_hdl_param handle)
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/* get time stamp */
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rx_mess_ptr->mess_time_stamp = ((mscan->rxtimh << 8) | (mscan->rxtiml));
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/* get the data */
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switch(rx_mess_ptr->mess_len)
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{
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/* skip data copy in case of RTR */
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if(!(MSCAN_MESS_ID_HAS_RTR(rx_mess_ptr->mess_id)))
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case 8:
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rx_mess_ptr->mess_data[7] = mscan->rxdsr7;
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case 7:
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rx_mess_ptr->mess_data[6] = mscan->rxdsr6;
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case 6:
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rx_mess_ptr->mess_data[5] = mscan->rxdsr5;
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case 5:
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rx_mess_ptr->mess_data[4] = mscan->rxdsr4;
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case 4:
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rx_mess_ptr->mess_data[3] = mscan->rxdsr3;
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case 3:
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rx_mess_ptr->mess_data[2] = mscan->rxdsr2;
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case 2:
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rx_mess_ptr->mess_data[1] = mscan->rxdsr1;
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case 1:
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rx_mess_ptr->mess_data[0] = mscan->rxdsr0;
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case 0:
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default:
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break;
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{
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/* get the data */
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switch(rx_mess_ptr->mess_len)
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{
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case 8:
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rx_mess_ptr->mess_data[7] = mscan->rxdsr7;
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case 7:
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rx_mess_ptr->mess_data[6] = mscan->rxdsr6;
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case 6:
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rx_mess_ptr->mess_data[5] = mscan->rxdsr5;
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case 5:
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rx_mess_ptr->mess_data[4] = mscan->rxdsr4;
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case 4:
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rx_mess_ptr->mess_data[3] = mscan->rxdsr3;
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case 3:
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rx_mess_ptr->mess_data[2] = mscan->rxdsr2;
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case 2:
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rx_mess_ptr->mess_data[1] = mscan->rxdsr1;
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case 1:
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rx_mess_ptr->mess_data[0] = mscan->rxdsr0;
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case 0:
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default:
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break;
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}
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}
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if(mscan_hdl->toucan_callback == NULL)
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@@ -871,15 +867,15 @@ void mpc5200_mscan_perform_init_mode_settings(volatile struct mpc5200_mscan *msc
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mscan->idac &= ~(IDAC_IDAM1);
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mscan->idac |= (IDAC_IDAM0);
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/* initialize rx filter masks (16 bit) */
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mscan->idmr0 = SET_IDMR0(0x07FF);
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mscan->idmr1 = SET_IDMR1(0x07FF);
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mscan->idmr2 = SET_IDMR2(0x07FF);
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mscan->idmr3 = SET_IDMR3(0x07FF);
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mscan->idmr4 = SET_IDMR4(0x07FF);
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mscan->idmr5 = SET_IDMR5(0x07FF);
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mscan->idmr6 = SET_IDMR6(0x07FF);
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mscan->idmr7 = SET_IDMR7(0x07FF);
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/* initialize rx filter masks (16 bit), don't care including rtr */
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mscan->idmr0 = SET_IDMR0(0x7FF);
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mscan->idmr1 = SET_IDMR1(0x7FF);
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mscan->idmr2 = SET_IDMR2(0x7FF);
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mscan->idmr3 = SET_IDMR3(0x7FF);
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mscan->idmr4 = SET_IDMR4(0x7FF);
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mscan->idmr5 = SET_IDMR5(0x7FF);
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mscan->idmr6 = SET_IDMR6(0x7FF);
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mscan->idmr7 = SET_IDMR7(0x7FF);
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/* Control Register 1 --------------------------------------------*/
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/* [07]:CANE 0->1 : MSCAN Module is enabled */
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@@ -1301,7 +1297,7 @@ rtems_device_driver mscan_write( rtems_device_major_number major,
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{
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/* append the TOUCAN tx_id to the mess. due to interrupt handling */
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tx_mess->toucan_tx_id = tx_parms->tx_id;
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tx_mess->toucan_tx_idx = tx_parms->tx_idx;
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/* fill the tx ring buffer with the message */
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fill_tx_buffer(chan, tx_mess);
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@@ -1486,19 +1482,19 @@ rtems_device_driver mscan_control( rtems_device_major_number major,
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{
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case RX_BUFFER_0:
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ctrl_parms->ctrl_id_mask = GET_IDMR0(mscan->idmr0) | GET_IDMR1(mscan->idmr1);
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ctrl_parms->ctrl_id_mask = (GET_IDMR0(mscan->idmr0) | GET_IDMR1(mscan->idmr1));
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break;
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case RX_BUFFER_1:
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ctrl_parms->ctrl_id_mask = GET_IDMR2(mscan->idmr2) | GET_IDMR3(mscan->idmr3);
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ctrl_parms->ctrl_id_mask = (GET_IDMR2(mscan->idmr2) | GET_IDMR3(mscan->idmr3));
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break;
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case RX_BUFFER_2:
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ctrl_parms->ctrl_id_mask = GET_IDMR4(mscan->idmr4) | GET_IDMR5(mscan->idmr5);
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ctrl_parms->ctrl_id_mask = (GET_IDMR4(mscan->idmr4) | GET_IDMR5(mscan->idmr5));
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break;
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case RX_BUFFER_3:
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ctrl_parms->ctrl_id_mask = GET_IDMR6(mscan->idmr6) | GET_IDMR7(mscan->idmr7);
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ctrl_parms->ctrl_id_mask = (GET_IDMR6(mscan->idmr6) | GET_IDMR7(mscan->idmr7));
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break;
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default:
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@@ -17,7 +17,7 @@
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| http://www.rtems.com/license/LICENSE. |
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| |
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+-----------------------------------------------------------------+
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| this file declares stuff for the mscan driver |
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| this file has to be included by application when using mscan |
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\*===============================================================*/
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#ifndef __MSCAN_H__
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#define __MSCAN_H__
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@@ -26,17 +26,6 @@
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extern "C" {
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#endif
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#define MIN_NO_OF_TQ 7
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#define NO_OF_TABLE_ENTRIES 4
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#define TSEG_1 1
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#define TSEG_2 2
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#define SJW 3
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#define MSCAN_MAX_DATA_BYTES 8
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#define MSCAN_RX_BUFF_NUM 4
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#define MSCAN_TX_BUFF_NUM 3
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#define MSCAN_A_DEV_NAME "/dev/mscana"
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#define MSCAN_B_DEV_NAME "/dev/mscanb"
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#define MSCAN_0_DEV_NAME "/dev/mscan0"
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@@ -44,20 +33,12 @@ extern "C" {
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#define MSCAN_A 0
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#define MSCAN_B 1
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#define MSCAN_NON_INITIALIZED_MODE 0
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#define MSCAN_INITIALIZED_MODE 1
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#define MSCAN_INIT_NORMAL_MODE 2
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#define MSCAN_NORMAL_MODE 4
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#define MSCAN_SLEEP_MODE 8
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#define MSCAN_MAX_DATA_BYTES 8
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#define CAN_BIT_RATE_MAX 1000000
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#define CAN_BIT_RATE_MIN 100000
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#define CAN_BIT_RATE 100000
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#define CAN_MAX_NO_OF_TQ 25
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#define CAN_MAX_NO_OF_TQ_TSEG1 15
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#define CAN_MAX_NO_OF_TQ_TSEG2 7
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#define CAN_MAX_NO_OF_TQ_SJW 2
|
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#define MSCAN_MESS_ID_RTR (1 << 15)
|
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#define MSCAN_MESS_ID_RTR_MASK (1 << 15)
|
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#define MSCAN_MESS_ID_ID_MASK ((1 << 11)-1)
|
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#define MSCAN_MESS_ID_HAS_RTR(id) (((id)&MSCAN_MESS_ID_RTR_MASK)==MSCAN_MESS_ID_RTR)
|
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|
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#define MSCAN_SET_RX_ID 1
|
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#define MSCAN_GET_RX_ID 2
|
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@@ -65,187 +46,10 @@ extern "C" {
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#define MSCAN_GET_RX_ID_MASK 4
|
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#define MSCAN_SET_TX_ID 5
|
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#define MSCAN_GET_TX_ID 6
|
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|
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#define TOUCAN_MSCAN_INIT 7
|
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#define MSCAN_SET_BAUDRATE 8
|
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#define SET_TX_BUF_NO 9
|
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|
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#define MSCAN_RX_BUFF_NOACTIVE (0 << 4)
|
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#define MSCAN_RX_BUFF_EMPTY (1 << 6)
|
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#define MSCAN_RX_BUFF_FULL (1 << 5)
|
||||
#define MSCAN_RX_BUFF_OVERRUN ((MSCAN_RX_BUFF_EMPTY) | (MSCAN_RX_BUFF_FULL))
|
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#define MSCAN_RX_BUFF_BUSY (1 << 4)
|
||||
|
||||
#define MSCAN_MBUFF_MASK 0x07
|
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|
||||
#define MSCAN_TX_BUFF0 (1 << 0)
|
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#define MSCAN_TX_BUFF1 (1 << 1)
|
||||
#define MSCAN_TX_BUFF2 (1 << 2)
|
||||
|
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#define MSCAN_IDE (1 << 0)
|
||||
#define MSCAN_RTR (1 << 1)
|
||||
#define MSCAN_READ_RXBUFF_0 (1 << 2)
|
||||
#define MSCAN_READ_RXBUFF_1 (1 << 2)
|
||||
#define MSCAN_READ_RXBUFF_2 (1 << 2)
|
||||
#define MSCAN_READ_RXBUFF_3 (1 << 2)
|
||||
|
||||
#define CTL0_RXFRM (1 << 7)
|
||||
#define CTL0_RXACT (1 << 6)
|
||||
#define CTL0_CSWAI (1 << 5)
|
||||
#define CTL0_SYNCH (1 << 4)
|
||||
#define CTL0_TIME (1 << 3)
|
||||
#define CTL0_WUPE (1 << 2)
|
||||
#define CTL0_SLPRQ (1 << 1)
|
||||
#define CTL0_INITRQ (1 << 0)
|
||||
|
||||
#define CTL1_CANE (1 << 7)
|
||||
#define CTL1_CLKSRC (1 << 6)
|
||||
#define CTL1_LOOPB (1 << 5)
|
||||
#define CTL1_LISTEN (1 << 4)
|
||||
#define CTL1_WUPM (1 << 2)
|
||||
#define CTL1_SLPAK (1 << 1)
|
||||
#define CTL1_INITAK (1 << 0)
|
||||
|
||||
#define BTR0_SJW(btr0) ((btr0) << 6)
|
||||
#define BTR0_BRP(btr0) ((btr0) << 0)
|
||||
|
||||
#define BTR1_SAMP (1 << 7)
|
||||
#define BTR1_TSEG_22_20(btr1) ((btr1) << 4)
|
||||
#define BTR1_TSEG_13_10(btr1) ((btr1) << 0)
|
||||
|
||||
#define RFLG_WUPIF (1 << 7)
|
||||
#define RFLG_CSCIF (1 << 6)
|
||||
#define RFLG_RSTAT (3 << 4)
|
||||
#define RFLG_TSTAT (3 << 2)
|
||||
#define RFLG_OVRIF (1 << 1)
|
||||
#define RFLG_RXF (1 << 0)
|
||||
#define RFLG_GET_RX_STATE(rflg) (((rflg) >> 4) & 0x03)
|
||||
#define RFLG_GET_TX_STATE(rflg) (((rflg) >> 2) & 0x03)
|
||||
|
||||
#define MSCAN_STATE_OK 0
|
||||
#define MSCAN_STATE_ERR 1
|
||||
#define MSCAN_STATE_WRN 2
|
||||
#define MSCAN_STATE_BUSOFF 3
|
||||
|
||||
#define RIER_WUPIE (1 << 7)
|
||||
#define RIER_CSCIE (1 << 6)
|
||||
#define RIER_RSTAT(rier) ((rier) << 4)
|
||||
#define RIER_TSTAT(rier) ((rier) << 2)
|
||||
#define RIER_OVRIE (1 << 1)
|
||||
#define RIER_RXFIE (1 << 0)
|
||||
|
||||
#define TFLG_TXE2 (1 << 2)
|
||||
#define TFLG_TXE1 (1 << 1)
|
||||
#define TFLG_TXE0 (1 << 0)
|
||||
|
||||
#define TIER_TXEI2 (1 << 2)
|
||||
#define TIER_TXEI1 (1 << 1)
|
||||
#define TIER_TXEI0 (1 << 0)
|
||||
|
||||
#define TARQ_ABTRQ2 (1 << 2)
|
||||
#define TARQ_ABTRQ1 (1 << 1)
|
||||
#define TARQ_ABTRQ0 (1 << 0)
|
||||
|
||||
#define TAAK_ABTRQ2 (1 << 2)
|
||||
#define TAAK_ABTRQ1 (1 << 1)
|
||||
#define TAAK_ABTRQ0 (1 << 0)
|
||||
|
||||
#define BSEL_TX2 (1 << 2)
|
||||
#define BSEL_TX1 (1 << 1)
|
||||
#define BSEL_TX0 (1 << 0)
|
||||
|
||||
#define IDAC_IDAM1 (1 << 5)
|
||||
#define IDAC_IDAM0 (1 << 4)
|
||||
#define IDAC_IDHIT(idac) ((idac) & 0x7)
|
||||
|
||||
#define TX_MBUF_SEL(buf_no) (1 << (buf_no))
|
||||
#define TX_DATA_LEN(len) ((len) & 0x0F)
|
||||
|
||||
#define TX_MBUF_EMPTY(val) (1 << (val))
|
||||
|
||||
#define TXIDR1_IDE (1 << 3)
|
||||
#define TXIDR1_SRR (1 << 4)
|
||||
|
||||
#define TXIDR3_RTR (1 << 0)
|
||||
#define TXIDR1_RTR (1 << 4)
|
||||
|
||||
#define RXIDR1_IDE (1 << 3)
|
||||
#define RXIDR1_SRR (1 << 4)
|
||||
|
||||
#define RXIDR3_RTR (1 << 0)
|
||||
#define RXIDR1_RTR (1 << 4)
|
||||
|
||||
#define SET_IDR0(u16) ((uint8_t)((u16) >> 3))
|
||||
#define SET_IDR1(u16) ((uint8_t)(((u16) & 0x0007) << 5))
|
||||
|
||||
#define SET_IDR2(u16) SET_IDR0(u16)
|
||||
#define SET_IDR3(u16) SET_IDR1(u16)
|
||||
|
||||
#define SET_IDR4(u16) SET_IDR0(u16)
|
||||
#define SET_IDR5(u16) SET_IDR1(u16)
|
||||
|
||||
#define SET_IDR6(u16) SET_IDR0(u16)
|
||||
#define SET_IDR7(u16) SET_IDR1(u16)
|
||||
|
||||
#define GET_IDR0(u16) ((uint16_t) ((u16) << 3))
|
||||
#define GET_IDR1(u16) ((uint16_t)(((u16) >> 5)&0x0007))
|
||||
|
||||
#define GET_IDR2(u16) GET_IDR0(u16)
|
||||
#define GET_IDR3(u16) GET_IDR1(u16)
|
||||
|
||||
#define GET_IDR4(u16) GET_IDR0(u16)
|
||||
#define GET_IDR5(u16) GET_IDR1(u16)
|
||||
|
||||
#define GET_IDR6(u16) GET_IDR0(u16)
|
||||
#define GET_IDR7(u16) GET_IDR1(u16)
|
||||
|
||||
#define SET_IDMR0(u16) ((uint8_t)((u16) >> 3))
|
||||
#define SET_IDMR1(u16) ((uint8_t)((((u16) & 0x0007) << 5))|0x001F)
|
||||
|
||||
#define SET_IDMR2(u16) SET_IDMR0(u16)
|
||||
#define SET_IDMR3(u16) SET_IDMR1(u16)
|
||||
|
||||
#define SET_IDMR4(u16) SET_IDMR0(u16)
|
||||
#define SET_IDMR5(u16) SET_IDMR1(u16)
|
||||
|
||||
#define SET_IDMR6(u16) SET_IDMR0(u16)
|
||||
#define SET_IDMR7(u16) SET_IDMR1(u16)
|
||||
|
||||
#define GET_IDMR0(u16) ((uint16_t) ((u16) << 3))
|
||||
#define GET_IDMR1(u16) ((uint16_t)(((u16) >> 5)&0x0007))
|
||||
|
||||
#define GET_IDMR2(u16) GET_IDMR0(u16)
|
||||
#define GET_IDMR3(u16) GET_IDMR1(u16)
|
||||
|
||||
#define GET_IDMR4(u16) GET_IDMR0(u16)
|
||||
#define GET_IDMR5(u16) GET_IDMR1(u16)
|
||||
|
||||
#define GET_IDMR6(u16) GET_IDMR0(u16)
|
||||
#define GET_IDMR7(u16) GET_IDMR1(u16)
|
||||
|
||||
#define NO_OF_MSCAN_RX_BUFF 20
|
||||
#define MSCAN_MESSAGE_SIZE(size) (((size)%CPU_ALIGNMENT) ? (((size) + CPU_ALIGNMENT)-((size) + CPU_ALIGNMENT)%CPU_ALIGNMENT) : (size))
|
||||
|
||||
#define TX_BUFFER_0 0
|
||||
#define TX_BUFFER_1 1
|
||||
#define TX_BUFFER_2 2
|
||||
|
||||
#define RX_BUFFER_0 0
|
||||
#define RX_BUFFER_1 1
|
||||
#define RX_BUFFER_2 2
|
||||
#define RX_BUFFER_3 3
|
||||
|
||||
#define NO_OF_MSCAN_TX_BUFF 20
|
||||
#define RING_BUFFER_EMPTY(rbuff) ((((rbuff)->head) == ((rbuff)->tail)) ? TRUE : FALSE)
|
||||
#define RING_BUFFER_FULL(rbuff) ((((rbuff)->head) == ((rbuff)->tail)) ? TRUE : FALSE)
|
||||
|
||||
|
||||
typedef struct _mscan_handle
|
||||
{
|
||||
uint8_t mscan_channel;
|
||||
void (*toucan_callback)(int16_t);
|
||||
} mscan_handle;
|
||||
|
||||
struct can_message
|
||||
{
|
||||
/* uint16_t mess_len; */
|
||||
@@ -253,33 +57,8 @@ struct can_message
|
||||
uint16_t mess_time_stamp;
|
||||
uint8_t mess_data[MSCAN_MAX_DATA_BYTES];
|
||||
uint8_t mess_len;
|
||||
uint32_t toucan_tx_id;
|
||||
};
|
||||
|
||||
struct ring_buf
|
||||
{
|
||||
struct can_message * volatile buf_ptr;
|
||||
struct can_message * volatile head_ptr;
|
||||
struct can_message * volatile tail_ptr;
|
||||
};
|
||||
|
||||
struct mpc5200_rx_cntrl
|
||||
{
|
||||
struct can_message can_rx_message[MSCAN_RX_BUFF_NUM];
|
||||
};
|
||||
|
||||
struct mscan_channel_info
|
||||
{
|
||||
volatile struct mpc5200_mscan *regs;
|
||||
uint32_t int_rx_err;
|
||||
rtems_id rx_qid;
|
||||
uint32_t rx_qname;
|
||||
rtems_id tx_rb_sid;
|
||||
uint32_t tx_rb_sname;
|
||||
uint8_t id_extended;
|
||||
uint8_t mode;
|
||||
uint8_t tx_buf_no;
|
||||
struct ring_buf tx_ring_buf;
|
||||
uint8_t mess_rtr;
|
||||
uint32_t toucan_tx_idx;
|
||||
};
|
||||
|
||||
struct mscan_rx_parms
|
||||
@@ -292,7 +71,7 @@ struct mscan_rx_parms
|
||||
struct mscan_tx_parms
|
||||
{
|
||||
struct can_message *tx_mess;
|
||||
uint32_t tx_id;
|
||||
uint32_t tx_idx;
|
||||
};
|
||||
|
||||
struct mscan_ctrl_parms
|
||||
@@ -306,10 +85,6 @@ struct mscan_ctrl_parms
|
||||
};
|
||||
|
||||
|
||||
extern void CanInterrupt_A(int16_t);
|
||||
extern void CanInterrupt_B(int16_t);
|
||||
|
||||
|
||||
rtems_device_driver mscan_initialize( rtems_device_major_number,
|
||||
rtems_device_minor_number,
|
||||
void *
|
||||
@@ -345,23 +120,6 @@ rtems_device_driver mscan_control( rtems_device_major_number,
|
||||
{ mscan_initialize, mscan_open, mscan_close, \
|
||||
mscan_read, mscan_write, mscan_control }
|
||||
|
||||
/*MSCAN driver internal functions */
|
||||
void mscan_hardware_initialize(rtems_device_major_number, uint32_t, void *);
|
||||
void mpc5200_mscan_int_enable(volatile struct mpc5200_mscan *);
|
||||
void mpc5200_mscan_int_disable(volatile struct mpc5200_mscan *);
|
||||
void mpc5200_mscan_enter_sleep_mode(volatile struct mpc5200_mscan *);
|
||||
void mpc5200_mscan_exit_sleep_mode(volatile struct mpc5200_mscan *);
|
||||
void mpc5200_mscan_enter_init_mode(volatile struct mpc5200_mscan *);
|
||||
void mpc5200_mscan_exit_init_mode(volatile struct mpc5200_mscan *);
|
||||
void mpc5200_mscan_wait_sync(volatile struct mpc5200_mscan *);
|
||||
void mpc5200_mscan_perform_init_mode_settings(volatile struct mpc5200_mscan *);
|
||||
void mpc5200_mscan_perform_normal_mode_settings(volatile struct mpc5200_mscan *);
|
||||
rtems_status_code mpc5200_mscan_set_mode(rtems_device_minor_number, uint8_t);
|
||||
rtems_status_code mscan_channel_initialize(rtems_device_major_number, rtems_device_minor_number);
|
||||
uint8_t prescaler_calculation(uint32_t, uint32_t, uint8_t *);
|
||||
void mpc5200_mscan_perform_bit_time_settings(volatile struct mpc5200_mscan *, uint32_t, uint32_t);
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
@@ -528,15 +528,16 @@ ata_request_done(ata_req_t *areq, rtems_device_minor_number ctrl_minor,
|
||||
DISABLE_PREEMPTION(key);
|
||||
ATA_EXEC_CALLBACK(areq, status, error);
|
||||
Chain_Extract(&areq->link);
|
||||
free(areq);
|
||||
|
||||
if (!Chain_Is_empty(&ata_ide_ctrls[ctrl_minor].reqs))
|
||||
{
|
||||
ENABLE_PREEMPTION(key);
|
||||
free(areq);
|
||||
ata_process_request(ctrl_minor);
|
||||
return;
|
||||
}
|
||||
ENABLE_PREEMPTION(key);
|
||||
free(areq);
|
||||
}
|
||||
|
||||
/* ata_non_data_request_done --
|
||||
|
||||
Reference in New Issue
Block a user