forked from Imagelibrary/rtems
LEON: updated shared drivers to Driver Manger framework
Some bugfixes at the same time. After this patch the drivers may be used on RASTA systems having a big-endian PCI layout. Removed not up to date changelogs, rely on git log instead.
This commit is contained in:
Daniel Hellstrom
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -1,7 +1,7 @@
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/*
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* Driver for GRLIB port of OpenCores I2C-master
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*
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* COPYRIGHT (c) 2007 Gaisler Research
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* COPYRIGHT (c) 2007 Cobham Gaisler AB
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* based on the RTEMS MPC83xx I2C driver (c) 2007 Embedded Brains GmbH.
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*
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* The license and distribution terms for this file may be
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@@ -9,27 +9,41 @@
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* http://www.rtems.org/license/LICENSE.
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*
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* This file contains the driver and initialization code
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*
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* 2007-09-27: First version of driver (jan@gaisler.com)
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*/
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#include <bsp.h>
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#include <i2cmst.h>
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#include <stdlib.h>
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#include <stdio.h>
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#include <ambapp.h>
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#include <grlib.h>
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#include <rtems/libi2c.h>
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#include <drvmgr/drvmgr.h>
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#include <drvmgr/ambapp_bus.h>
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#include <i2cmst.h>
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/* Enable debug printks? */
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/* #define DEBUG */
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/*#define DEBUG*/
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/* Default to 40 MHz system clock? */
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/*
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#ifndef SYS_FREQ_kHZ
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#define SYS_FREQ_kHZ 40000
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#endif
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*/
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#ifdef DEBUG
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#define DBG(args...) printk(args)
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#else
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#define DBG(args...)
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#endif
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/* The OC I2C core will perform a write after a start unless the RD bit
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in the command register has been set. Since the rtems framework has
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a send_start function we buffer that command and use it when the first
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data is written. The START is buffered in the sendstart member below */
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typedef struct gr_i2cmst_prv {
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rtems_libi2c_bus_t i2clib_desc;
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struct drvmgr_dev *dev;
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gr_i2cmst_regs_t *reg_ptr;
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unsigned int sysfreq; /* System clock frequency in kHz */
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int minor;
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unsigned char sendstart; /* START events are buffered here */
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/* rtems_irq_number irq_number; */
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/* rtems_id irq_sema_id; */
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} gr_i2cmst_prv_t;
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/* Calculates the scaler value for 100 kHz operation */
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static int gr_i2cmst_calc_scaler(int sysfreq)
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@@ -42,12 +56,12 @@ static int gr_i2cmst_wait(gr_i2cmst_prv_t *prv_ptr, uint8_t expected_sts)
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{
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uint32_t tout = 0;
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int current_sts;
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#if defined(DEBUG)
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printk("(gr_i2cmst_wait called...");
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#endif
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DBG("(gr_i2cmst_wait called...");
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do {
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if (tout++ > 1000000) {
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DBG("gr_i2cmst_wait: TIMEOUT\n");
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return RTEMS_TIMEOUT;
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}
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} while (prv_ptr->reg_ptr->cmdsts & GRI2C_STS_TIP);
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@@ -57,32 +71,31 @@ static int gr_i2cmst_wait(gr_i2cmst_prv_t *prv_ptr, uint8_t expected_sts)
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if (current_sts != expected_sts) {
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#if defined(DEBUG)
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if (prv_ptr->reg_ptr->cmdsts & GRI2C_STS_RXACK) {
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printk("Transfer NAKed..");
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DBG("Transfer NAKed..");
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}
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if (prv_ptr->reg_ptr->cmdsts & GRI2C_STS_AL) {
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printk("arbitration lost..");
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DBG("arbitration lost..");
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}
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if (prv_ptr->reg_ptr->cmdsts & GRI2C_STS_TIP) {
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printk("transfer still in progress, huh?..");
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DBG("transfer still in progress, huh?..");
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}
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printk("exited with IO error..)");
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DBG("exited with IO error..)");
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#endif
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DBG("gr_i2cmst_wait: IO-ERROR\n");
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return RTEMS_IO_ERROR;
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}
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#if defined(DEBUG)
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printk("exited...)");
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#endif
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DBG("exited...)");
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return RTEMS_SUCCESSFUL;
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}
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/* Initialize hardware core */
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static rtems_status_code gr_i2cmst_init(rtems_libi2c_bus_t *bushdl)
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{
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gr_i2cmst_prv_t *prv_ptr = &(((gr_i2cmst_desc_t *)(bushdl))->prv);
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#if defined(DEBUG)
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printk("gr_i2cmst_init called...");
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#endif
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gr_i2cmst_prv_t *prv_ptr = (gr_i2cmst_prv_t *)bushdl;
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DBG("gr_i2cmst_init called...");
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/* Disable core before changing prescale register */
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prv_ptr->reg_ptr->ctrl = 0;
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@@ -96,54 +109,48 @@ static rtems_status_code gr_i2cmst_init(rtems_libi2c_bus_t *bushdl)
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/* Clear possible START condition */
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prv_ptr->sendstart = 0;
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#if defined(DEBUG)
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printk("exited\n");
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#endif
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DBG("exited\n");
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return RTEMS_SUCCESSFUL;
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}
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static rtems_status_code gr_i2cmst_send_start(rtems_libi2c_bus_t *bushdl)
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{
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gr_i2cmst_prv_t *prv_ptr = &(((gr_i2cmst_desc_t *)(bushdl))->prv);
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#if defined(DEBUG)
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printk("gr_i2cmst_send_start called...");
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#endif
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gr_i2cmst_prv_t *prv_ptr = (gr_i2cmst_prv_t *)bushdl;
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DBG("gr_i2cmst_send_start called...");
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/* The OC I2C core does not work with stand alone START events,
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instead the event is buffered */
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prv_ptr->sendstart = GRI2C_CMD_STA;
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#if defined(DEBUG)
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printk("exited\n");
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#endif
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DBG("exited\n");
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return RTEMS_SUCCESSFUL;
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}
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static rtems_status_code gr_i2cmst_send_stop(rtems_libi2c_bus_t *bushdl)
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{
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gr_i2cmst_prv_t *prv_ptr = &(((gr_i2cmst_desc_t *)(bushdl))->prv);
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#if defined(DEBUG)
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printk("gr_i2cmst_send_stop called...");
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#endif
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gr_i2cmst_prv_t *prv_ptr = (gr_i2cmst_prv_t *)bushdl;
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DBG("gr_i2cmst_send_stop called...");
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prv_ptr->reg_ptr->cmdsts = GRI2C_CMD_STO;
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#if defined(DEBUG)
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printk("exited\n");
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#endif
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DBG("exited\n");
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return RTEMS_SUCCESSFUL;
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}
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static rtems_status_code gr_i2cmst_send_addr(rtems_libi2c_bus_t *bushdl,
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uint32_t addr, int rw)
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{
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gr_i2cmst_prv_t *prv_ptr = &(((gr_i2cmst_desc_t *)(bushdl))->prv);
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gr_i2cmst_prv_t *prv_ptr = (gr_i2cmst_prv_t *)bushdl;
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uint8_t addr_byte;
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rtems_status_code rc;
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#if defined(DEBUG)
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printk("gr_i2cmst_send_addr called, addr = 0x%x, rw = %d...",
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DBG("gr_i2cmst_send_addr called, addr = 0x%x, rw = %d...",
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addr, rw);
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#endif
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/* Check if long address is needed */
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if (addr > 0x7f) {
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@@ -156,9 +163,9 @@ static rtems_status_code gr_i2cmst_send_addr(rtems_libi2c_bus_t *bushdl,
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/* Wait for transfer to complete */
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rc = gr_i2cmst_wait(prv_ptr, GRI2C_STATUS_IDLE);
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if (rc != RTEMS_SUCCESSFUL) {
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#if defined(DEBUG)
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printk("exited with error\n");
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#endif
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DBG("exited with error\n");
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return -rc;
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}
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}
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@@ -176,16 +183,12 @@ static rtems_status_code gr_i2cmst_send_addr(rtems_libi2c_bus_t *bushdl,
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/* Wait for transfer to complete */
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rc = gr_i2cmst_wait(prv_ptr, GRI2C_STATUS_IDLE);
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if (rc != RTEMS_SUCCESSFUL) {
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#if defined(DEBUG)
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printk("exited with error\n");
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#endif
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DBG("exited with error\n");
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return -rc;
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}
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}
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}
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#if defined(DEBUG)
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printk("exited\n");
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#endif
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DBG("exited\n");
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return rc;
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}
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@@ -193,13 +196,12 @@ static rtems_status_code gr_i2cmst_send_addr(rtems_libi2c_bus_t *bushdl,
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static int gr_i2cmst_read_bytes(rtems_libi2c_bus_t *bushdl,
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unsigned char *bytes, int nbytes)
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{
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gr_i2cmst_prv_t *prv_ptr = &(((gr_i2cmst_desc_t *)(bushdl))->prv);
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gr_i2cmst_prv_t *prv_ptr = (gr_i2cmst_prv_t *)bushdl;
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unsigned char *buf = bytes;
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rtems_status_code rc;
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unsigned char expected_sts = GRI2C_STATUS_IDLE;
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#if defined(DEBUG)
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printk("gr_i2cmst_read_bytes called, nbytes = %d...", nbytes);
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#endif
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DBG("gr_i2cmst_read_bytes called, nbytes = %d...", nbytes);
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while (nbytes-- > 0) {
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if (nbytes == 0) {
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@@ -214,34 +216,30 @@ static int gr_i2cmst_read_bytes(rtems_libi2c_bus_t *bushdl,
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/* Wait until end of transfer */
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rc = gr_i2cmst_wait(prv_ptr, expected_sts);
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if (rc != RTEMS_SUCCESSFUL) {
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DBG("exited with error\n");
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return -rc;
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#if defined(DEBUG)
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printk("exited with error\n");
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#endif
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}
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*buf++ = prv_ptr->reg_ptr->tdrd;
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}
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#if defined(DEBUG)
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printk("exited\n");
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#endif
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DBG("exited\n");
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return buf - bytes;
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}
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static int gr_i2cmst_write_bytes(rtems_libi2c_bus_t *bushdl,
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unsigned char *bytes, int nbytes)
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{
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gr_i2cmst_prv_t *prv_ptr = &(((gr_i2cmst_desc_t *)(bushdl))->prv);
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gr_i2cmst_prv_t *prv_ptr = (gr_i2cmst_prv_t *)bushdl;
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unsigned char *buf = bytes;
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rtems_status_code rc;
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#if defined(DEBUG)
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printk("gr_i2cmst_write_bytes called, nbytes = %d...", nbytes);
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#endif
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DBG("gr_i2cmst_write_bytes called, nbytes = %d...", nbytes);
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while (nbytes-- > 0) {
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#if defined(DEBUG)
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printk("writing byte 0x%02X...", *buf);
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#endif
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DBG("writing byte 0x%02X...", *buf);
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prv_ptr->reg_ptr->tdrd = *buf++;
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prv_ptr->reg_ptr->cmdsts = GRI2C_CMD_WR | prv_ptr->sendstart;
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prv_ptr->sendstart = 0;
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@@ -250,16 +248,13 @@ static int gr_i2cmst_write_bytes(rtems_libi2c_bus_t *bushdl,
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rc = gr_i2cmst_wait(prv_ptr, GRI2C_STATUS_IDLE);
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if (rc != RTEMS_SUCCESSFUL) {
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#if defined(DEBUG)
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printk("exited with error\n");
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#endif
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DBG("exited with error\n");
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return -rc;
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}
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}
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#if defined(DEBUG)
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printk("exited\n");
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#endif
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DBG("exited\n");
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return buf - bytes;
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}
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@@ -272,88 +267,148 @@ static rtems_libi2c_bus_ops_t gr_i2cmst_ops = {
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write_bytes: gr_i2cmst_write_bytes,
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};
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/* Get Hardware and disable it */
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int i2cmst_device_init(gr_i2cmst_prv_t *priv)
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{
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struct amba_dev_info *ambadev;
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struct ambapp_core *pnpinfo;
|
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|
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static gr_i2cmst_desc_t gr_i2cmst_desc = {
|
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{ /* rtems_libi2c_bus_t */
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ops : &gr_i2cmst_ops,
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size : sizeof(gr_i2cmst_ops),
|
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},
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{ /* gr_i2cmst_prv_t, private data */
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reg_ptr : NULL,
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sysfreq : 40000,
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}
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/* Get device information from AMBA PnP information */
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ambadev = (struct amba_dev_info *)priv->dev->businfo;
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if ( ambadev == NULL ) {
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return -1;
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}
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pnpinfo = &ambadev->info;
|
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priv->reg_ptr = (gr_i2cmst_regs_t *)pnpinfo->apb_slv->start;
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/* Disable core */
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priv->reg_ptr->ctrl = 0;
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priv->i2clib_desc.ops = &gr_i2cmst_ops;
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priv->i2clib_desc.size = sizeof(gr_i2cmst_ops);
|
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return 0;
|
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}
|
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|
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|
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/******************* Driver Manager Part ***********************/
|
||||
|
||||
int i2cmst_init2(struct drvmgr_dev *dev);
|
||||
int i2cmst_init3(struct drvmgr_dev *dev);
|
||||
|
||||
struct drvmgr_drv_ops i2cmst_ops =
|
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{
|
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.init = {NULL, i2cmst_init2, i2cmst_init3, NULL},
|
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.remove = NULL,
|
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.info = NULL
|
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};
|
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|
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/* Scans for I2CMST core and initalizes i2c library */
|
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rtems_status_code leon_register_i2c(struct ambapp_bus *abus)
|
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struct amba_dev_id i2cmst_ids[] =
|
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{
|
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#if defined(DEBUG)
|
||||
printk("leon_register_i2c called...");
|
||||
#endif
|
||||
{VENDOR_GAISLER, GAISLER_I2CMST},
|
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{0, 0} /* Mark end of table */
|
||||
};
|
||||
|
||||
int rc;
|
||||
int device_found = 0;
|
||||
struct ambapp_apb_info apbi2cmst;
|
||||
|
||||
/* Scan AMBA bus for I2CMST core */
|
||||
device_found = ambapp_find_apbslv(abus, VENDOR_GAISLER, GAISLER_I2CMST,
|
||||
&apbi2cmst);
|
||||
|
||||
if (device_found == 1) {
|
||||
|
||||
/* Initialize i2c library */
|
||||
rc = rtems_libi2c_initialize();
|
||||
if (rc < 0) {
|
||||
#if defined(DEBUG)
|
||||
printk("rtems_libi2x_initialize failed, exiting...\n");
|
||||
#endif
|
||||
return rc;
|
||||
}
|
||||
|
||||
gr_i2cmst_desc.prv.reg_ptr = (gr_i2cmst_regs_t *)apbi2cmst.start;
|
||||
|
||||
/* Detect system frequency, same as in apbuart_initialize */
|
||||
#ifndef SYS_FREQ_kHZ
|
||||
#if defined(LEON3)
|
||||
/* LEON3: find timer address via AMBA Plug&Play info */
|
||||
struct amba_drv_info i2cmst_drv_info =
|
||||
{
|
||||
{
|
||||
struct ambapp_apb_info gptimer;
|
||||
struct gptimer_regs *tregs;
|
||||
DRVMGR_OBJ_DRV, /* Driver */
|
||||
NULL, /* Next driver */
|
||||
NULL, /* Device list */
|
||||
DRIVER_AMBAPP_GAISLER_I2CMST_ID, /* Driver ID */
|
||||
"I2CMST_DRV", /* Driver Name */
|
||||
DRVMGR_BUS_TYPE_AMBAPP, /* Bus Type */
|
||||
&i2cmst_ops,
|
||||
NULL, /* Funcs */
|
||||
0, /* No devices yet */
|
||||
0,
|
||||
},
|
||||
&i2cmst_ids[0]
|
||||
};
|
||||
|
||||
if (ambapp_find_apbslv(abus, VENDOR_GAISLER,
|
||||
GAISLER_GPTIMER, &gptimer) == 1 ) {
|
||||
tregs = (struct gptimer_regs *)gptimer.start;
|
||||
gr_i2cmst_desc.prv.sysfreq = (tregs->scaler_reload+1)*1000;
|
||||
} else {
|
||||
gr_i2cmst_desc.prv.sysfreq = 40000; /* Default to 40MHz */
|
||||
}
|
||||
}
|
||||
#elif defined(LEON2)
|
||||
/* LEON2: use hardcoded address to get to timer */
|
||||
{
|
||||
LEON_Register_Map *regs = (LEON_Register_Map *)0x80000000;
|
||||
gr_i2cmst_desc.prv.sysfreq = (regs->Scaler_Reload+1)*1000;
|
||||
}
|
||||
#else
|
||||
#error CPU not supported for I2CMST driver */
|
||||
#endif
|
||||
#else
|
||||
/* Use hardcoded frequency */
|
||||
gr_i2cmst_desc.prv.sysfreq = SYS_FREQ_kHZ;
|
||||
#endif
|
||||
|
||||
rc = rtems_libi2c_register_bus("/dev/i2c1", &gr_i2cmst_desc.bus_desc);
|
||||
if (rc < 0) {
|
||||
#if defined(DEBUG)
|
||||
printk("rtems_libi2c_register_bus failed, exiting..\n");
|
||||
#endif
|
||||
return -rc;
|
||||
}
|
||||
}
|
||||
|
||||
#if defined(DEBUG)
|
||||
printk("exited\n");
|
||||
#endif
|
||||
return 0;
|
||||
void i2cmst_register_drv (void)
|
||||
{
|
||||
DBG("Registering I2CMST driver\n");
|
||||
drvmgr_drv_register(&i2cmst_drv_info.general);
|
||||
}
|
||||
|
||||
/* The I2CMST Driver is informed about a new hardware device */
|
||||
int i2cmst_init2(struct drvmgr_dev *dev)
|
||||
{
|
||||
gr_i2cmst_prv_t *priv;
|
||||
|
||||
DBG("I2CMST[%d] on bus %s\n", dev->minor_drv, dev->parent->dev->name);
|
||||
|
||||
priv = dev->priv = malloc(sizeof(gr_i2cmst_prv_t));
|
||||
if ( !priv )
|
||||
return DRVMGR_NOMEM;
|
||||
memset(priv, 0, sizeof(*priv));
|
||||
priv->dev = dev;
|
||||
|
||||
/* This core will not find other cores, so we wait for init2() */
|
||||
|
||||
return DRVMGR_OK;
|
||||
}
|
||||
|
||||
/* Init stage 2 */
|
||||
int i2cmst_init3(struct drvmgr_dev *dev)
|
||||
{
|
||||
gr_i2cmst_prv_t *priv;
|
||||
char prefix[32];
|
||||
char devName[32];
|
||||
int rc;
|
||||
|
||||
priv = (gr_i2cmst_prv_t *)dev->priv;
|
||||
|
||||
/* Do initialization */
|
||||
|
||||
/* Initialize i2c library */
|
||||
rc = rtems_libi2c_initialize();
|
||||
if (rc != 0) {
|
||||
DBG("I2CMST: rtems_libi2c_initialize failed, exiting...\n");
|
||||
free(dev->priv);
|
||||
dev->priv = NULL;
|
||||
return DRVMGR_FAIL;
|
||||
}
|
||||
|
||||
/* I/O system registered and initialized
|
||||
* Now we take care of device initialization.
|
||||
*/
|
||||
|
||||
/* Get frequency */
|
||||
if ( drvmgr_freq_get(dev, DEV_APB_SLV, &priv->sysfreq) ) {
|
||||
return DRVMGR_FAIL;
|
||||
}
|
||||
priv->sysfreq = priv->sysfreq / 1000; /* Convert to kHz */
|
||||
|
||||
if ( i2cmst_device_init(priv) ) {
|
||||
free(dev->priv);
|
||||
dev->priv = NULL;
|
||||
return DRVMGR_FAIL;
|
||||
}
|
||||
|
||||
/* Get Filesystem name prefix */
|
||||
prefix[0] = '\0';
|
||||
if ( drvmgr_get_dev_prefix(dev, prefix) ) {
|
||||
/* Failed to get prefix, make sure of a unique FS name
|
||||
* by using the driver minor.
|
||||
*/
|
||||
sprintf(devName, "/dev/i2c%d", dev->minor_drv+1);
|
||||
} else {
|
||||
/* Got special prefix, this means we have a bus prefix
|
||||
* And we should use our "bus minor"
|
||||
*/
|
||||
sprintf(devName, "/dev/%si2c%d", prefix, dev->minor_bus+1);
|
||||
}
|
||||
|
||||
/* Register Bus for this Device */
|
||||
rc = rtems_libi2c_register_bus(devName, &priv->i2clib_desc);
|
||||
if (rc < 0) {
|
||||
DBG("I2CMST: rtems_libi2c_register_bus(%s) failed, exiting..\n", devName);
|
||||
free(dev->priv);
|
||||
dev->priv = NULL;
|
||||
return DRVMGR_FAIL;
|
||||
}
|
||||
priv->minor = rc;
|
||||
|
||||
return DRVMGR_OK;
|
||||
}
|
||||
|
||||
@@ -3,24 +3,21 @@
|
||||
* @ingroup sparc_bsp
|
||||
* @defgroup 1553 B1553BRM
|
||||
* @ingroup 1553
|
||||
* @brief Macros used for brm controller
|
||||
* @brief B1553BRM device driver
|
||||
*/
|
||||
|
||||
/*
|
||||
* COPYRIGHT (c) 2006.
|
||||
* Gaisler Research
|
||||
* Cobham Gaisler AB.
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rtems.org/license/LICENSE.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef __B1553BRM_H__
|
||||
#define __B1553BRM_H__
|
||||
|
||||
#include <ambapp.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
@@ -102,6 +99,7 @@ struct bc_msg {
|
||||
#define BC_RTRT 0x0002
|
||||
#define BC_BUSA 0x0004
|
||||
#define BC_EOL 0x0020
|
||||
#define BC_SKIP 0x0040
|
||||
#define BC_BAME 0x8000
|
||||
|
||||
#define BRM_MBC_IRQ 1 /* Monitor Block Counter irq */
|
||||
@@ -114,7 +112,7 @@ struct bc_msg {
|
||||
#define BRM_IXEQ0_IRQ 256 /* Index Equal Zero irq */
|
||||
#define BRM_BDRCV_IRQ 512 /* Broadcast Command Received irq */
|
||||
#define BRM_SUBAD_IRQ 1024 /* Subaddress Accessed irq */
|
||||
#define BRM_MERR_IRQ 4096 /* Message Error irq */
|
||||
#define BRM_MERR_IRQ 2048 /* Message Error irq */
|
||||
#define BRM_TAPF_IRQ 8192 /* Terminal Address Parity Fail irq */
|
||||
#define BRM_WRAPF_IRQ 16384 /* Wrap Fail irq */
|
||||
#define BRM_DMAF_IRQ 32768 /* DMA Fail irq */
|
||||
@@ -144,13 +142,6 @@ struct bc_msg {
|
||||
#define BRM_MODE_BM 0x2
|
||||
#define BRM_MODE_BM_RT 0x3 /* both RT and BM */
|
||||
|
||||
|
||||
/* Register RAMON FPGA BRM driver, calls brm_register */
|
||||
int brm_register_leon3_ramon_fpga(void);
|
||||
|
||||
/* Register RAMON ASIC BRM driver, calls brm_register */
|
||||
int brm_register_leon3_ramon_asic(void);
|
||||
|
||||
#define BRM_FREQ_12MHZ 0
|
||||
#define BRM_FREQ_16MHZ 1
|
||||
#define BRM_FREQ_20MHZ 2
|
||||
@@ -161,15 +152,11 @@ int brm_register_leon3_ramon_asic(void);
|
||||
|
||||
#define CLKSEL_MASK 0x7
|
||||
|
||||
/* Register BRM driver
|
||||
* See (struct brm_reg).w_ctrl for clksel and clkdiv.
|
||||
* See Enhanced register (the least signinficant 2 bits) in BRM Core for brm_freq
|
||||
* bus = &ambapp_plb for LEON3. (LEON2 not yet supported for this driver)
|
||||
*/
|
||||
int b1553brm_register(struct ambapp_bus *bus, unsigned int clksel, unsigned int clkdiv, unsigned int brm_freq);
|
||||
void b1553brm_register_drv(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __BRM_H__ */
|
||||
|
||||
|
||||
@@ -8,19 +8,16 @@
|
||||
|
||||
/*
|
||||
* COPYRIGHT (c) 2007.
|
||||
* Gaisler Research
|
||||
* Cobham Gaisler AB.
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rtems.org/license/LICENSE.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef __GRCAN_H__
|
||||
#define __GRCAN_H__
|
||||
|
||||
#include <ambapp.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
@@ -187,21 +184,8 @@ typedef struct {
|
||||
#define GRCAN_IOC_SET_SFILTER 40 /* Set Sync Messages RX/TX filters, NULL disables the IRQ completely */
|
||||
#define GRCAN_IOC_GET_STATUS 41 /* Get status register of GRCAN core */
|
||||
|
||||
struct grcan_device_info {
|
||||
unsigned int base_address;
|
||||
int irq;
|
||||
};
|
||||
|
||||
/* Use hard coded addresses and IRQs to find hardware */
|
||||
int grcan_rasta_register_abs(struct grcan_device_info *devices, int dev_cnt);
|
||||
|
||||
/* Use prescanned AMBA Plug&Play information to find all GRFIFO cores */
|
||||
int grcan_rasta_register(struct ambapp_bus *abus);
|
||||
int grcan_register(struct ambapp_bus *abus);
|
||||
#if 0
|
||||
void grcan_register(unsigned int baseaddr, unsigned int ram_base);
|
||||
void grcan_interrupt_handler(rtems_vector_number v);
|
||||
#endif
|
||||
void grcan_register_drv(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
|
||||
@@ -3,12 +3,12 @@
|
||||
* @ingroup sparc_bsp
|
||||
* @defgroup spw SpaceWire
|
||||
* @ingroup spw
|
||||
* @brief Macros used for Spacewire bus
|
||||
* @brief GRSPW Device Driver
|
||||
*/
|
||||
|
||||
/*
|
||||
* COPYRIGHT (c) 2007.
|
||||
* Gaisler Research
|
||||
* Cobham Gaisler AB.
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
@@ -32,12 +32,18 @@ typedef struct {
|
||||
unsigned int txhsize;
|
||||
} spw_ioctl_packetsize;
|
||||
|
||||
#define GRSPW_PKTSEND_OPTION_HDR_CRC 0x1
|
||||
#define GRSPW_PKTSEND_OPTION_DATA_CRC 0x2
|
||||
#define GRSPW_PKTSEND_OPTION_NOCRCLEN(len) ((len & 0xf) << 8)
|
||||
#define GRSPW_PKTSEND_OPTION_NOCRCLEN_MASK 0xf00
|
||||
|
||||
typedef struct {
|
||||
unsigned int hlen;
|
||||
char *hdr;
|
||||
unsigned int dlen;
|
||||
char *data;
|
||||
unsigned int sent;
|
||||
unsigned int options;
|
||||
} spw_ioctl_pkt_send;
|
||||
|
||||
typedef struct {
|
||||
@@ -84,6 +90,11 @@ typedef struct {
|
||||
unsigned int is_rmapcrc;
|
||||
|
||||
unsigned int nodemask;
|
||||
unsigned int keep_source; /* copy source address to user-buffer in read() operations
|
||||
* Note that rm_prot_id has no effect when keep_source is
|
||||
* set.
|
||||
*/
|
||||
unsigned int rtimeout; /* Read timeout if != 0 */
|
||||
} spw_config;
|
||||
|
||||
#define SPACEWIRE_IOCTRL_SET_NODEADDR 1
|
||||
@@ -113,30 +124,42 @@ typedef struct {
|
||||
#define SPACEWIRE_IOCTRL_SET_COREFREQ 32
|
||||
#define SPACEWIRE_IOCTRL_SET_CLKDIVSTART 33
|
||||
#define SPACEWIRE_IOCTRL_SET_NODEMASK 34
|
||||
#define SPACEWIRE_IOCTRL_SET_KEEP_SOURCE 35
|
||||
#define SPACEWIRE_IOCTRL_SET_TCODE_CTRL 36
|
||||
#define SPACEWIRE_IOCTRL_SET_TCODE 37
|
||||
#define SPACEWIRE_IOCTRL_GET_TCODE 38
|
||||
#define SPACEWIRE_IOCTRL_SET_READ_TIMEOUT 39
|
||||
|
||||
#define SPACEWIRE_IOCTRL_START 64
|
||||
#define SPACEWIRE_IOCTRL_STOP 65
|
||||
|
||||
int grspw_register(struct ambapp_bus *bus);
|
||||
/* Defines what register bits that will be touched
|
||||
* for SPACEWIRE_IOCTRL_SET_TCODE_CTRL
|
||||
*/
|
||||
#define SPACEWIRE_TCODE_CTRL_IE_MSK 0x001
|
||||
#define SPACEWIRE_TCODE_CTRL_TT_MSK 0x004
|
||||
#define SPACEWIRE_TCODE_CTRL_TR_MSK 0x008
|
||||
|
||||
/* Defines what register bits that should be set
|
||||
* for SPACEWIRE_IOCTRL_SET_TCODE_CTRL
|
||||
*/
|
||||
#define SPACEWIRE_TCODE_CTRL_IE 0x100
|
||||
#define SPACEWIRE_TCODE_CTRL_TT 0x400
|
||||
#define SPACEWIRE_TCODE_CTRL_TR 0x800
|
||||
|
||||
#if 0
|
||||
struct grspw_buf;
|
||||
/* SPACEWIRE_IOCTRL_SET_TCODE argument mask */
|
||||
#define SPACEWIRE_TCODE_TCODE 0x0ff
|
||||
#define SPACEWIRE_TCODE_SET 0x100 /* Set Timecode register */
|
||||
#define SPACEWIRE_TCODE_TX 0x400
|
||||
|
||||
struct grspw_buf {
|
||||
grspw_buf *next; /* next packet in chain */
|
||||
void grspw_register_drv (void);
|
||||
|
||||
/* Always used */
|
||||
unsigned int dlen; /* data length of '*data' */
|
||||
unsigned int max_dlen; /* allocated length of '*data' */
|
||||
void *data; /* pointer to beginning of cargo data */
|
||||
void grspw_print(int options);
|
||||
|
||||
/* Global GRSPW Function pointer called upon timecode receive interrupt */
|
||||
extern void (*grspw_timecode_callback)
|
||||
(void *pDev, void *regs, int minor, unsigned int tc);
|
||||
|
||||
/* Only used when transmitting */
|
||||
unsigned int hlen; /* length of header '*header' */
|
||||
unsigned int max_hlen; /* allocated length of '*header' */
|
||||
void *header; /* pointer to beginning of header data */
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
|
||||
@@ -7,13 +7,12 @@
|
||||
*/
|
||||
|
||||
/*
|
||||
* COPYRIGHT (c) 2007 Gaisler Research
|
||||
* COPYRIGHT (c) 2007 Cobham Gaisler AB
|
||||
* with parts from the RTEMS MPC83xx I2C driver (c) 2007 Embedded Brains GmbH.
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rtems.org/license/LICENSE.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _I2CMST_H
|
||||
@@ -56,26 +55,6 @@ typedef struct gr_i2cmst_regs {
|
||||
|
||||
#define GRI2C_STATUS_IDLE 0x00000000
|
||||
|
||||
/* The OC I2C core will perform a write after a start unless the RD bit
|
||||
in the command register has been set. Since the rtems framework has
|
||||
a send_start function we buffer that command and use it when the first
|
||||
data is written. The START is buffered in the sendstart member below */
|
||||
typedef struct gr_i2cmst_prv {
|
||||
gr_i2cmst_regs_t *reg_ptr;
|
||||
unsigned int sysfreq; /* System clock frequency in kHz */
|
||||
unsigned char sendstart; /* START events are buffered here */
|
||||
/* rtems_irq_number irq_number; */
|
||||
/* rtems_id irq_sema_id; */
|
||||
} gr_i2cmst_prv_t;
|
||||
|
||||
typedef struct gr_i2cmst_desc {
|
||||
rtems_libi2c_bus_t bus_desc;
|
||||
gr_i2cmst_prv_t prv;
|
||||
} gr_i2cmst_desc_t;
|
||||
|
||||
/* Scans for I2CMST core and initalizes i2c library */
|
||||
rtems_status_code leon_register_i2c(struct ambapp_bus *abus);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
@@ -6,20 +6,15 @@
|
||||
|
||||
/*
|
||||
* COPYRIGHT (c) 2007.
|
||||
* Gaisler Research.
|
||||
* Cobham Gaisler AB.
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rtems.org/license/LICENSE.
|
||||
*
|
||||
* Author: Daniel Hellstr<74>m, Gaisler Research AB, www.gaisler.com
|
||||
*/
|
||||
|
||||
|
||||
#ifndef __OCCAN_H__
|
||||
#define __OCCAN_H__
|
||||
|
||||
#include <ambapp.h>
|
||||
#ifndef __OCCAN_DRIVER_H__
|
||||
#define __OCCAN_DRIVER_H__
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
@@ -152,7 +147,7 @@ struct occan_afilter {
|
||||
#define OCCAN_BLK_MODE_RX 0x1
|
||||
#define OCCAN_BLK_MODE_TX 0x2
|
||||
|
||||
int occan_register(struct ambapp_bus *bus);
|
||||
void occan_register_drv (void);
|
||||
|
||||
|
||||
#define OCCAN_SPEED_500K 500000
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
Reference in New Issue
Block a user