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2011-06-07 Sebastian Huber <sebastian.huber@embedded-brains.de>

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* configure.ac, startup/bspstart.c: Use standard cache BSP options.
This commit is contained in:
Sebastian Huber
2011-06-07 13:28:01 +00:00
parent 94f37add4d
commit 353be08b39
6 changed files with 22 additions and 21 deletions
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4
c/src/lib/libbsp/powerpc/mpc8260ads/ChangeLog
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@@ -1,3 +1,7 @@
2011-06-07 Sebastian Huber <sebastian.huber@embedded-brains.de>
* configure.ac, startup/bspstart.c: Use standard cache BSP options.
2011-02-11 Ralf Corsépius <ralf.corsepius@rtems.org>
* include/tm27.h, irq/irq.c:

12
c/src/lib/libbsp/powerpc/mpc8260ads/configure.ac
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@@ -15,15 +15,11 @@ RTEMS_PROG_CC_FOR_TARGET
RTEMS_CANONICALIZE_TOOLS
RTEMS_PROG_CCAS
RTEMS_BSPOPTS_SET([DATA_CACHE_ENABLE],[*],[0])
RTEMS_BSPOPTS_HELP([DATA_CACHE_ENABLE],
[If defined, the data cache will be enabled after address translation
is turned on.])
RTEMS_BSPOPTS_SET_DATA_CACHE_ENABLED([*],[])
RTEMS_BSPOPTS_HELP_DATA_CACHE_ENABLED
RTEMS_BSPOPTS_SET([INSTRUCTION_CACHE_ENABLE],[*],[0])
RTEMS_BSPOPTS_HELP([INSTRUCTION_CACHE_ENABLE],
[If defined, the instruction cache will be enabled after address translation
is turned on.])
RTEMS_BSPOPTS_SET_INSTRUCTION_CACHE_ENABLED([*],[])
RTEMS_BSPOPTS_HELP_INSTRUCTION_CACHE_ENABLED
RTEMS_BSPOPTS_SET([UARTS_USE_TERMIOS],[*],[0])
RTEMS_BSPOPTS_HELP([UARTS_USE_TERMIOS],

4
c/src/lib/libbsp/powerpc/mpc8260ads/startup/bspstart.c
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@@ -197,10 +197,10 @@ void bsp_start(void)
/*
* Enable instruction and data caches. Do not force writethrough mode.
*/
#if INSTRUCTION_CACHE_ENABLE
#if BSP_INSTRUCTION_CACHE_ENABLED
rtems_cache_enable_instruction();
#endif
#if DATA_CACHE_ENABLE
#if BSP_DATA_CACHE_ENABLED
rtems_cache_enable_data();
#endif

4
c/src/lib/libbsp/powerpc/score603e/ChangeLog
View File

@@ -1,3 +1,7 @@
2011-06-07 Sebastian Huber <sebastian.huber@embedded-brains.de>
* configure.ac, startup/bspstart.c: Use standard cache BSP options.
2011-05-17 Till Straumann <strauman@slac.stanford.edu>
PR1797/bsps

15
c/src/lib/libbsp/powerpc/score603e/configure.ac
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@@ -15,6 +15,12 @@ RTEMS_PROG_CC_FOR_TARGET
RTEMS_CANONICALIZE_TOOLS
RTEMS_PROG_CCAS
RTEMS_BSPOPTS_SET_DATA_CACHE_ENABLED([*],[])
RTEMS_BSPOPTS_HELP_DATA_CACHE_ENABLED
RTEMS_BSPOPTS_SET_INSTRUCTION_CACHE_ENABLED([*],[])
RTEMS_BSPOPTS_HELP_INSTRUCTION_CACHE_ENABLED
## FIXME: This should be a 1 out of 3 selection
## and is somehow coupled to USE_DINK (cf. include/gen2.h)
RTEMS_BSPOPTS_SET([SCORE603E_USE_SDS],[*],[0])
@@ -52,15 +58,6 @@ of the special purpose registers to slightly optimize interrupt
response time. The use of these registers can conflict with
other tools like debuggers.])
RTEMS_BSPOPTS_SET([PPC_USE_DATA_CACHE],[*],[0])
RTEMS_BSPOPTS_HELP([PPC_USE_DATA_CACHE],
[If defined, then the PowerPC specific code in RTEMS will use
data cache instructions to optimize the context switch code.
This code can conflict with debuggers or emulators. It is known
to break the Corelis PowerPC emulator with at least some combinations
of PowerPC 603e revisions and emulator versions.
The BSP actually contains the call that enables this.])
RTEMS_BSPOPTS_SET([CONFIGURE_MALLOC_BSP_SUPPORTS_SBRK], [*], [1])
RTEMS_BSPOPTS_HELP([CONFIGURE_MALLOC_BSP_SUPPORTS_SBRK],
[If defined then the BSP may reduce the available memory size

4
c/src/lib/libbsp/powerpc/score603e/startup/bspstart.c
View File

@@ -223,14 +223,14 @@ void bsp_start( void )
#endif
bsp_clicks_per_usec = 66 / 4;
#if ( PPC_USE_DATA_CACHE )
#if BSP_DATA_CACHE_ENABLED
#if DEBUG
printk("bsp_start: cache_enable\n");
#endif
instruction_cache_enable ();
data_cache_enable ();
#if DEBUG
printk("bsp_start: END PPC_USE_DATA_CACHE\n");
printk("bsp_start: END BSP_DATA_CACHE_ENABLED\n");
#endif
#endif