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2005-05-10 Jennifer Averett <jennifer.averett@oarcorp.com>

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* bootloader/bootldr.h, bootloader/em86.c, bootloader/misc.c,
	bootloader/pci.c, bootloader/pci.h: Modified to depend upon
	rtems/pci.h
This commit is contained in:
Jennifer Averett
2005-05-10 18:27:46 +00:00
parent 3bfb6ef9dc
commit 34e458a38e
6 changed files with 53 additions and 1109 deletions
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6
c/src/lib/libbsp/powerpc/shared/ChangeLog
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@@ -1,3 +1,9 @@
2005-05-10 Jennifer Averett <jennifer.averett@oarcorp.com>
* bootloader/bootldr.h, bootloader/em86.c, bootloader/misc.c,
bootloader/pci.c, bootloader/pci.h: Modified to depend upon
rtems/pci.h
2005-05-10 Ralf Corsepius <ralf.corsepius@rtems.org>
* startup/bspstart.c, tod/todcfg.c:

14
c/src/lib/libbsp/powerpc/shared/bootloader/bootldr.h
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@@ -67,7 +67,7 @@ typedef struct _boot_data {
void *mover; /* where to copy codemove to avoid overlays */
u_long o_msr, o_hid0, o_r31;
opaque * mm_private;
const struct pci_config_access_functions * pci_functions;
const struct pci_bootloader_config_access_functions* pci_functions;
opaque * pci_private;
struct pci_dev * pci_devices;
opaque * v86_private;
@@ -113,42 +113,42 @@ pcibios_write_config_dword(u_char bus, u_char dev_fn,
}
extern inline int
pci_read_config_byte(struct pci_dev *dev, u_char where, u_char * val) {
pci_bootloader_read_config_byte(struct pci_dev *dev, u_char where, u_char * val) {
return bd->pci_functions->read_config_byte(dev->bus->number,
dev->devfn,
where, val);
}
extern inline int
pci_read_config_word(struct pci_dev *dev, u_char where, u_short * val) {
pci_bootloader_read_config_word(struct pci_dev *dev, u_char where, u_short * val) {
return bd->pci_functions->read_config_word(dev->bus->number,
dev->devfn,
where, val);
}
extern inline int
pci_read_config_dword(struct pci_dev *dev, u_char where, u_int * val) {
pci_bootloader_read_config_dword(struct pci_dev *dev, u_char where, u_int * val) {
return bd->pci_functions->read_config_dword(dev->bus->number,
dev->devfn,
where, val);
}
extern inline int
pci_write_config_byte(struct pci_dev *dev, u_char where, u_char val) {
pci_bootloader_write_config_byte(struct pci_dev *dev, u_char where, u_char val) {
return bd->pci_functions->write_config_byte(dev->bus->number,
dev->devfn,
where, val);
}
extern inline int
pci_write_config_word(struct pci_dev *dev, u_char where, u_short val) {
pci_bootloader_write_config_word(struct pci_dev *dev, u_char where, u_short val) {
return bd->pci_functions->write_config_word(dev->bus->number,
dev->devfn,
where, val);
}
extern inline int
pci_write_config_dword(struct pci_dev *dev, u_char where, u_int val) {
pci_bootloader_write_config_dword(struct pci_dev *dev, u_char where, u_int val) {
return bd->pci_functions->write_config_dword(dev->bus->number,
dev->devfn,
where, val);

6
c/src/lib/libbsp/powerpc/shared/bootloader/em86.c
View File

@@ -530,8 +530,8 @@ void em86_main(struct pci_dev *dev){
st_le32((u_int *)p->vbase + 0x10, 0xf000f065);
/* Enable the ROM, read it and disable it immediately */
pci_read_config_dword(dev, PCI_ROM_ADDRESS, &saved_rom);
pci_write_config_dword(dev, PCI_ROM_ADDRESS, 0x000c0001);
pci_bootloader_read_config_dword(dev, PCI_ROM_ADDRESS, &saved_rom);
pci_bootloader_write_config_dword(dev, PCI_ROM_ADDRESS, 0x000c0001);
/* Check that there is an Intel ROM. Should we also check that
* the first instruction is a jump (0xe9 or 0xeb) ?
@@ -560,7 +560,7 @@ void em86_main(struct pci_dev *dev){
* according to comments in linux/arch/alpha/kernel/bios32.c.
*/
pci_write_config_dword(dev, PCI_ROM_ADDRESS, saved_rom);
pci_bootloader_write_config_dword(dev, PCI_ROM_ADDRESS, saved_rom);
vmap(p->vbase+0xc0000, (u_long)p->rom|PTE_RAM, length*512);
/* Now actually emulate the ROM init routine */

18
c/src/lib/libbsp/powerpc/shared/bootloader/misc.c
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@@ -328,7 +328,7 @@ setup_hw(void)
/* Only one can be active in text mode, which for now will
* be assumed as equivalent to having I/O response enabled.
*/
pci_read_config_word(p, PCI_COMMAND, &cmd);
pci_bootloader_read_config_word(p, PCI_COMMAND, &cmd);
if(cmd & PCI_COMMAND_IO || !default_vga) {
default_vga=p;
default_vga_cmd=cmd;
@@ -337,7 +337,7 @@ setup_hw(void)
/* Disable the enabled VGA device, if any. */
if (default_vga)
pci_write_config_word(default_vga, PCI_COMMAND,
pci_bootloader_write_config_word(default_vga, PCI_COMMAND,
default_vga_cmd&
~(PCI_COMMAND_IO|PCI_COMMAND_MEMORY));
init_v86();
@@ -348,19 +348,19 @@ setup_hw(void)
((p->class) >> 16 != PCI_BASE_CLASS_DISPLAY))
continue;
if (p->bus->number != 0) continue;
pci_read_config_word(p, PCI_COMMAND, &cmd);
pci_write_config_word(p, PCI_COMMAND,
pci_bootloader_read_config_word(p, PCI_COMMAND, &cmd);
pci_bootloader_write_config_word(p, PCI_COMMAND,
cmd|PCI_COMMAND_IO|PCI_COMMAND_MEMORY);
printk("Calling the emulator.\n");
em86_main(p);
pci_write_config_word(p, PCI_COMMAND, cmd);
pci_bootloader_write_config_word(p, PCI_COMMAND, cmd);
}
cleanup_v86_mess();
#endif
/* Reenable the primary VGA device */
if (default_vga) {
pci_write_config_word(default_vga, PCI_COMMAND,
pci_bootloader_write_config_word(default_vga, PCI_COMMAND,
default_vga_cmd|
(PCI_COMMAND_IO|PCI_COMMAND_MEMORY));
if (err) {
@@ -524,12 +524,12 @@ find_max_mem( struct pci_dev *dev )
(dev->device == PCI_DEVICE_ID_MOTOROLA_MPC105)) ||
((dev->vendor == PCI_VENDOR_ID_IBM) &&
(dev->device == 0x0037/*IBM 660 Bridge*/)) ) {
pci_read_config_byte(dev, 0xa0, &banks);
pci_bootloader_read_config_byte(dev, 0xa0, &banks);
for (i = 0; i < 8; i++) {
if ( banks & (1<<i) ) {
pci_read_config_byte(dev, 0x90+i, &tmp);
pci_bootloader_read_config_byte(dev, 0x90+i, &tmp);
top = tmp;
pci_read_config_byte(dev, 0x98+i, &tmp);
pci_bootloader_read_config_byte(dev, 0x98+i, &tmp);
top |= (tmp&3)<<8;
if ( top > max ) max = top;
}

28
c/src/lib/libbsp/powerpc/shared/bootloader/pci.c
View File

@@ -509,15 +509,15 @@ static void reconfigure_pci(void) {
for (r=pci->resources; r; r= r->next) {
if (!r->dev->sysdata) {
r->dev->sysdata=r;
pci_read_config_word(r->dev, PCI_COMMAND, &r->cmd);
pci_write_config_word(r->dev, PCI_COMMAND,
pci_bootloader_read_config_word(r->dev, PCI_COMMAND, &r->cmd);
pci_bootloader_write_config_word(r->dev, PCI_COMMAND,
r->cmd & ~(PCI_COMMAND_IO|
PCI_COMMAND_MEMORY));
}
}
for (r=pci->resources; r; r= r->next) {
pci_write_config_dword(r->dev,
pci_bootloader_write_config_dword(r->dev,
PCI_BASE_ADDRESS_0+(r->reg<<2),
r->base);
if ((r->type&
@@ -525,14 +525,14 @@ static void reconfigure_pci(void) {
PCI_BASE_ADDRESS_MEM_TYPE_MASK)) ==
(PCI_BASE_ADDRESS_SPACE_MEMORY|
PCI_BASE_ADDRESS_MEM_TYPE_64)) {
pci_write_config_dword(r->dev,
pci_bootloader_write_config_dword(r->dev,
PCI_BASE_ADDRESS_1+(r->reg<<2),
0);
}
}
for (dev=bd->pci_devices; dev; dev= dev->next) {
if (dev->sysdata) {
pci_write_config_word(dev, PCI_COMMAND,
pci_bootloader_write_config_word(dev, PCI_COMMAND,
((pci_resource *)dev->sysdata)
->cmd);
dev->sysdata=NULL;
@@ -600,7 +600,7 @@ indirect_pci_write_config_dword(unsigned char bus, unsigned char dev_fn,
return PCIBIOS_SUCCESSFUL;
}
static const struct pci_config_access_functions indirect_functions = {
static const struct pci_bootloader_config_access_functions indirect_functions = {
indirect_pci_read_config_byte,
indirect_pci_read_config_word,
indirect_pci_read_config_dword,
@@ -689,7 +689,7 @@ direct_pci_write_config_dword(unsigned char bus, unsigned char dev_fn,
return PCIBIOS_SUCCESSFUL;
}
static const struct pci_config_access_functions direct_functions = {
static const struct pci_bootloader_config_access_functions direct_functions = {
direct_pci_read_config_byte,
direct_pci_read_config_word,
direct_pci_read_config_dword,
@@ -706,14 +706,14 @@ void pci_read_bases(struct pci_dev *dev, unsigned int howmany)
u_short cmd;
uint32_t l, ml;
pci_read_config_word(dev, PCI_COMMAND, &cmd);
pci_bootloader_read_config_word(dev, PCI_COMMAND, &cmd);
for(reg=0; reg<howmany; reg=nextreg)
{
pci_resource *r;
nextreg=reg+1;
pci_read_config_dword(dev, REG, &l);
pci_bootloader_read_config_dword(dev, REG, &l);
#if 0
if (l == 0xffffffff /*AJF || !l*/) continue;
#endif
@@ -722,16 +722,16 @@ void pci_read_bases(struct pci_dev *dev, unsigned int howmany)
* bootloader we don't care however. Also we can't print any
* message for a while since we might just disable the console.
*/
pci_write_config_word(dev, PCI_COMMAND, cmd &
pci_bootloader_write_config_word(dev, PCI_COMMAND, cmd &
~(PCI_COMMAND_IO|PCI_COMMAND_MEMORY));
pci_write_config_dword(dev, REG, ~0);
pci_read_config_dword(dev, REG, &ml);
pci_write_config_dword(dev, REG, l);
pci_bootloader_write_config_dword(dev, REG, ~0);
pci_bootloader_read_config_dword(dev, REG, &ml);
pci_bootloader_write_config_dword(dev, REG, l);
/* Reenable the device now that we've played with
* base registers.
*/
pci_write_config_word(dev, PCI_COMMAND, cmd);
pci_bootloader_write_config_word(dev, PCI_COMMAND, cmd);
/* seems to be an unused entry skip it */
if ( ml == 0 || ml == 0xffffffff ) continue;

1090
c/src/lib/libbsp/powerpc/shared/bootloader/pci.h
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