forked from Imagelibrary/rtems
build: Format build items
Use yaml.dump(data, default_flow_style=False, allow_unicode=True) with a custom representer for integer default values to format all build items.
This commit is contained in:
@@ -5,7 +5,7 @@ actions:
|
||||
build-type: option
|
||||
copyrights:
|
||||
- Copyright (C) 2022 embedded brains GmbH (http://www.embedded-brains.de)
|
||||
default: 2
|
||||
default: 0x00000002
|
||||
default-by-variant:
|
||||
- value: null
|
||||
variants:
|
||||
|
||||
@@ -5,7 +5,7 @@ actions:
|
||||
build-type: option
|
||||
copyrights:
|
||||
- Copyright (C) 2022 embedded brains GmbH (http://www.embedded-brains.de)
|
||||
default: 3
|
||||
default: 0x00000003
|
||||
default-by-variant: []
|
||||
description: |
|
||||
Defines the initial value of the ICC_BPR1 register of the ARM GIC CPU
|
||||
|
||||
@@ -5,7 +5,7 @@ actions:
|
||||
build-type: option
|
||||
copyrights:
|
||||
- Copyright (C) 2022 embedded brains GmbH (http://www.embedded-brains.de)
|
||||
default: 0
|
||||
default: 0x00000000
|
||||
default-by-variant: []
|
||||
description: |
|
||||
Defines the initial value of the ICC_CTRL register of the ARM GIC CPU
|
||||
|
||||
@@ -5,7 +5,7 @@ actions:
|
||||
build-type: option
|
||||
copyrights:
|
||||
- Copyright (C) 2022 embedded brains GmbH (http://www.embedded-brains.de)
|
||||
default: 1
|
||||
default: 0x00000001
|
||||
default-by-variant:
|
||||
- value: null
|
||||
variants:
|
||||
|
||||
@@ -5,7 +5,7 @@ actions:
|
||||
build-type: option
|
||||
copyrights:
|
||||
- Copyright (C) 2022 embedded brains GmbH (http://www.embedded-brains.de)
|
||||
default: 1
|
||||
default: 0x00000001
|
||||
default-by-variant: []
|
||||
description: |
|
||||
Defines the initial value of the ICC_IGRPEN1 register of the ARM GIC CPU
|
||||
|
||||
@@ -5,7 +5,7 @@ actions:
|
||||
build-type: option
|
||||
copyrights:
|
||||
- Copyright (C) 2022 embedded brains GmbH (http://www.embedded-brains.de)
|
||||
default: 255
|
||||
default: 0x000000ff
|
||||
default-by-variant: []
|
||||
description: |
|
||||
Defines the initial value of the ICC_PMR register of the ARM GIC CPU
|
||||
|
||||
@@ -5,7 +5,7 @@ actions:
|
||||
build-type: option
|
||||
copyrights:
|
||||
- Copyright (C) 2022 embedded brains GmbH (http://www.embedded-brains.de)
|
||||
default: 3
|
||||
default: 0x00000003
|
||||
default-by-variant: []
|
||||
description: |
|
||||
Defines the initial value of the ICC_SRE register of the ARM GIC CPU
|
||||
|
||||
Reference in New Issue
Block a user