2000-05-25 Matt Cross <profesor@gweep.net>

* New MRM332 BSP for the Mini RoboMind board based
	on the 68332 microcontroller designed and build by Mark
	Castelluccio.  For details on the MRM see http://www.robominds.com.
	* .cvsignore, ChangeLog Makefile.am, README, bsp_specs,
	clock/.cvsignore, clock/Makefile.am, clock/ckinit.c, configure.in,
	console/.cvsignore, console/Makefile.am, console/console.c,
	include/.cvsignore, include/Makefile.am, include/bsp.h,
	include/mrm332.h, misc/dotests, misc/gdbinit68, misc/interr.c,
	spurious/.cvsignore, spurious/Makefile.am, spurious/spinit.c,
	start/.cvsignore, start/Makefile.am, start/start.c, startup/.cvsignore,
	startup/Makefile.am, startup/bspclean.c, startup/bspstart.c,
	startup/except_vect_332_ROM.S, startup/linkcmds, startup/linkcmds_ROM,
	timer/.cvsignore, timer/Makefile.am, timer/timer.c, times,
	wrapup/.cvsignore, wrapup/Makefile.am: Initial files.
This commit is contained in:
Joel Sherrill
2001-05-25 16:28:46 +00:00
parent 0f58886082
commit 332484b52e
38 changed files with 2662 additions and 0 deletions

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Makefile
Makefile.in
aclocal.m4
config.cache
config.guess
config.log
config.status
config.sub
configure
depcomp
install-sh
missing
mkinstalldirs

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2000-05-25 Matt Cross <profesor@gweep.net>
* New MRM332 BSP for the Mini RoboMind board based
on the 68332 microcontroller designed and build by Mark
Castelluccio. For details on the MRM see http://www.robominds.com.
* .cvsignore, ChangeLog Makefile.am, README, bsp_specs,
clock/.cvsignore, clock/Makefile.am, clock/ckinit.c, configure.in,
console/.cvsignore, console/Makefile.am, console/console.c,
include/.cvsignore, include/Makefile.am, include/bsp.h,
include/mrm332.h, misc/dotests, misc/gdbinit68, misc/interr.c,
spurious/.cvsignore, spurious/Makefile.am, spurious/spinit.c,
start/.cvsignore, start/Makefile.am, start/start.c, startup/.cvsignore,
startup/Makefile.am, startup/bspclean.c, startup/bspstart.c,
startup/except_vect_332_ROM.S, startup/linkcmds, startup/linkcmds_ROM,
timer/.cvsignore, timer/Makefile.am, timer/timer.c, times,
wrapup/.cvsignore, wrapup/Makefile.am: Initial files.

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##
## $Id$
##
AUTOMAKE_OPTIONS = foreign 1.4
ACLOCAL_AMFLAGS = -I $(RTEMS_TOPdir)/aclocal
# wrapup is the one that actually builds and installs the library
# from the individual .rel files built in other directories
SUBDIRS = . include start startup clock console spurious timer wrapup
include $(top_srcdir)/../../bsp.am
EXTRA_DIST = bsp_specs times
include $(top_srcdir)/../../../../../../automake/subdirs.am
include $(top_srcdir)/../../../../../../automake/local.am

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#
# $Id$
#
Description: mrm332
============
CPU: MC68332 @16 or 25MHz
RAM: 32k or 512k
ROM: 512k flash
The Mini RoboMind is a small board based on the 68332 microcontroller
designed and build by Mark Castelluccio. For details, see:
http://www.robominds.com
This BSP was ported from the efi332 BSP by Matt Cross (profesor@gweep.net),
the efi332 BSP was written by John S Gwynne.
TODO:
=====
- integrate the interrupt driven stdin/stdout into RTEMS to (a) reduce
the interrupt priority and (2) to prevent it from blocking.
- add a timer driver for the tmtest set.

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%rename cpp old_cpp
%rename lib old_lib
%rename endfile old_endfile
%rename startfile old_startfile
%rename link old_link
*cpp:
%(old_cpp) %{qrtems: -D__embedded__} -Asystem(embedded)
*lib:
%{!qrtems: %(old_lib)} %{qrtems: --start-group \
%{!qrtems_debug: -lrtemsall} %{qrtems_debug: -lrtemsall_g} \
-lc -lgcc --end-group \
%{!qnolinkcmds: -T linkcmds%s}}
*startfile:
%{!qrtems: %(old_startfile)} %{qrtems: \
%{!qrtems_debug: start.o%s} \
%{qrtems_debug: start_g.o%s} \
crti.o%s crtbegin.o%s}
*link:
%{!qrtems: %(old_link)} %{qrtems: -dc -dp -N -e start}
*endfile:
%{!qrtems: %(old_endfile)} %{qrtems: crtend.o%s crtn.o%s}

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Makefile
Makefile.in

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##
## $Id$
##
AUTOMAKE_OPTIONS = foreign 1.4
PGM = $(ARCH)/clock.rel
C_FILES = ckinit.c
C_O_FILES = $(C_FILES:%.c=$(ARCH)/%.o)
OBJS = $(C_O_FILES)
include $(RTEMS_ROOT)/make/custom/@RTEMS_BSP@.cfg
include $(top_srcdir)/../../../../../../automake/lib.am
#
# (OPTIONAL) Add local stuff here using +=
#
$(PGM): $(OBJS)
$(make-rel)
# the .rel file built here will be put into libbsp.a by ../wrapup/Makefile
all-local: $(ARCH) $(OBJS) $(PGM)
.PRECIOUS: $(PGM)
EXTRA_DIST = ckinit.c
include $(top_srcdir)/../../../../../../automake/local.am

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/* Clock_init()
*
* This routine initailizes the periodic interrupt timer on
* the Motorola 68332.
*
* Input parameters: NONE
*
* Output parameters: NONE
*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#include <stdlib.h>
#include <bsp.h>
#include <rtems/libio.h>
#include <mrm332.h>
#define CLOCK_VECTOR MRM_PIV
rtems_unsigned32 Clock_isrs; /* ISRs until next tick */
volatile rtems_unsigned32 Clock_driver_ticks;
/* ticks since initialization */
rtems_isr_entry Old_ticker;
void Clock_exit( void );
/*
* These are set by clock driver during its init
*/
rtems_device_major_number rtems_clock_major = ~0;
rtems_device_minor_number rtems_clock_minor;
rtems_isr Clock_isr(rtems_vector_number vector)
{
Clock_driver_ticks += 1;
if ( Clock_isrs == 1 ) {
rtems_clock_tick();
Clock_isrs = BSP_Configuration.microseconds_per_tick / 1000;
}
else
Clock_isrs -= 1;
}
void Install_clock(
rtems_isr_entry clock_isr
)
{
Clock_driver_ticks = 0;
Clock_isrs = BSP_Configuration.microseconds_per_tick / 1000;
Old_ticker = (rtems_isr_entry) set_vector( clock_isr, CLOCK_VECTOR, 1 );
/* enable 1mS interrupts */
*PITR = (unsigned short int)( SAM(0x09,0,PITM) );/* load counter */
*PICR = (unsigned short int) /* enable interrupt */
( SAM(ISRL_PIT,8,PIRQL) | SAM(CLOCK_VECTOR,0,PIV) );
atexit( Clock_exit );
}
void Clock_exit( void )
{
/* shutdown the periodic interrupt */
*PICR = (unsigned short int)
( SAM(0,8,PIRQL) | SAM(CLOCK_VECTOR,0,PIV) );
/* ^^ zero disables interrupt */
/* do not restore old vector */
}
rtems_device_driver Clock_initialize(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *pargp
)
{
Install_clock( Clock_isr );
/*
* make major/minor avail to others such as shared memory driver
*/
rtems_clock_major = major;
rtems_clock_minor = minor;
return RTEMS_SUCCESSFUL;
}
rtems_device_driver Clock_control(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *pargp
)
{
rtems_unsigned32 isrlevel;
rtems_libio_ioctl_args_t *args = pargp;
if (args == 0)
goto done;
/*
* This is hokey, but until we get a defined interface
* to do this, it will just be this simple...
*/
if (args->command == rtems_build_name('I', 'S', 'R', ' '))
{
Clock_isr(CLOCK_VECTOR);
}
else if (args->command == rtems_build_name('N', 'E', 'W', ' '))
{
rtems_interrupt_disable( isrlevel );
(void) set_vector( args->buffer, CLOCK_VECTOR, 1 );
rtems_interrupt_enable( isrlevel );
}
done:
return RTEMS_SUCCESSFUL;
}

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dnl Process this file with autoconf to produce a configure script.
dnl
dnl $Id$
AC_PREREQ(2.13)
AC_INIT(bsp_specs)
RTEMS_TOP(../../../../../..)
AC_CONFIG_AUX_DIR(../../../../../..)
RTEMS_CANONICAL_TARGET_CPU
AM_INIT_AUTOMAKE(rtems-c-src-lib-libbsp-m68k-mrm,$RTEMS_VERSION,no)
AM_MAINTAINER_MODE
RTEMS_PROG_CC_FOR_TARGET
RTEMS_CANONICALIZE_TOOLS
RTEMS_ENV_RTEMSBSP
RTEMS_CHECK_CUSTOM_BSP(RTEMS_BSP)
RTEMS_CHECK_BSP_CACHE(RTEMS_BSP)
RTEMS_CANONICAL_HOST
RTEMS_PROJECT_ROOT
# Explicitly list all Makefiles here
AC_OUTPUT(
Makefile
clock/Makefile
console/Makefile
include/Makefile
spurious/Makefile
start/Makefile
startup/Makefile
timer/Makefile
wrapup/Makefile)

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Makefile
Makefile.in

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##
## $Id$
##
AUTOMAKE_OPTIONS = foreign 1.4
PGM = $(ARCH)/console.rel
C_FILES = console.c
C_O_FILES = $(C_FILES:%.c=$(ARCH)/%.o)
OBJS = $(C_O_FILES)
include $(RTEMS_ROOT)/make/custom/@RTEMS_BSP@.cfg
include $(top_srcdir)/../../../../../../automake/lib.am
#
# (OPTIONAL) Add local stuff here using +=
#
$(PGM): $(OBJS)
$(make-rel)
# the .rel file built here will be put into libbsp.a by ../wrapup/Makefile
all-local: $(ARCH) $(OBJS) $(PGM)
.PRECIOUS: $(PGM)
EXTRA_DIST = console.c
include $(top_srcdir)/../../../../../../automake/local.am

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/*
* This file contains the mrm console IO package.
*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#include <stdlib.h>
#include <bsp.h>
#include <rtems/libio.h>
/* BUFFER_LENGTH must be 2^n for n=1, 2, 3, .... */
#define BUFFER_LENGTH 256
#define RTS_STOP_SIZE BUFFER_LENGTH-64
#define RTS_START_SIZE 16
char xmt_buf[BUFFER_LENGTH];
char rcv_buf[BUFFER_LENGTH];
/* in: last entry into the buffer; always on a valid character */
/* out: points to the next character to be pull from the buffer */
/* in+1=out => buffer empty */
/* in+2=out => buffer full */
struct UART_buf {
char *offset;
char *in;
char *out;
};
static volatile struct UART_buf xmt = { xmt_buf, (char *)0, (char *)1};
static volatile struct UART_buf rcv = { rcv_buf, (char *)0, (char *)1};
static volatile char _debug_flag = 0;
#if 0
#define SET_RTS(a) {*PORTF0 = (*PORTF0 & ~0x4) | ( (a)? 0 : 0x4); }
#define GET_CTS (!(*PORTF0 & 0x2))
#else
#define SET_RTS(a) {;}
#define GET_CTS 1
#endif
/* _catchSCIint, _catchCTSint, and _catchSPURIOUSint are the
interrupt front-ends */
extern void _catchSCIint();
asm(" .text
.align 2
.globl _catchSCIint
_catchSCIint:
moveml %d0-%d7/%a0-%a6,%sp@- /* save registers */
jbsr uart_interrupt
moveml %sp@+,%d0-%d7/%a0-%a6
rts
");
extern void _catchCTSint();
asm(" .text
.align 2
.globl _catchCTSint
_catchCTSint:
moveml %d0-%d7/%a0-%a6,%sp@- /* save registers */
jbsr cts_interrupt
moveml %sp@+,%d0-%d7/%a0-%a6
rts
");
extern void _catchSPURIOUSint();
asm(" .text
.align 2
.globl _catchSPURIOUSint
_catchSPURIOUSint:
moveml %d0-%d7/%a0-%a6,%sp@- /* save registers */
jbsr spurious_interrupt
moveml %sp@+,%d0-%d7/%a0-%a6
rts
");
int _spurious_int_counter=0;
/* note: cts uses int1. If it "bounces", a spurious interrupt is generated */
void spurious_interrupt(void) {
_spurious_int_counter++; /* there should never be alot of these */
}
/* _fake_trap_1 will continue the UART interrupt (%sr *still*
UART_ISR_LEVEL) as a trap #1 to enter the debugger */
/* *****fix me; this is for 68000 w/jsr ram exception table ******* */
asm(" .text
.align 2
_fake_trap_1:
unlk %a6 /* clear interrupt frame */
lea %sp@(4),%sp /* remove jbsr instruction */
moveml %sp@+,%d0-%d7/%a0-%a6 /* pop registers */
jmp (33*6-12) /* jump exception 1 */
");
/* dispatch UART interrupt */
void xmit_interrupt(void);
void rcvr_interrupt(void);
void _fake_trap_1(void);
void uart_interrupt(void) {
/* receiver status bits are cleared by a SCSR read followed
by a SCDR read. transmitter status bits are cleared by
a SCSR read followed by a SCDR write. */
if ((*SCSR) & (TDRE | TC))
xmit_interrupt();
if ((*SCSR) & (RDRF))
rcvr_interrupt();
if (_debug_flag) {
_debug_flag = 0; /* reset the flag */
_fake_trap_1(); /* fake a trap #1 */
}
}
/* transfer received character to the buffer */
void rcvr_interrupt(void) {
register char *a, c;
register int length;
while((*SCSR) & (RDRF)) {
if ((c=*SCDR) == 0x1a) /* use ctl-z to reboot */
reboot();
/* else if (c == 0x03) { */ /* use ctl-c to enter debugger */
/* _debug_flag = 1; */
/* continue; */
/* } */
*(char *)((int)rcv.offset +(int)
(a=(char *)(((int)rcv.in+1) & ((int)BUFFER_LENGTH-1)))) = c;
if ((char *)(((int)rcv.in+2) & ((int)BUFFER_LENGTH-1)) != rcv.out)
rcv.in=a;
};
length = (BUFFER_LENGTH -1) & (
( ((int)rcv.out <= (int)rcv.in) ? 0 : BUFFER_LENGTH) - (int)rcv.out
+ (int)rcv.in + 1);
if (length >= RTS_STOP_SIZE)
SET_RTS(0);
}
/* tranfer buffered characters to the UART */
void xmit_interrupt(void) {
register short int oldsr;
_CPU_ISR_Disable( oldsr ); /* for when outbyte or flush calls */
while ((*SCSR) & (TDRE)) {
if ((char *)(((int)xmt.in+1) & ((int)BUFFER_LENGTH-1)) != xmt.out)
/* xmit buffer not empty */
if (GET_CTS) {
/* send next char */
*SCDR=*(char *)((int)xmt.offset+(int)xmt.out);
xmt.out= (char *)(((int)xmt.out+1) & ((int)BUFFER_LENGTH-1));
*SCCR1 = (*SCCR1 & ~(TIE | TCIE)) | (TIE);
}
else {
/* configue CTS interrupt and shutdown xmit interrupts */
*SCCR1 &= ~(TIE | TCIE);
*PFPAR |= 0x2;
break;
}
else {
/* xmit buffer empty; shutdown interrupts */
*SCCR1 &= ~(TIE | TCIE);
break;
}
}
_CPU_ISR_Enable( oldsr );
}
void cts_interrupt(void) {
register short int oldsr;
_CPU_ISR_Disable( oldsr ); /* for when outbyte calls */
*PFPAR &= ~0x2;
*SCCR1 = (*SCCR1 & ~(TIE | TCIE)) | (TIE);
_CPU_ISR_Enable( oldsr );
}
/* transfer character from the buffer */
char inbyte(void) {
register char a;
register int length;
while ((char *)(((int)rcv.in+1) & ((int)BUFFER_LENGTH-1))== rcv.out);
a=*(char *)((int)rcv.offset+(int)rcv.out);
rcv.out= (char *)(((int)rcv.out+1) & ((int)BUFFER_LENGTH-1));
length = (BUFFER_LENGTH -1) & (
( ((int)rcv.out <= (int)rcv.in) ? 0 : BUFFER_LENGTH) - (int)rcv.out
+ (int)rcv.in + 1);
if (length < RTS_START_SIZE)
SET_RTS(1);
return (a);
}
/* once room is avaliable in the buffer, transfer
the character into the buffer and enable
the xmtr interrupt */
void outbyte(char c) {
register char *a;
while ((char *)(((int)xmt.in+2) & ((int)BUFFER_LENGTH-1)) == xmt.out);
*(char *)((int)xmt.offset+(int)
(a=(char *)(((int)xmt.in+1) & ((int)BUFFER_LENGTH-1))))=c;
xmt.in=a;
if (!(*SCCR1 & (TIE | TCIE)) && (!(*PFPAR & 0x2)) )
/* if neither interrupts are running, */
xmit_interrupt(); /* we need to restart the xmiter */
}
void _UART_flush(void) {
/* loop till xmt buffer empty. Works with interrupts disabled */
while ((char *)(((int)xmt.in+1) & ((int)BUFFER_LENGTH-1)) != xmt.out)
xmit_interrupt();
/* loop till UART buffer empty */
while ( (*SCSR & TC) == 0 );
}
/* console_initialize
*
* This routine initializes the console IO driver.
*
* Input parameters: NONE
*
* Output parameters: NONE
*
* Return values:
*/
void console_init()
{
*QSMCR = ( SAM(QSM_IARB,0,IARB) );
*QILR = ( SAM(ISRL_QSPI,4,ILQSPI) | SAM(ISRL_SCI,0,ILSCI) );
*QIVR = ( SAM(EFI_QIVR,0,INTV) );
*SCCR0 = ( (int)( SYS_CLOCK/SCI_BAUD/32.0+0.5 ) & 0x1fff );
*SCCR1 = ( RIE | TE | RE );
set_vector(_catchSPURIOUSint, EFI_SPINT, 1);
set_vector(_catchSCIint, EFI_QIVR, 1);
/* set_vector(_catchCTSint, EFI_INT1, 1); */
}
rtems_device_driver console_initialize(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
)
{
rtems_status_code status;
status = rtems_io_register_name(
"/dev/console",
major,
(rtems_device_minor_number) 0
);
if (status != RTEMS_SUCCESSFUL)
rtems_fatal_error_occurred(status);
return RTEMS_SUCCESSFUL;
}
/* is_character_ready
*
* This routine returns TRUE if a character is available.
*
* Input parameters: NONE
*
* Output parameters: NONE
*
* Return values:
*/
rtems_boolean is_character_ready(
char *ch
)
{
if ((char *)(((int)rcv.in+1) & ((int)BUFFER_LENGTH-1))== rcv.out)
return(FALSE);
else
return(TRUE);
}
/*
* Open entry point
*/
rtems_device_driver console_open(
rtems_device_major_number major,
rtems_device_minor_number minor,
void * arg
)
{
return RTEMS_SUCCESSFUL;
}
/*
* Close entry point
*/
rtems_device_driver console_close(
rtems_device_major_number major,
rtems_device_minor_number minor,
void * arg
)
{
return RTEMS_SUCCESSFUL;
}
/*
* read bytes from the serial port. We only have stdin.
*/
rtems_device_driver console_read(
rtems_device_major_number major,
rtems_device_minor_number minor,
void * arg
)
{
rtems_libio_rw_args_t *rw_args;
char *buffer;
int maximum;
int count;
rw_args = (rtems_libio_rw_args_t *) arg;
buffer = rw_args->buffer;
maximum = rw_args->count;
for (count = 0; count < maximum; count++) {
buffer[ count ] = inbyte();
if (buffer[ count ] == '\n' || buffer[ count ] == '\r') {
buffer[ count++ ] = '\n';
break;
}
}
rw_args->bytes_moved = count;
return (count >= 0) ? RTEMS_SUCCESSFUL : RTEMS_UNSATISFIED;
}
/*
* write bytes to the serial port. Stdout and stderr are the same.
*/
rtems_device_driver console_write(
rtems_device_major_number major,
rtems_device_minor_number minor,
void * arg
)
{
int count;
int maximum;
rtems_libio_rw_args_t *rw_args;
char *buffer;
rw_args = (rtems_libio_rw_args_t *) arg;
buffer = rw_args->buffer;
maximum = rw_args->count;
for (count = 0; count < maximum; count++) {
if ( buffer[ count ] == '\n') {
outbyte('\r');
}
outbyte( buffer[ count ] );
}
rw_args->bytes_moved = maximum;
return 0;
}
/*
* IO Control entry point
*/
rtems_device_driver console_control(
rtems_device_major_number major,
rtems_device_minor_number minor,
void * arg
)
{
return RTEMS_SUCCESSFUL;
}

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Makefile
Makefile.in

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##
## $Id$
##
AUTOMAKE_OPTIONS = foreign 1.4
H_FILES = bsp.h ../../../shared/include/coverhd.h mrm332.h
$(PROJECT_INCLUDE):
$(mkinstalldirs) $@
$(PROJECT_INCLUDE)/bsp.h: bsp.h
$(INSTALL_DATA) $< $@
$(PROJECT_INCLUDE)/coverhd.h: ../../../shared/include/coverhd.h
$(INSTALL_DATA) $< $@
$(PROJECT_INCLUDE)/mrm332.h: mrm332.h
$(INSTALL_DATA) $< $@
TMPINSTALL_FILES += $(PROJECT_INCLUDE) $(PROJECT_INCLUDE)/bsp.h \
$(PROJECT_INCLUDE)/coverhd.h $(PROJECT_INCLUDE)/mrm332.h
all-local: $(TMPINSTALL_FILES)
EXTRA_DIST = bsp.h mrm332.h
include $(top_srcdir)/../../../../../../automake/local.am

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/* bsp.h
*
* This include file contains all mrm board IO definitions.
*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#ifndef __MRM332_BSP_h
#define __MRM332_BSP_h
#ifdef __cplusplus
extern "C" {
#endif
#include <rtems.h>
#include <clockdrv.h>
#include <console.h>
#include <iosupp.h>
#include <mrm332.h>
#include <sim.h>
#include <qsm.h>
/*
* confdefs.h overrides for this BSP:
* - number of termios serial ports (defaults to 1)
* - Interrupt stack space is not minimum if defined.
*/
/* #define CONFIGURE_NUMBER_OF_TERMIOS_PORTS 2 */
/* #define CONFIGURE_INTERRUPT_STACK_MEMORY (TBD * 1024) */
/*
* Define the time limits for RTEMS Test Suite test durations.
* Long test and short test duration limits are provided. These
* values are in seconds and need to be converted to ticks for the
* application.
*
*/
#define MAX_LONG_TEST_DURATION 300 /* 5 minutes = 300 seconds */
#define MAX_SHORT_TEST_DURATION 3 /* 3 seconds */
/*
* Define the interrupt mechanism for Time Test 27
*/
/* XXX - JRS - I want to compile the tmtests */
#define MUST_WAIT_FOR_INTERRUPT 1
#define Install_tm27_vector( handler )
#define Cause_tm27_intr()
#define Clear_tm27_intr()
#define Lower_tm27_intr()
/*
* Simple spin delay in microsecond units for device drivers.
* This is very dependent on the clock speed of the target.
*/
#define delay( microseconds ) \
{ register rtems_unsigned32 _delay=(microseconds); \
register rtems_unsigned32 _tmp=123; \
asm volatile( "0: \
nbcd %0 ; \
nbcd %0 ; \
dbf %1,0b" \
: "=d" (_tmp), "=d" (_delay) \
: "0" (_tmp), "1" (_delay) ); \
}
/* externals */
extern char _etext[];
extern char _copy_start[];
extern char _edata[];
extern char _clear_start[];
extern char end[];
extern char _copy_data_from_rom[];
/* constants */
#ifdef __START_C__
#define STACK_SIZE "#0x800"
#else
#define STACK_SIZE 0x800
#endif
/* macros */
#define RAW_PUTS(str) \
{ register char *ptr = str; \
while (*ptr) outbyte(*ptr++); \
}
#define RAW_PUTI(n) { \
register int i, j; \
\
RAW_PUTS("0x"); \
for (i=28;i>=0;i -= 4) { \
j = (n>>i) & 0xf; \
outbyte( (j>9 ? j-10+'a' : j+'0') ); \
} \
}
/* miscellaneous stuff assumed to exist */
extern rtems_configuration_table BSP_Configuration;
extern m68k_isr_entry M68Kvec[]; /* vector table address */
extern int stack_size;
extern int stack_start;
/*
* Device Driver Table Entries
*/
/*
* NOTE: Use the standard Console driver entry
*/
/*
* NOTE: Use the standard Clock driver entry
*/
/* functions */
void bsp_cleanup( void );
m68k_isr_entry set_vector(
rtems_isr_entry handler,
rtems_vector_number vector,
int type
);
void console_init(void);
void Spurious_Initialize(void);
void _UART_flush(void);
void Clock_exit(void);
void outbyte(char);
#ifdef __cplusplus
}
#endif
#endif
/* end of include file */

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@@ -0,0 +1,71 @@
/* mrm332.h
*
* $Id$
*/
#ifndef _MRM332_H_
#define _MRM332_H_
/* SIM_MM (SIM Module Mapping) determines the location of the control
register block. When MM=0, register addresses range fom 0x7ff000 to
0x7FFFFF. When MM=1, register addresses range from 0xfff000 to
0xffffff. */
#define SIM_MM 1
/* Interrupt related definitions */
#define SIM_IARB 15
#define QSM_IARB 10
#define MRM_PIV 64
#define ISRL_PIT 4 /* zero disables PIT */
#define EFI_QIVR 66 /* 66=>SCI and 67=>QSPI interrupt */
#define ISRL_QSPI 0
#define EFI_SPINT 24 /* spurious interrupt */
#define EFI_INT1 25 /* CTS interrupt */
#define ISRL_SCI 6
/* System Clock definitions */
#define XTAL 32768.0 /* crystal frequency in Hz */
#if 0
/* Default MRM clock rate (8.388688 MHz) set by CPU32: */
#define MRM_W 0 /* system clock parameters */
#define MRM_X 0
#define MRM_Y 0x3f
#endif
#if 0
/* 16.77722 MHz: */
#define MRM_W 1 /* system clock parameters */
#define MRM_X 1
#define MRM_Y 0x0f
#endif
#if 1
/* 25.16582 MHz: */
#define MRM_W 1 /* system clock parameters */
#define MRM_X 1
#define MRM_Y 0x17
#endif
#define SYS_CLOCK (XTAL*4.0*(MRM_Y+1)*(1 << (2*MRM_W+MRM_X)))
#define SCI_BAUD 9600 /* RS232 Baud Rate */
/* macros/functions */
/*
* This prototype really should have the noreturn attribute but
* that causes a warning. Not sure how to fix that.
*/
/* static void reboot(void) __attribute__ ((noreturn)); */
static void reboot(void);
__inline__ static void reboot() {asm("trap #15; .word 0x0063");}
#endif /* _MRM_H_ */

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#! /bin/bash
#
# $Id$
#
mkdir MyTests
find -name MyTests -prune -or -name "*.nxe" -exec cp {} MyTests \;
stty 1:0:80001cb2:0:3:1c:7f:15:4:5:1:0:11:13:1a:0:12:f:17:16:0:0:0:0:0:0:0:0:0:0:0:0:0:0:0:0 </dev/ttyS1
/bin/cp /dev/ttyS1 screen &
cpJob=$!
( cd MyTests; for f in *nxe; do m68k-elf-gdb ${f} </dev/null; done )
kill -9 $cpJob

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@@ -0,0 +1,16 @@
#
# $Id$
#
echo Setting up the environment for mrm debuging.\n
target bdm /dev/bdmcpu320
bdm_setdelay 1000
bdm_autoreset on
set remotecache off
bdm_timetocomeup 0
bdm_init
bdm_reset
set $sfc=5
set $dfc=5
r
q

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@@ -0,0 +1,99 @@
/*
* Internal Error Handler
*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#include <rtems/system.h>
#include <rtems/score/interr.h>
#include <rtems/score/sysstate.h>
#include <rtems/score/userext.h>
/*PAGE
*
* _Internal_error_Occurred
*
* This routine will invoke the fatal error handler supplied by the user
* followed by the the default one provided by the executive. The default
* error handler assumes no hardware is present to help inform the user
* of the problem. Halt stores the error code in a known register,
* disables interrupts, and halts the CPU. If the CPU does not have a
* halt instruction, it will loop to itself.
*
* Input parameters:
* the_source - what subsystem the error originated in
* is_internal - if the error was internally generated
* the_error - fatal error status code
*
* Output parameters:
* As much information as possible is stored in a CPU dependent fashion.
* See the CPU dependent code for more information.
*
* NOTE: The the_error is not necessarily a directive status code.
*/
/*
* Ugly hack.... _CPU_Fatal_halt() disonnects the bdm. Without this
* change, the_error is only known only to the cpu :).
*
* From "bsp.h" which is not yet available in the arch tree during
* this phase of install. jsg
*/
void outbyte(char);
void bsp_cleanup( void );
#define RAW_PUTS(str) \
{ register char *ptr = str; \
while (*ptr) outbyte(*ptr++); \
}
#define RAW_PUTI(n) { \
register int i, j; \
\
RAW_PUTS("0x"); \
for (i=28;i>=0;i -= 4) { \
j = (n>>i) & 0xf; \
outbyte( (j>9 ? j-10+'a' : j+'0') ); \
} \
}
void volatile _Internal_error_Occurred(
Internal_errors_Source the_source,
boolean is_internal,
unsigned32 the_error
)
{
Internal_errors_What_happened.the_source = the_source;
Internal_errors_What_happened.is_internal = is_internal;
Internal_errors_What_happened.the_error = the_error;
_User_extensions_Fatal( the_source, is_internal, the_error );
_System_state_Set( SYSTEM_STATE_FAILED );
/* try to print error message to outbyte */
RAW_PUTS("\r\nRTEMS: A fatal error has occured.\r\n");
RAW_PUTS("RTEMS: fatal error ");
RAW_PUTI( the_error );
RAW_PUTS(" (");
outbyte( (char)((the_error>>24) & 0xff) );
outbyte( (char)((the_error>>16) & 0xff) );
outbyte( (char)((the_error>>8) & 0xff) );
outbyte( (char)(the_error & 0xff) );
RAW_PUTS(").\r\n");
/* configure peripherals for a safe exit */
bsp_cleanup();
_CPU_Fatal_halt( the_error );
/* will not return from this routine */
}

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@@ -0,0 +1,2 @@
Makefile
Makefile.in

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@@ -0,0 +1,32 @@
##
## $Id$
##
AUTOMAKE_OPTIONS = foreign 1.4
PGM = $(ARCH)/spurious.rel
C_FILES = spinit.c
C_O_FILES = $(C_FILES:%.c=$(ARCH)/%.o)
OBJS = $(C_O_FILES)
include $(RTEMS_ROOT)/make/custom/@RTEMS_BSP@.cfg
include $(top_srcdir)/../../../../../../automake/lib.am
#
# (OPTIONAL) Add local stuff here using +=
#
$(PGM): $(OBJS)
$(make-rel)
# the .rel file built here will be put into libbsp.a by ../wrapup/Makefile
all-local: $(ARCH) $(OBJS) $(PGM)
.PRECIOUS: $(PGM)
EXTRA_DIST = spinit.c
include $(top_srcdir)/../../../../../../automake/local.am

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/* Spurious_driver
*
* This routine installs spurious interrupt handlers for the mrm.
*
* Input parameters: NONE
*
* Output parameters: NONE
*
* COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#include <bsp.h>
#include <stdio.h>
const char * const _Spurious_Error_[] = {"Reset","Bus Error","Address Error",
"Illegal Instruction","Zero Division","CHK, CHK2 Instruction",
"TRAPcc, TRAPV Instruction","Privilege Violation","Trace",
"Line 1010 Emulation","Line 1111 Emulation","Hardware Breakpoint",
"Coprocessor Protocal Violation",
"Format Error ans Uninitialized Interrupt","Unassigned",
"Spurious Interrupt","AVec1","AVec2","AVec3","AVec4","AVec5","AVec6",
"AVec7","Trap Instruction","Debug","Reboot","Reserved Coprocessor",
"Reserved Unassigned","User Defined"};
rtems_isr Spurious_Isr(
rtems_vector_number vector
)
{
int sp = 0;
const char * const VectDescrip[] = {
_Spurious_Error_[0], _Spurious_Error_[0], _Spurious_Error_[1],
_Spurious_Error_[2], _Spurious_Error_[3], _Spurious_Error_[4],
_Spurious_Error_[5], _Spurious_Error_[6], _Spurious_Error_[7],
_Spurious_Error_[8], _Spurious_Error_[9], _Spurious_Error_[10],
_Spurious_Error_[11], _Spurious_Error_[12], _Spurious_Error_[13],
_Spurious_Error_[13], _Spurious_Error_[14], _Spurious_Error_[14],
_Spurious_Error_[14], _Spurious_Error_[14], _Spurious_Error_[14],
_Spurious_Error_[14], _Spurious_Error_[14], _Spurious_Error_[14],
_Spurious_Error_[15], _Spurious_Error_[16], _Spurious_Error_[17],
_Spurious_Error_[18], _Spurious_Error_[19], _Spurious_Error_[20],
_Spurious_Error_[21], _Spurious_Error_[22], _Spurious_Error_[23],
_Spurious_Error_[24], _Spurious_Error_[23], _Spurious_Error_[23],
_Spurious_Error_[23], _Spurious_Error_[23], _Spurious_Error_[23],
_Spurious_Error_[23], _Spurious_Error_[23], _Spurious_Error_[23],
_Spurious_Error_[23], _Spurious_Error_[23], _Spurious_Error_[23],
_Spurious_Error_[23], _Spurious_Error_[23], _Spurious_Error_[25],
_Spurious_Error_[26], _Spurious_Error_[26], _Spurious_Error_[26],
_Spurious_Error_[26], _Spurious_Error_[26], _Spurious_Error_[26],
_Spurious_Error_[26], _Spurious_Error_[26], _Spurious_Error_[26],
_Spurious_Error_[26], _Spurious_Error_[26], _Spurious_Error_[27],
_Spurious_Error_[27], _Spurious_Error_[27], _Spurious_Error_[27],
_Spurious_Error_[27], _Spurious_Error_[28]};
asm volatile ( "movea.l %%sp,%0 " : "=a" (sp) : "0" (sp) );
_CPU_ISR_Set_level( 7 );
_UART_flush();
RAW_PUTS("\n\rRTEMS: Spurious interrupt: ");
RAW_PUTS((char *)VectDescrip[( (vector>64) ? 64 : vector )]);
RAW_PUTS("\n\rRTEMS: Vector: ");
RAW_PUTI(vector);
RAW_PUTS(" sp: ");
RAW_PUTI(sp);
RAW_PUTS("\n\r");
bsp_cleanup();
/* BDM SIGEMT */
asm(" .word 0x4afa");
for(;;);
}
void Spurious_Initialize(void)
{
rtems_vector_number vector;
for ( vector = 0x0 ; vector <= 0xFF ; vector++ )
{
switch (vector)
{
case 4:
case 9:
case 31:
case 47:
case 66:
/* These vectors used by CPU32bug - don't overwrite them. */
break;
default:
(void) set_vector( Spurious_Isr, vector, 1 );
break;
}
}
}

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@@ -0,0 +1,2 @@
Makefile
Makefile.in

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@@ -0,0 +1,32 @@
##
## $Id$
##
AUTOMAKE_OPTIONS = foreign 1.4
PGM = $(ARCH)/start.o
C_FILES = start.c
C_O_FILES = $(C_FILES:%.c=$(ARCH)/%.o)
OBJS = $(C_O_FILES)
include $(RTEMS_ROOT)/make/custom/@RTEMS_BSP@.cfg
include $(top_srcdir)/../../../../../../automake/lib.am
#
# (OPTIONAL) Add local stuff here using +=
#
$(PROJECT_RELEASE)/lib/start$(LIB_VARIANT).o: $(PGM)
$(INSTALL_DATA) $< $@
TMPINSTALL_FILES += $(PROJECT_RELEASE)/lib/start$(LIB_VARIANT).o
all-local: $(ARCH) $(OBJS) $(PGM) $(TMPINSTALL_FILES)
.PRECIOUS: $(PGM)
EXTRA_DIST = start.c
include $(top_srcdir)/../../../../../../automake/local.am

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@@ -0,0 +1,259 @@
/*
* $Id
*/
#include <mrm332.h>
#include <sim.h>
#define __START_C__
#include "bsp.h"
m68k_isr_entry M68Kvec[256];
m68k_isr_entry vectors[256];
char * const __argv[]= {"main", ""};
void boot_card(int argc, char * const argv[]);
/*
* This prototype really should have the noreturn attribute but
* that causes a warning. Not sure how to fix that.
*/
/* void dumby_start () __attribute__ ((noreturn)); */
void dumby_start ();
void dumby_start() {
/* Put the header necessary for the modified CPU32bug to automatically
start up rtems: */
asm volatile ( ".long 0xbeefbeef ;
.long 0 ;
.long start");
/* We need to by-pass the link instruction since the RAM chip-
select pins are not yet configured. */
asm volatile ( ".global start ;
start:");
/* disable interrupts, copy CPU32bug vectors, load stack pointer */
asm volatile ( "oriw #0x0700, %sr;
movel #end, %d0;
addl #_StackSize,%d0;
movel %d0,%sp;
movel %d0,%a6"
);
/* include in ram_init.S */
/*
* Initalize the SIM module.
* The stack pointer is not usable until the RAM chip select lines
* are configured. The following code must remain inline.
*/
/* Module Configuration Register */
/* see section(s) 3.1.3-3.1.6 of the SIM Reference Manual */
*SIMCR = (unsigned short int)
(FRZSW | SAM(0,8,SHEN) | (MM*SIM_MM) | SAM(SIM_IARB,0,IARB));
/* Synthesizer Control Register */
/* see section(s) 4.8 */
/* end include in ram_init.S */
*SYNCR = (unsigned short int)
( SAM(MRM_W,15,VCO) | SAM(0x0,14,PRESCALE) | SAM(MRM_Y,8,COUNTER) );
while (! (*SYNCR & SLOCK)); /* protect from clock overshoot */
/* include in ram_init.S */
*SYNCR = (unsigned short int)
( SAM(MRM_W,15,VCO) | SAM(MRM_X,14,PRESCALE) | SAM(MRM_Y,8,COUNTER) );
/* System Protection Control Register */
/* !!! can only write to once after reset !!! */
/* see section 3.8.4 of the SIM Reference Manual */
*SYPCR = (unsigned char)( HME | BME );
/* Periodic Interrupr Control Register */
/* see section 3.8.2 of the SIM Reference Manual */
*PICR = (unsigned short int)
( SAM(0,8,PIRQL) | SAM(MRM_PIV,0,PIV) );
/* ^^^ zero disables interrupt, don't enable here or ram_init will
be wrong. It's enabled below. */
/* Periodic Interrupt Timer Register */
/* see section 3.8.3 of the SIM Reference Manual */
*PITR = (unsigned short int)( SAM(0x09,0,PITM) );
/* 1.098mS interrupt, assuming 32.768 KHz input clock */
/* Port C Data */
/* load values before enabled */
*PORTC = (unsigned char) 0x0;
#if 0
/* Don't touch these on MRM, they are set up by CPU32bug at boot time. */
/* Chip-Select Base Address Register */
/* see section 7 of the SIM Reference Manual */
*CSBARBT = (unsigned short int)
(((0x000000 >> 8)&0xfff8) | BS_512K ); /* 512k bytes located at 0x0000 */
*CSBAR0 = (unsigned short int)
(((0x000000 >> 8)&0xfff8) | BS_1M ); /* 1M bytes located at 0x0000 */
*CSBAR1 = (unsigned short int)
(((0x080000 >> 8)&0xfff8) | BS_256K ); /* 256k bytes located at 0x80000 */
*CSBAR2 = (unsigned short int)
(((0x080000 >> 8)&0xfff8) | BS_256K ); /* 256k bytes located at 0x80000 */
*CSBAR3 = (unsigned short int)
(((0x0C0000 >> 8)&0xfff8) | BS_256K ); /* 256k bytes located at 0xC0000 */
*CSBAR4 = (unsigned short int)
(((0x0C0000 >> 8)&0xfff8) | BS_256K ); /* 256k bytes located at 0xC0000 */
*CSBAR5 = (unsigned short int)
(0xfff8 | BS_64K); /* AVEC interrupts */
#if 0
#ifdef EFI332_v040b
*CSBAR6 = (unsigned short int)
(((0x000000 >> 8)&0xfff8) | BS_512K ); /* 512k bytes located at 0x0000 */
*CSBAR8 = (unsigned short int) /* PCMCIA IOCS */
(((0x0c0000 >> 8)&0xfff8) | BS_64K ); /* 64k bytes located at 0xc0000 */
*CSBAR9 = (unsigned short int) /* PCMCIA MEMCS */
(((0x0D0000 >> 8)&0xfff8) | BS_64K ); /* 64k bytes located at 0xd0000 */
#else /* EFI332_v040b */
*CSBAR10 = (unsigned short int)
(((0x000000 >> 8)&0xfff8) | BS_512K ); /* 512k bytes located at 0x0000 */
#endif /* EFI332_v040b */
#endif
/* Chip-Select Options Registers */
/* see section 7 of the SIM Reference Manual */
#ifdef FLASHWRITE
*CSORBT = (unsigned short int)
( BothBytes | ReadWrite | SyncAS | WaitStates_0 | UserSupSpace );
#else /* FLASHWRITE */
*CSORBT = (unsigned short int)
( BothBytes | ReadOnly | SyncAS | WaitStates_0 | UserSupSpace );
#endif /* FLASHWRITE */
*CSOR0 = (unsigned short int)
( BothBytes | ReadOnly | SyncAS | External | UserSupSpace );
*CSOR1 = (unsigned short int)
( LowerByte | ReadWrite | SyncAS | FastTerm | UserSupSpace );
*CSOR2 = (unsigned short int)
( UpperByte | ReadWrite | SyncAS | FastTerm | UserSupSpace );
*CSOR3 = (unsigned short int)
( LowerByte | ReadWrite | SyncAS | FastTerm | UserSupSpace );
*CSOR4 = (unsigned short int)
( UpperByte | ReadWrite | SyncAS | FastTerm | UserSupSpace );
*CSOR5 = (unsigned short int)
( BothBytes | ReadWrite | SyncAS | CPUSpace | IPLevel_any | AVEC );
#if 0
#ifdef EFI332_v040b
*CSOR6 = (unsigned short int)
( BothBytes | ReadOnly | SyncAS | External | UserSupSpace );
*CSOR8 = (unsigned short int)
( BothBytes | ReadWrite | SyncAS | External | UserSupSpace );
*CSOR9 = (unsigned short int)
( BothBytes | ReadWrite | SyncAS | External | UserSupSpace );
#else /* EFI332_v040b */
*CSOR10 = (unsigned short int)
( BothBytes | ReadOnly | SyncAS | External | UserSupSpace );
#endif /* EFI332_v040b */
#endif
/* Chip Select Pin Assignment Register 0 */
/* see section 7 of the SIM Reference Manual */
*CSPAR0 = (unsigned short int)(
SAM(DisOut,CS_5,0x3000) | /* AVEC (internally) */
SAM(CS16bit,CS_4,0x0c00) | /* RAM UDS, bank2 */
SAM(CS16bit,CS_3,0x0300) | /* RAM LDS, bank2 */
SAM(CS16bit,CS_2,0x00c0)| /* RAM UDS, bank1 */
SAM(CS16bit,CS_1,0x0030)| /* RAM LDS, bank1 */
SAM(CS16bit,CS_0,0x000c)| /* W/!R */
SAM(CS16bit,CSBOOT,0x0003) /* ROM CS */
);
/* Chip Select Pin Assignment Register 1 */
/* see section 7 of the SIM Reference Manual */
#ifdef EFI332_v040b
*CSPAR1 = (unsigned short int)(
SAM(DisOut,CS_10,0x300)| /* ECLK */
SAM(CS16bit,CS_9,0x0c0) | /* PCMCIA MEMCS */
SAM(CS16bit,CS_8,0x030) | /* PCMCIA IOCS */
SAM(DisOut,CS_7,0x00c) | /* PC4 */
SAM(CS16bit,CS_6,0x003) /* ROM !OE */
);
#else /* EFI332_v040b */
*CSPAR1 = (unsigned short int)(
SAM(CS16bit,CS_10,0x300)| /* ROM !OE */
SAM(DisOut,CS_9,0x0c0) | /* PC6 */
SAM(DisOut,CS_8,0x030) | /* PC5 */
SAM(DisOut,CS_7,0x00c) | /* PC4 */
SAM(DisOut,CS_6,0x003) /* PC3 */
);
#endif /* EFI332_v040b */
#endif /* Don't touch on MRM */
/* Port E and F Data Register */
/* see section 9 of the SIM Reference Manual */
*PORTE0 = (unsigned char) 0;
*PORTF0 = (unsigned char) 0;
/* Port E and F Data Direction Register */
/* see section 9 of the SIM Reference Manual */
*DDRE = (unsigned char) 0xff;
*DDRF = (unsigned char) 0xfd;
/* Port E and F Pin Assignment Register */
/* see section 9 of the SIM Reference Manual */
*PEPAR = (unsigned char) 0;
*PFPAR = (unsigned char) 0;
/* end of SIM initalization code */
/* end include in ram_init.S */
/*
* Initialize RAM by copying the .data section out of ROM (if
* needed) and "zero-ing" the .bss section.
*/
{
register char *src = _etext;
register char *dst = _copy_start;
if (_copy_data_from_rom)
/* ROM has data at end of text; copy it. */
while (dst < _edata)
*dst++ = *src++;
/* Zero bss */
for (dst = _clear_start; dst< end; dst++)
{
*dst = 0;
}
}
/*
* Initialize vector table.
*/
{
m68k_isr_entry *monitors_vector_table;
m68k_get_vbr(monitors_vector_table);
M68Kvec[ 4 ] = monitors_vector_table[ 4 ]; /* breakpoints vector */
M68Kvec[ 9 ] = monitors_vector_table[ 9 ]; /* trace vector */
M68Kvec[ 31 ] = monitors_vector_table[ 31 ]; /* level 7 interrupt */
M68Kvec[ 47 ] = monitors_vector_table[ 47 ]; /* system call vector */
M68Kvec[ 66 ] = monitors_vector_table[ 66 ]; /* user defined */
m68k_set_vbr(&M68Kvec);
}
/*
* Initalize the board.
*/
Spurious_Initialize();
console_init();
/*
* Execute main with arguments argc and agrv.
*/
boot_card(1,__argv);
reboot();
}

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@@ -0,0 +1,2 @@
Makefile
Makefile.in

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@@ -0,0 +1,55 @@
##
## $Id$
##
AUTOMAKE_OPTIONS = foreign 1.4
VPATH = @srcdir@:@srcdir@/../../shared:@srcdir@/../../../shared
PGM = $(ARCH)/startup.rel
C_FILES = bsplibc.c bsppost.c bspstart.c bspclean.c bootcard.c \
m68kpretaskinghook.c main.c sbrk.c setvec.c gnatinstallhandler.c
C_O_FILES = $(C_FILES:%.c=$(ARCH)/%.o)
S_FILES = except_vect_332_ROM.S
S_O_FILES = $(S_FILES:%.S=$(ARCH)/%.o)
OBJS = $(C_O_FILES) $(S_O_FILES)
include $(RTEMS_ROOT)/make/custom/@RTEMS_BSP@.cfg
include $(top_srcdir)/../../../../../../automake/lib.am
#
# (OPTIONAL) Add local stuff here using +=
#
# USE_INIT_FINI tells main.c what C++ help we need.
AM_CPPFLAGS += -DUSE_INIT_FINI
$(PGM): $(OBJS)
$(make-rel)
$(PROJECT_RELEASE)/lib/linkcmds: linkcmds
$(INSTALL_DATA) $< $@
$(PROJECT_RELEASE)/lib/linkcmds_ROM: linkcmds_ROM
$(INSTALL_DATA) $< $@
$(PROJECT_RELEASE)/lib/except_vect_332_ROM$(LIB_VARIANT).o: \
$(ARCH)/except_vect_332_ROM.o
$(INSTALL_DATA) $< $@
# the .rel file built here will be put into libbsp.a by ../wrapup/Makefile
TMPINSTALL_FILES += $(PROJECT_RELEASE)/lib/linkcmds \
$(PROJECT_RELEASE)/lib/linkcmds_ROM \
$(PROJECT_RELEASE)/lib/except_vect_332_ROM$(LIB_VARIANT).o
all-local: $(ARCH) $(OBJS) $(PGM) $(TMPINSTALL_FILES)
.PRECIOUS: $(PGM)
EXTRA_DIST = bspclean.c bspstart.c except_vect_332_ROM.S linkcmds \
linkcmds_ROM
include $(top_srcdir)/../../../../../../automake/local.am

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@@ -0,0 +1,27 @@
/* bsp_cleanup()
*
* This routine cleans up in the sense that it places the board
* in a safe state and flushes the I/O buffers before exiting.
*
* INPUT: NONE
*
* OUTPUT: NONE
*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#include <bsp.h>
void bsp_cleanup(void)
{
/* interrupt driven stdio must be flushed */
_CPU_ISR_Set_level( 7 );
_UART_flush();
}

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@@ -0,0 +1,72 @@
/*
* This routine starts the application. It includes application,
* board, and monitor specific initialization and configuration.
* The generic CPU dependent initialization has been performed
* before this routine is invoked.
*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#include <bsp.h>
#include <rtems/libio.h>
#include <libcsupport.h>
#include <string.h>
/*
* The original table from the application and our copy of it with
* some changes.
*/
extern rtems_configuration_table Configuration;
rtems_configuration_table BSP_Configuration;
rtems_cpu_table Cpu_table;
char *rtems_progname;
/*
* Use the shared implementations of the following routines
*/
void bsp_postdriver_hook(void);
void bsp_libc_init( void *, unsigned32, int );
void bsp_pretasking_hook(void); /* m68k version */
/*
* bsp_start
*
* This routine does the bulk of the system initialization.
*/
void bsp_start( void )
{
void *vbr;
extern void *_WorkspaceBase;
extern void *_RamSize;
extern unsigned long _M68k_Ramsize;
_M68k_Ramsize = (unsigned long)&_RamSize; /* RAM size set in linker script */
/*
* we only use a hook to get the C library initialized.
*/
Cpu_table.pretasking_hook = bsp_pretasking_hook;
Cpu_table.postdriver_hook = bsp_postdriver_hook;
m68k_get_vbr( vbr );
Cpu_table.interrupt_vector_table = vbr;
BSP_Configuration.work_space_start = (void *) &_WorkspaceBase;
/* Clock_exit is done as an atexit() function */
}

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/*
* $Id$
*/
/* Exception Vector definitions follow */
/* !!! Warning !!! This table is not tested, and
the user must make sure it is complete. */
/* If we use TRAP #15 for reboot, note that group 0 and 1 exceptions
will have priority. */
/* This is the "magic word" that CPU32bug uses to indicate that
there is a bootable image here. */
.long 0xBEEFBEEF
/* Vector 0: RESET: Initial SSP */
.long _RamEnd
/* Vector 1: RESET: Initial PC */
.long start
/* default action for undefined vectors is to re-boot */
/* Note group 0 and 1 exception (like trace) have priority
over other exceptions (like trap #15) that may call this. */
/* Vectors 2-255 */
.long reboot /* exception vector: 2 */
.long reboot /* exception vector: 3 */
.long reboot /* exception vector: 4 */
.long reboot /* exception vector: 5 */
.long reboot /* exception vector: 6 */
.long reboot /* exception vector: 7 */
.long reboot /* exception vector: 8 */
.long reboot /* exception vector: 9 */
.long reboot /* exception vector: 10 */
.long reboot /* exception vector: 11 */
.long reboot /* exception vector: 12 */
.long reboot /* exception vector: 13 */
.long reboot /* exception vector: 14 */
.long reboot /* exception vector: 15 */
.long reboot /* exception vector: 16 */
.long reboot /* exception vector: 17 */
.long reboot /* exception vector: 18 */
.long reboot /* exception vector: 19 */
.long reboot /* exception vector: 20 */
.long reboot /* exception vector: 21 */
.long reboot /* exception vector: 22 */
.long reboot /* exception vector: 23 */
.long reboot /* exception vector: 24 */
.long reboot /* exception vector: 25 */
.long reboot /* exception vector: 26 */
.long reboot /* exception vector: 27 */
.long reboot /* exception vector: 28 */
.long reboot /* exception vector: 29 */
.long reboot /* exception vector: 30 */
.long reboot /* exception vector: 31 */
.long reboot /* exception vector: 32 */
.long reboot /* exception vector: 33 */
.long reboot /* exception vector: 34 */
.long reboot /* exception vector: 35 */
.long reboot /* exception vector: 36 */
.long reboot /* exception vector: 37 */
.long reboot /* exception vector: 38 */
.long reboot /* exception vector: 39 */
.long reboot /* exception vector: 40 */
.long reboot /* exception vector: 41 */
.long reboot /* exception vector: 42 */
.long reboot /* exception vector: 43 */
.long reboot /* exception vector: 44 */
.long reboot /* exception vector: 45 */
.long reboot /* exception vector: 46 */
.long _reboot /* the reboot trap: 47 */
.long reboot /* exception vector: 48 */
.long reboot /* exception vector: 49 */
.long reboot /* exception vector: 50 */
.long reboot /* exception vector: 51 */
.long reboot /* exception vector: 52 */
.long reboot /* exception vector: 53 */
.long reboot /* exception vector: 54 */
.long reboot /* exception vector: 55 */
.long reboot /* exception vector: 56 */
.long reboot /* exception vector: 57 */
.long reboot /* exception vector: 58 */
.long reboot /* exception vector: 59 */
.long reboot /* exception vector: 60 */
.long reboot /* exception vector: 61 */
.long reboot /* exception vector: 62 */
.long reboot /* exception vector: 63 */
.long reboot /* exception vector: 64 */
.long reboot /* exception vector: 65 */
.long reboot /* exception vector: 66 */
.long reboot /* exception vector: 67 */
.long reboot /* exception vector: 68 */
.long reboot /* exception vector: 69 */
.long reboot /* exception vector: 70 */
.long reboot /* exception vector: 71 */
.long reboot /* exception vector: 72 */
.long reboot /* exception vector: 73 */
.long reboot /* exception vector: 74 */
.long reboot /* exception vector: 75 */
.long reboot /* exception vector: 76 */
.long reboot /* exception vector: 77 */
.long reboot /* exception vector: 78 */
.long reboot /* exception vector: 79 */
.long reboot /* exception vector: 80 */
.long reboot /* exception vector: 81 */
.long reboot /* exception vector: 82 */
.long reboot /* exception vector: 83 */
.long reboot /* exception vector: 84 */
.long reboot /* exception vector: 85 */
.long reboot /* exception vector: 86 */
.long reboot /* exception vector: 87 */
.long reboot /* exception vector: 88 */
.long reboot /* exception vector: 89 */
.long reboot /* exception vector: 90 */
.long reboot /* exception vector: 91 */
.long reboot /* exception vector: 92 */
.long reboot /* exception vector: 93 */
.long reboot /* exception vector: 94 */
.long reboot /* exception vector: 95 */
.long reboot /* exception vector: 96 */
.long reboot /* exception vector: 97 */
.long reboot /* exception vector: 98 */
.long reboot /* exception vector: 99 */
.long reboot /* exception vector: 100 */
.long reboot /* exception vector: 101 */
.long reboot /* exception vector: 102 */
.long reboot /* exception vector: 103 */
.long reboot /* exception vector: 104 */
.long reboot /* exception vector: 105 */
.long reboot /* exception vector: 106 */
.long reboot /* exception vector: 107 */
.long reboot /* exception vector: 108 */
.long reboot /* exception vector: 109 */
.long reboot /* exception vector: 110 */
.long reboot /* exception vector: 111 */
.long reboot /* exception vector: 112 */
.long reboot /* exception vector: 113 */
.long reboot /* exception vector: 114 */
.long reboot /* exception vector: 115 */
.long reboot /* exception vector: 116 */
.long reboot /* exception vector: 117 */
.long reboot /* exception vector: 118 */
.long reboot /* exception vector: 119 */
.long reboot /* exception vector: 120 */
.long reboot /* exception vector: 121 */
.long reboot /* exception vector: 122 */
.long reboot /* exception vector: 123 */
.long reboot /* exception vector: 124 */
.long reboot /* exception vector: 125 */
.long reboot /* exception vector: 126 */
.long reboot /* exception vector: 127 */
.long reboot /* exception vector: 128 */
.long reboot /* exception vector: 129 */
.long reboot /* exception vector: 130 */
.long reboot /* exception vector: 131 */
.long reboot /* exception vector: 132 */
.long reboot /* exception vector: 133 */
.long reboot /* exception vector: 134 */
.long reboot /* exception vector: 135 */
.long reboot /* exception vector: 136 */
.long reboot /* exception vector: 137 */
.long reboot /* exception vector: 138 */
.long reboot /* exception vector: 139 */
.long reboot /* exception vector: 140 */
.long reboot /* exception vector: 141 */
.long reboot /* exception vector: 142 */
.long reboot /* exception vector: 143 */
.long reboot /* exception vector: 144 */
.long reboot /* exception vector: 145 */
.long reboot /* exception vector: 146 */
.long reboot /* exception vector: 147 */
.long reboot /* exception vector: 148 */
.long reboot /* exception vector: 149 */
.long reboot /* exception vector: 150 */
.long reboot /* exception vector: 151 */
.long reboot /* exception vector: 152 */
.long reboot /* exception vector: 153 */
.long reboot /* exception vector: 154 */
.long reboot /* exception vector: 155 */
.long reboot /* exception vector: 156 */
.long reboot /* exception vector: 157 */
.long reboot /* exception vector: 158 */
.long reboot /* exception vector: 159 */
.long reboot /* exception vector: 160 */
.long reboot /* exception vector: 161 */
.long reboot /* exception vector: 162 */
.long reboot /* exception vector: 163 */
.long reboot /* exception vector: 164 */
.long reboot /* exception vector: 165 */
.long reboot /* exception vector: 166 */
.long reboot /* exception vector: 167 */
.long reboot /* exception vector: 168 */
.long reboot /* exception vector: 169 */
.long reboot /* exception vector: 170 */
.long reboot /* exception vector: 171 */
.long reboot /* exception vector: 172 */
.long reboot /* exception vector: 173 */
.long reboot /* exception vector: 174 */
.long reboot /* exception vector: 175 */
.long reboot /* exception vector: 176 */
.long reboot /* exception vector: 177 */
.long reboot /* exception vector: 178 */
.long reboot /* exception vector: 179 */
.long reboot /* exception vector: 180 */
.long reboot /* exception vector: 181 */
.long reboot /* exception vector: 182 */
.long reboot /* exception vector: 183 */
.long reboot /* exception vector: 184 */
.long reboot /* exception vector: 185 */
.long reboot /* exception vector: 186 */
.long reboot /* exception vector: 187 */
.long reboot /* exception vector: 188 */
.long reboot /* exception vector: 189 */
.long reboot /* exception vector: 190 */
.long reboot /* exception vector: 191 */
.long reboot /* exception vector: 192 */
.long reboot /* exception vector: 193 */
.long reboot /* exception vector: 194 */
.long reboot /* exception vector: 195 */
.long reboot /* exception vector: 196 */
.long reboot /* exception vector: 197 */
.long reboot /* exception vector: 198 */
.long reboot /* exception vector: 199 */
.long reboot /* exception vector: 200 */
.long reboot /* exception vector: 201 */
.long reboot /* exception vector: 202 */
.long reboot /* exception vector: 203 */
.long reboot /* exception vector: 204 */
.long reboot /* exception vector: 205 */
.long reboot /* exception vector: 206 */
.long reboot /* exception vector: 207 */
.long reboot /* exception vector: 208 */
.long reboot /* exception vector: 209 */
.long reboot /* exception vector: 210 */
.long reboot /* exception vector: 211 */
.long reboot /* exception vector: 212 */
.long reboot /* exception vector: 213 */
.long reboot /* exception vector: 214 */
.long reboot /* exception vector: 215 */
.long reboot /* exception vector: 216 */
.long reboot /* exception vector: 217 */
.long reboot /* exception vector: 218 */
.long reboot /* exception vector: 219 */
.long reboot /* exception vector: 220 */
.long reboot /* exception vector: 221 */
.long reboot /* exception vector: 222 */
.long reboot /* exception vector: 223 */
.long reboot /* exception vector: 224 */
.long reboot /* exception vector: 225 */
.long reboot /* exception vector: 226 */
.long reboot /* exception vector: 227 */
.long reboot /* exception vector: 228 */
.long reboot /* exception vector: 229 */
.long reboot /* exception vector: 230 */
.long reboot /* exception vector: 231 */
.long reboot /* exception vector: 232 */
.long reboot /* exception vector: 233 */
.long reboot /* exception vector: 234 */
.long reboot /* exception vector: 235 */
.long reboot /* exception vector: 236 */
.long reboot /* exception vector: 237 */
.long reboot /* exception vector: 238 */
.long reboot /* exception vector: 239 */
.long reboot /* exception vector: 240 */
.long reboot /* exception vector: 241 */
.long reboot /* exception vector: 242 */
.long reboot /* exception vector: 243 */
.long reboot /* exception vector: 244 */
.long reboot /* exception vector: 245 */
.long reboot /* exception vector: 246 */
.long reboot /* exception vector: 247 */
.long reboot /* exception vector: 248 */
.long reboot /* exception vector: 249 */
.long reboot /* exception vector: 250 */
.long reboot /* exception vector: 251 */
.long reboot /* exception vector: 252 */
.long reboot /* exception vector: 253 */
.long reboot /* exception vector: 254 */
.long reboot /* exception vector: 255 */
_reboot:
move #0x2700,%sr /* mask interrupts */
movea.l (0x0).w,%a7 /* load stack */
movea.l (0x4).w,%a0 /* jmp to location of reset vector */
jmp (%a0)
reboot:
trap #15 /* use trap exception to enter supervisor
state. Trace mode ( and other group 0
and 1 exceptions) *could* screw this up if
not vectored to reboot or did not return. */

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@@ -0,0 +1,153 @@
/* linkcmds
*
* $Id$
*/
OUTPUT_ARCH(m68k)
__DYNAMIC = 0;
/*
* The memory map looks like this:
* +--------------------+ <- low memory
* | .text |
* | etext |
* | ctor list | the ctor and dtor lists are for
* | dtor list | C++ support
* | _endtext |
* +--------------------+
* | .data | initialized data goes here
* | _sdata |
* | _edata |
* +--------------------+
* | .bss |
* | _clear_start| start of bss, cleared by crt0
* | _end | start of heap, used by sbrk()
* +--------------------+
* | heap space |
* | _ENDHEAP |
* | stack space |
* | __stack | top of stack
* +--------------------+ <- high memory
*/
/*
* Declare some sizes.
*/
_RamBase = DEFINED(_RamBase) ? _RamBase : 0x03000;
_RamSize = DEFINED(_RamSize) ? _RamSize : 0x80000;
_RamEnd = _RamBase + _RamSize;
_HeapSize = DEFINED(_HeapSize) ? _HeapSize : 0x10000;
_StackSize = DEFINED(_StackSize) ? _StackSize : 0x1000;
MEMORY
{
ram : ORIGIN = 0x03000, LENGTH = 0x7d000
}
_copy_data_from_rom = 0;
/*
* stick everything in ram (of course)
*/
SECTIONS
{
ram : {
. = .;
} >ram
/*
* Text, data and bss segments
*/
.text : {
*(.text)
/*
* C++ constructors/destructors
*/
*(.gnu.linkonce.t.*)
/*
* Initialization and finalization code.
*
* Various files can provide initialization and finalization
* functions. crtbegin.o and crtend.o are two instances. The
* body of these functions are in .init and .fini sections. We
* accumulate the bodies here, and prepend function prologues
* from crti.o and function epilogues from crtn.o. crti.o must
* be linked first; crtn.o must be linked last. Because these
* are wildcards, it doesn't matter if the user does not
* actually link against crti.o and crtn.o; the linker won't
* look for a file to match a wildcard. The wildcard also
* means that it doesn't matter which directory crti.o and
* crtn.o are in.
*/
PROVIDE (_init = .);
*crti.o(.init)
*(.init)
*crtn.o(.init)
PROVIDE (_fini = .);
*crti.o(.fini)
*(.fini)
*crtn.o(.fini)
/*
* C++ constructors/destructors
*
* gcc uses crtbegin.o to find the start of the constructors
* and destructors so we make sure it is first. Because this
* is a wildcard, it doesn't matter if the user does not
* actually link against crtbegin.o; the linker won't look for
* a file to match a wildcard. The wildcard also means that
* it doesn't matter which directory crtbegin.o is in. The
* constructor and destructor list are terminated in
* crtend.o. The same comments apply to it.
*/
. = ALIGN (16);
*crtbegin.o(.ctors)
*(.ctors)
*crtend.o(.ctors)
*crtbegin.o(.dtors)
*(.dtors)
*crtend.o(.dtors)
/*
* Exception frame info
*/
. = ALIGN (16);
*(.eh_frame)
/*
* Read-only data
*/
. = ALIGN (16);
_rodata_start = . ;
*(.rodata)
*(.gnu.linkonce.r*)
. = ALIGN (16);
PROVIDE (_etext = .);
} >ram
.data : {
PROVIDE (_copy_start = .);
*(.data)
*(.gnu.linkonce.d*)
*(.gcc_except_table)
. = ALIGN (16);
PROVIDE (_edata = .);
PROVIDE (_copy_end = .);
} >ram
.bss : {
_clear_start = .;
*(.bss)
*(COMMON)
. = ALIGN (16);
PROVIDE (end = .);
. += _StackSize;
. = ALIGN (16);
_stack_init = .;
_clear_end = .;
_WorkspaceBase = .;
} >ram
}

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@@ -0,0 +1,163 @@
/* linkcmds
*
* $Id$
*/
OUTPUT_ARCH(m68k)
STARTUP(except_vect_332_ROM.o)
__DYNAMIC = 0;
/*
* ROM:
* +--------------------+ <- low memory
* | .text |
* | etext |
* | ctor list | the ctor and dtor lists are for
* | dtor list | C++ support
* | _endtext |
* | temporary .data | .data is moved to RAM by crt0
* | |
* +--------------------+ <- high memory
*
*
* RAM:
* +--------------------+ <- low memory
* | .data | initialized data goes here
* | _sdata |
* | _edata |
* +--------------------+
* | .bss |
* | __bss_start | start of bss, cleared by crt0
* | _end | start of heap, used by sbrk()
* +--------------------+
* | heap space |
* | _ENDHEAP |
* | stack space |
* | __stack | top of stack
* +--------------------+ <- high memory
*/
MEMORY
{
rom : ORIGIN = 0x90000, LENGTH = 0x70000
ram : ORIGIN = 0x03000, LENGTH = 0x7d000
}
_RamBase = DEFINED(_RamBase) ? _RamBase : 0x003000;
_RamSize = DEFINED(_RamSize) ? _RamSize : 0x7d000;
_RamEnd = _RamBase + _RamSize;
__end_of_ram = 0x080000;
_copy_data_from_rom = 1;
_HeapSize = DEFINED(_HeapSize) ? _HeapSize : 0x10000;
_StackSize = DEFINED(_StackSize) ? _StackSize : 0x1000;
/*
*
*/
SECTIONS
{
.text :
{
. = .;
CREATE_OBJECT_SYMBOLS
text_start = .;
_text_start = .;
*(.text)
. = ALIGN (16);
/*
* Initialization and finalization code.
*
* Various files can provide initialization and finalization
* functions. crtbegin.o and crtend.o are two instances. The
* body of these functions are in .init and .fini sections. We
* accumulate the bodies here, and prepend function prologues
* from crti.o and function epilogues from crtn.o. crti.o must
* be linked first; crtn.o must be linked last. Because these
* are wildcards, it doesn't matter if the user does not
* actually link against crti.o and crtn.o; the linker won't
* look for a file to match a wildcard. The wildcard also
* means that it doesn't matter which directory crti.o and
* crtn.o are in.
*/
PROVIDE (_init = .);
*crti.o(.init)
*(.init)
*crtn.o(.init)
PROVIDE (_fini = .);
*crti.o(.fini)
*(.fini)
*crtn.o(.fini)
*(.eh_fram)
. = ALIGN (16);
/*
* Read-only data
*/
. = ALIGN (16);
_rodata_start = . ;
*(.rodata)
*(.gnu.linkonce.r*)
etext = ALIGN(0x10);
__CTOR_LIST__ = .;
LONG((__CTOR_END__ - __CTOR_LIST__) / 4 - 2)
*(.ctors)
LONG(0)
__CTOR_END__ = .;
__DTOR_LIST__ = .;
LONG((__DTOR_END__ - __DTOR_LIST__) / 4 - 2)
*(.dtors)
LONG(0)
__DTOR_END__ = .;
*(.lit)
*(.shdata)
_etext = .;
_endtext = .;
} > rom
.gcc_exc :
AT ( ADDR(.text) + SIZEOF( .text ) )
{
*(.gcc_exc)
} > ram
.data :
{
data_start = .;
_data_start = .;
_copy_start = .;
_sdata = . ;
*(.data)
CONSTRUCTORS
edata = ALIGN(0x10);
_edata = .;
} > ram
.shbss :
{
*(.shbss)
} > ram
.bss :
{
__bss_start = ALIGN(0x8);
bss_start = .;
_bss_start = .;
_clear_start = .;
*(.bss)
*(COMMON)
end = .;
_end = ALIGN(0x8);
__end = ALIGN(0x8);
_WorkspaceBase = . + _StackSize;
} > ram
.stab . (NOLOAD) :
{
[ .stab ]
}
.stabstr . (NOLOAD) :
{
[ .stabstr ]
}
}

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@@ -0,0 +1,2 @@
Makefile
Makefile.in

View File

@@ -0,0 +1,32 @@
##
## $Id$
##
AUTOMAKE_OPTIONS = foreign 1.4
PGM = $(ARCH)/timer.rel
C_FILES = timer.c
C_O_FILES = $(C_FILES:%.c=$(ARCH)/%.o)
OBJS = $(C_O_FILES)
include $(RTEMS_ROOT)/make/custom/@RTEMS_BSP@.cfg
include $(top_srcdir)/../../../../../../automake/lib.am
#
# (OPTIONAL) Add local stuff here using +=
#
$(PGM): $(OBJS)
$(make-rel)
# the .rel file built here will be put into libbsp.a by ../wrapup/Makefile
all-local: $(ARCH) $(OBJS) $(PGM)
.PRECIOUS: $(PGM)
EXTRA_DIST = timer.c
include $(top_srcdir)/../../../../../../automake/local.am

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@@ -0,0 +1,83 @@
/* Timer_init()
*
* This routine initializes a timer in efi68k's DP8570A TCP
*
* Input parameters: NONE
*
* Output parameters: NONE
*
* NOTE: It is important that the timer start/stop overhead be
* determined when porting or modifying this code.
*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#include <bsp.h>
rtems_boolean Timer_driver_Find_average_overhead;
extern rtems_isr Clock_isr();
void Timer_initialize( void )
{
}
/*
* The following controls the behavior of Read_timer().
*
* FIND_AVG_OVERHEAD * instructs the routine to return the "raw" count.
*
* AVG_OVEREHAD is the overhead for starting and stopping the timer. It
* is usually deducted from the number returned.
*
* LEAST_VALID is the lowest number this routine should trust. Numbers
* below this are "noise" and zero is returned.
*/
#define AVG_OVERHEAD 0 /* It typically takes X.X microseconds */
/* (Y countdowns) to start/stop the timer. */
/* This value is in microseconds. */
#define LEAST_VALID 1 /* Don't trust a clicks value lower than this */
/*
* Return timer value in 1/2-microsecond units
*/
int Read_timer( void )
{
rtems_unsigned32 total;
total = 0;
if ( Timer_driver_Find_average_overhead == 1 )
return total; /* in XXX microsecond units */
if ( total < LEAST_VALID )
return 0; /* below timer resolution */
return (total - AVG_OVERHEAD);
}
/*
* Empty function call used in loops to measure basic cost of looping
* in Timing Test Suite.
*/
rtems_status_code Empty_function(void)
{
return RTEMS_SUCCESSFUL;
}
void Set_find_average_overhead(
rtems_boolean find_flag
)
{
Timer_driver_Find_average_overhead = find_flag;
}

View File

@@ -0,0 +1,195 @@
#
# Timing Test Suite Results for the EFI332 BSP
#
# $Id$
#
NOTE: This BSP is used submitted and no information is currently available.
TBD: MATT - update this with real times!
Board: EFI332
CPU: 68332
Clock Speed: 20 Mhz
Memory Configuration: SRAM, DRAM, cache, etc
Wait States:
Times Reported in: cycles, microseconds, etc
Timer Source: Count Down Timer, on-CPU cycle counter, etc
Column A: unused
Column B: unused
# DESCRIPTION A B
== ================================================================= ==== ====
1 rtems_semaphore_create 20
rtems_semaphore_delete 21
rtems_semaphore_obtain: available 15
rtems_semaphore_obtain: not available -- NO_WAIT 15
rtems_semaphore_release: no waiting tasks 16
2 rtems_semaphore_obtain: not available -- caller blocks 62
3 rtems_semaphore_release: task readied -- preempts caller 55
4 rtems_task_restart: blocked task -- preempts caller 77
rtems_task_restart: ready task -- preempts caller 70
rtems_semaphore_release: task readied -- returns to caller 25
rtems_task_create 57
rtems_task_start 31
rtems_task_restart: suspended task -- returns to caller 36
rtems_task_delete: suspended task 47
rtems_task_restart: ready task -- returns to caller 37
rtems_task_restart: blocked task -- returns to caller 46
rtems_task_delete: blocked task 50
5 rtems_task_suspend: calling task 51
rtems_task_resume: task readied -- preempts caller 49
6 rtems_task_restart: calling task 59
rtems_task_suspend: returns to caller 18
rtems_task_resume: task readied -- returns to caller 19
rtems_task_delete: ready task 50
7 rtems_task_restart: suspended task -- preempts caller 70
8 rtems_task_set_priority: obtain current priority 12
rtems_task_set_priority: returns to caller 27
rtems_task_mode: obtain current mode 5
rtems_task_mode: no reschedule 5
rtems_task_mode: reschedule -- returns to caller 8
rtems_task_mode: reschedule -- preempts caller 39
rtems_task_set_note 13
rtems_task_get_note 13
rtems_clock_set 33
rtems_clock_get 3
9 rtems_message_queue_create 110
rtems_message_queue_send: no waiting tasks 37
rtems_message_queue_urgent: no waiting tasks 37
rtems_message_queue_receive: available 31
rtems_message_queue_flush: no messages flushed 12
rtems_message_queue_flush: messages flushed 16
rtems_message_queue_delete 26
10 rtems_message_queue_receive: not available -- NO_WAIT 15
rtems_message_queue_receive: not available -- caller blocks 62
11 rtems_message_queue_send: task readied -- preempts caller 72
12 rtems_message_queue_send: task readied -- returns to caller 39
13 rtems_message_queue_urgent: task readied -- preempts caller 72
14 rtems_message_queue_urgent: task readied -- returns to caller 39
15 rtems_event_receive: obtain current events 1
rtems_event_receive: not available -- NO_WAIT 12
rtems_event_receive: not available -- caller blocks 56
rtems_event_send: no task readied 12
rtems_event_receive: available 12
rtems_event_send: task readied -- returns to caller 24
16 rtems_event_send: task readied -- preempts caller 55
17 rtems_task_set_priority: preempts caller 62
18 rtems_task_delete: calling task 83
19 rtems_signal_catch 9
rtems_signal_send: returns to caller 15
rtems_signal_send: signal to self 18
exit ASR overhead: returns to calling task 22
exit ASR overhead: returns to preempting task 49
20 rtems_partition_create 35
rtems_region_create 23
rtems_partition_get_buffer: available 15
rtems_partition_get_buffer: not available 13
rtems_partition_return_buffer 18
rtems_partition_delete 16
rtems_region_get_segment: available 22
rtems_region_get_segment: not available -- NO_WAIT 21
rtems_region_return_segment: no waiting tasks 19
rtems_region_get_segment: not available -- caller blocks 64
rtems_region_return_segment: task readied -- preempts caller 74
rtems_region_return_segment: task readied -- returns to caller 44
rtems_region_delete 16
rtems_io_initialize 2
rtems_io_open 1
rtems_io_close 1
rtems_io_read 1
rtems_io_write 1
rtems_io_control 1
21 rtems_task_ident 149
rtems_message_queue_ident 145
rtems_semaphore_ident 156
rtems_partition_ident 145
rtems_region_ident 148
rtems_port_ident 145
rtems_timer_ident 145
rtems_rate_monotonic_ident 145
22 rtems_message_queue_broadcast: task readied -- returns to caller 42
rtems_message_queue_broadcast: no waiting tasks 17
rtems_message_queue_broadcast: task readied -- preempts caller 78
23 rtems_timer_create 14
rtems_timer_fire_after: inactive 22
rtems_timer_fire_after: active 24
rtems_timer_cancel: active 15
rtems_timer_cancel: inactive 13
rtems_timer_reset: inactive 21
rtems_timer_reset: active 23
rtems_timer_fire_when: inactive 34
rtems_timer_fire_when: active 34
rtems_timer_delete: active 19
rtems_timer_delete: inactive 17
rtems_task_wake_when 69
24 rtems_task_wake_after: yield -- returns to caller 9
rtems_task_wake_after: yields -- preempts caller 45
25 rtems_clock_tick 4
26 _ISR_Disable 0
_ISR_Flash 1
_ISR_Enable 1
_Thread_Disable_dispatch 0
_Thread_Enable_dispatch 7
_Thread_Set_state 11
_Thread_Disptach (NO FP) 31
context switch: no floating point contexts 21
context switch: self 10
context switch: to another task 10
context switch: restore 1st FP task 25
fp context switch: save idle, restore idle 31
fp context switch: save idle, restore initialized 19
fp context switch: save initialized, restore initialized 20
_Thread_Resume 7
_Thread_Unblock 7
_Thread_Ready 9
_Thread_Get 4
_Semaphore_Get 2
_Thread_Get: invalid id 0
27 interrupt entry overhead: returns to interrupted task 6
interrupt exit overhead: returns to interrupted task 6
interrupt entry overhead: returns to nested interrupt 6
interrupt exit overhead: returns to nested interrupt 5
interrupt entry overhead: returns to preempting task 7
interrupt exit overhead: returns to preempting task 36
28 rtems_port_create 16
rtems_port_external_to_internal 11
rtems_port_internal_to_external 11
rtems_port_delete 16
29 rtems_rate_monotonic_create 15
rtems_rate_monotonic_period: initiate period -- returns to caller 21
rtems_rate_monotonic_period: obtain status 13
rtems_rate_monotonic_cancel 16
rtems_rate_monotonic_delete: inactive 18
rtems_rate_monotonic_delete: active 20
rtems_rate_monotonic_period: conclude periods -- caller blocks 53

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@@ -0,0 +1,2 @@
Makefile
Makefile.in

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@@ -0,0 +1,32 @@
##
## $Id$
##
AUTOMAKE_OPTIONS = foreign 1.4
BSP_PIECES = startup clock console spurious timer
# bummer; have to use $foreach since % pattern subst rules only replace 1x
OBJS = $(foreach piece, $(BSP_PIECES), $(wildcard ../$(piece)/$(ARCH)/*.o))
LIB = $(ARCH)/libbsp.a
include $(RTEMS_ROOT)/make/custom/@RTEMS_BSP@.cfg
include $(top_srcdir)/../../../../../../automake/lib.am
#
# (OPTIONAL) Add local stuff here using +=
#
$(LIB): $(OBJS)
$(make-library)
$(PROJECT_RELEASE)/lib/libbsp$(LIB_VARIANT).a: $(LIB)
$(INSTALL_DATA) $< $@
TMPINSTALL_FILES += $(PROJECT_RELEASE)/lib/libbsp$(LIB_VARIANT).a
all-local: $(ARCH) $(OBJS) $(LIB) $(TMPINSTALL_FILES)
.PRECIOUS: $(LIB)
include $(top_srcdir)/../../../../../../automake/local.am