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Whitespace removal.

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This commit is contained in:
Ralf Corsepius
2009-11-29 14:53:02 +00:00
parent 28352faecf
commit 32b8506b24
191 changed files with 4068 additions and 2182 deletions
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8
c/src/lib/libbsp/lm32/shared/clock/ckinit.c
View File

@@ -60,12 +60,12 @@ void Clock_driver_support_initialize_hardware(void)
clockwrite(LM32_CLOCK_PERIOD,
(CPU_FREQUENCY /
(1000000 / rtems_configuration_get_microseconds_per_tick())));
/* Enable clock interrupts and start in continuous mode */
clockwrite(LM32_CLOCK_CR, LM32_CLOCK_CR_ITO |
LM32_CLOCK_CR_CONT |
clockwrite(LM32_CLOCK_CR, LM32_CLOCK_CR_ITO |
LM32_CLOCK_CR_CONT |
LM32_CLOCK_CR_START);
lm32_interrupt_unmask(CLOCK_IRQMASK);
}

2
c/src/lib/libbsp/lm32/shared/console/uart.c
View File

@@ -40,7 +40,7 @@ void BSP_uart_init(int baud)
uartwrite(LM32_UART_MCR, LM32_UART_MCR_DTR | LM32_UART_MCR_RTS);
/* Set baud rate */
uartwrite(LM32_UART_DIV, CPU_FREQUENCY/baud);
uartwrite(LM32_UART_DIV, CPU_FREQUENCY/baud);
}
void BSP_uart_polled_write(char ch)

42
c/src/lib/libbsp/lm32/shared/gdbstub/lm32-debug.S
View File

@@ -2,7 +2,7 @@
* lm32 debug exception vectors
*
* Michael Walle <michael@walle.cc>, 2009
*
*
* If debugging is enabled the debug exception base address (deba) gets
* remapped to this file.
*
@@ -175,14 +175,14 @@ debug_isr_handler:
call r3
3:
lw r1, (sp+4)
lw r2, (sp+8)
lw r3, (sp+12)
lw r4, (sp+16)
lw r5, (sp+20)
lw r6, (sp+24)
lw r7, (sp+28)
lw r8, (sp+32)
lw r9, (sp+36)
lw r2, (sp+8)
lw r3, (sp+12)
lw r4, (sp+16)
lw r5, (sp+20)
lw r6, (sp+24)
lw r7, (sp+28)
lw r8, (sp+32)
lw r9, (sp+36)
lw r10, (sp+40)
lw ra, (sp+44)
lw ea, (sp+48)
@@ -208,7 +208,7 @@ debug_isr_handler:
wcsr EBA, ea
lw ea, (sp+140)
wcsr DEBA, ea
/* Restore EA from PC */
/* Restore EA from PC */
lw ea, (sp+128)
/* Stack pointer must be restored last, in case it has been updated */
lw sp, (sp+124)
@@ -254,7 +254,7 @@ save_all:
sw (r0+140), r1
rcsr r1, IE
sw (r0+144), r1
/* Work out EID from exception entry point address */
andi r1, ra, 0xff
srui r1, r1, 5
@@ -274,14 +274,14 @@ save_all:
/* Restore gp registers */
restore_gp:
lw r1, (r0+4)
lw r2, (r0+8)
lw r3, (r0+12)
lw r4, (r0+16)
lw r5, (r0+20)
lw r6, (r0+24)
lw r7, (r0+28)
lw r8, (r0+32)
lw r9, (r0+36)
lw r2, (r0+8)
lw r3, (r0+12)
lw r4, (r0+16)
lw r5, (r0+20)
lw r6, (r0+24)
lw r7, (r0+28)
lw r8, (r0+32)
lw r9, (r0+36)
lw r10, (r0+40)
lw r11, (r0+44)
lw r12, (r0+48)
@@ -315,7 +315,7 @@ e_restore_and_return:
wcsr EBA, ea
lw ea, (r0+140)
wcsr DEBA, ea
/* Restore EA from PC */
/* Restore EA from PC */
lw ea, (r0+128)
xor r0, r0, r0
eret
@@ -333,7 +333,7 @@ b_restore_and_return:
wcsr EBA, ba
lw ba, (r0+140)
wcsr DEBA, ba
/* Restore BA from PC */
/* Restore BA from PC */
lw ba, (r0+128)
xor r0, r0, r0
bret

120
c/src/lib/libbsp/lm32/shared/gdbstub/lm32-stub.c
View File

@@ -24,7 +24,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#include <bsp.h>
#include <string.h>
#include <signal.h>
@@ -70,13 +70,13 @@ static char remcomInBuffer[BUFMAX];
static char remcomOutBuffer[BUFMAX];
/*
* Set by debugger to indicate that when handling memory faults (bus errors), the
* Set by debugger to indicate that when handling memory faults (bus errors), the
* handler should set the mem_err flag and skip over the faulting instruction
*/
static volatile int may_fault;
/*
* Set by bus error exception handler, this indicates to caller of mem2hex,
* Set by bus error exception handler, this indicates to caller of mem2hex,
* hex2mem or bin2mem that there has been an error.
*/
static volatile int mem_err;
@@ -88,7 +88,7 @@ static char branch_step;
/* Saved instructions */
static unsigned int *seq_ptr;
static unsigned int seq_insn;
static unsigned int *branch_ptr;
static unsigned int *branch_ptr;
static unsigned int branch_insn;
#if defined(GDB_STUB_ENABLE_THREAD_SUPPORT)
@@ -144,7 +144,7 @@ static char *mem2hex(
)
{
unsigned char ch;
while (count-- > 0)
{
ch = *mem++;
@@ -178,7 +178,7 @@ static unsigned char *hex2mem(
ch |= hex(*buf++);
/* Attempt to write data to memory */
*mem++ = ch;
/* Return NULL if write caused an exception */
/* Return NULL if write caused an exception */
if (mem_err)
return NULL;
}
@@ -204,11 +204,11 @@ static unsigned char *bin2mem(
c = *buf++;
if (c == 0x7d)
c = *buf++ ^ 0x20;
/* Attempt to write value to memory */
/* Attempt to write value to memory */
*mem++ = c;
/* Return NULL if write caused an exception */
/* Return NULL if write caused an exception */
if (mem_err)
return NULL;
return NULL;
}
return mem;
@@ -262,7 +262,7 @@ static int compute_signal(
return SIGSEGV;
case LM32_EXCEPTION_DIVIDE_BY_ZERO:
return SIGFPE;
}
}
return SIGHUP; /* default for things we don't know about */
}
@@ -293,7 +293,7 @@ retry:
if (ch == '$')
goto retry;
if (ch == '#')
break;
break;
checksum = checksum + ch;
buffer[count] = ch;
count = count + 1;
@@ -366,19 +366,19 @@ static void putpacket(
* as the character we just transmitted
*/
run_length = 0;
run_idx = count;
run_idx = count;
while ((buffer[run_idx++] == ch) && (run_length < 97))
run_length++;
/* Encode run length as an ASCII character */
run_length_char = (char)(run_length + 29);
if ( (run_length >= 3)
if ( (run_length >= 3)
&& (run_length_char != '$')
&& (run_length_char != '#')
&& (run_length_char != '+')
&& (run_length_char != '-')
)
{
/* Transmit run-length */
/* Transmit run-length */
gdb_put_debug_char('*');
checksum += '*';
gdb_put_debug_char(run_length_char);
@@ -394,7 +394,7 @@ static void putpacket(
count += 1;
}
#endif
gdb_put_debug_char('#');
gdb_put_debug_char(highhex(checksum));
gdb_put_debug_char(lowhex(checksum));
@@ -424,11 +424,11 @@ static void flush_cache(void)
__asm__ __volatile__ ("wcsr ICC, r0\n"
"nop\n"
"nop\n"
"nop\n"
"nop\n"
"wcsr DCC, r0\n"
"nop\n"
"nop\n"
"nop"
"nop"
);
}
@@ -439,35 +439,35 @@ static int set_hw_breakpoint(
)
{
int bp;
/* Find a free break point register and then set it */
/* Find a free break point register and then set it */
__asm__ ("rcsr %0, BP0" : "=r" (bp));
if ((bp & 0x01) == 0)
if ((bp & 0x01) == 0)
{
__asm__ ("wcsr BP0, %0" : : "r" (address | 1));
return 1;
}
__asm__ ("rcsr %0, BP1" : "=r" (bp));
if ((bp & 0x01) == 0)
if ((bp & 0x01) == 0)
{
__asm__ ("wcsr BP1, %0" : : "r" (address | 1));
return 1;
}
__asm__ ("rcsr %0, BP2" : "=r" (bp));
if ((bp & 0x01) == 0)
if ((bp & 0x01) == 0)
{
__asm__ ("wcsr BP2, %0" : : "r" (address | 1));
return 1;
}
__asm__ ("rcsr %0, BP3" : "=r" (bp));
if ((bp & 0x01) == 0)
if ((bp & 0x01) == 0)
{
__asm__ ("wcsr BP3, %0" : : "r" (address | 1));
return 1;
}
/* No free breakpoint registers */
return -1;
return -1;
}
/* Remove a h/w breakpoint which should be set at the given address */
@@ -477,28 +477,28 @@ static int disable_hw_breakpoint(
)
{
int bp;
/* Try to find matching breakpoint register */
__asm__ ("rcsr %0, BP0" : "=r" (bp));
if ((bp & 0xfffffffc) == (address & 0xfffffffc))
if ((bp & 0xfffffffc) == (address & 0xfffffffc))
{
__asm__ ("wcsr BP0, %0" : : "r" (0));
return 1;
}
__asm__ ("rcsr %0, BP1" : "=r" (bp));
if ((bp & 0xfffffffc) == (address & 0xfffffffc))
if ((bp & 0xfffffffc) == (address & 0xfffffffc))
{
__asm__ ("wcsr BP1, %0" : : "r" (0));
return 1;
}
__asm__ ("rcsr %0, BP2" : "=r" (bp));
if ((bp & 0xfffffffc) == (address & 0xfffffffc))
if ((bp & 0xfffffffc) == (address & 0xfffffffc))
{
__asm__ ("wcsr BP2, %0" : : "r" (0));
return 1;
}
__asm__ ("rcsr %0, BP3" : "=r" (bp));
if ((bp & 0xfffffffc) == (address & 0xfffffffc))
if ((bp & 0xfffffffc) == (address & 0xfffffffc))
{
__asm__ ("wcsr BP3, %0" : : "r" (0));
return 1;
@@ -519,10 +519,10 @@ static void gdb_stub_report_exception_info(
char *ptr;
int sigval;
/* Convert exception ID to a signal number */
/* Convert exception ID to a signal number */
sigval = compute_signal(registers[LM32_REG_EID]);
/* Set pointer to start of output buffer */
/* Set pointer to start of output buffer */
ptr = remcomOutBuffer;
*ptr++ = 'T';
@@ -585,7 +585,7 @@ void handle_exception(void)
thread = rtems_gdb_stub_get_current_thread();
#endif
current_thread = thread;
/*
* Check for bus error caused by this code (rather than the program being
* debugged)
@@ -604,10 +604,10 @@ void handle_exception(void)
{
/* Remove breakpoints */
*seq_ptr = seq_insn;
if (branch_step)
*branch_ptr = branch_insn;
if (branch_step)
*branch_ptr = branch_insn;
stepping = 0;
}
}
/* Reply to host that an exception has occured with some basic info */
gdb_stub_report_exception_info(thread);
@@ -639,7 +639,7 @@ void handle_exception(void)
if (do_threads && current_thread != thread )
regptr = &current_thread_registers;
#endif
ptr = mem2hex((unsigned char*)regptr, remcomOutBuffer, NUM_REGS * 4);
ptr = mem2hex((unsigned char*)regptr, remcomOutBuffer, NUM_REGS * 4);
break;
/* Set the value of the CPU registers */
@@ -649,7 +649,7 @@ void handle_exception(void)
if (do_threads && current_thread != thread )
regptr = &current_thread_registers;
#endif
hex2mem(ptr, (unsigned char*)regptr, NUM_REGS * 4);
hex2mem(ptr, (unsigned char*)regptr, NUM_REGS * 4);
strcpy(remcomOutBuffer, "OK");
break;
@@ -724,7 +724,7 @@ void handle_exception(void)
registers[LM32_REG_PC] = addr;
flush_cache();
return;
/* Step */
case 's':
/* try to read optional parameter, pc unchanged if no parm */
@@ -736,32 +736,32 @@ void handle_exception(void)
opcode = insn & 0xfc000000;
if ( (opcode == 0xe0000000)
|| (opcode == 0xf8000000)
)
)
{
branch_step = 1;
branch_target = registers[LM32_REG_PC]
+ (((signed)insn << 6) >> 4);
}
}
else if ( (opcode == 0x44000000)
|| (opcode == 0x48000000)
|| (opcode == 0x4c000000)
|| (opcode == 0x50000000)
|| (opcode == 0x54000000)
|| (opcode == 0x5c000000)
)
|| (opcode == 0x48000000)
|| (opcode == 0x4c000000)
|| (opcode == 0x50000000)
|| (opcode == 0x54000000)
|| (opcode == 0x5c000000)
)
{
branch_step = 1;
branch_target = registers[LM32_REG_PC] +
+ (((signed)insn << 16) >> 14);
}
else if ( (opcode == 0xd8000000)
|| (opcode == 0xc0000000)
|| (opcode == 0xc0000000)
)
{
branch_step = 1;
branch_target = registers[(insn >> 21) & 0x1f];
}
else
}
else
branch_step = 0;
/* Set breakpoint after instruction we're stepping */
@@ -769,7 +769,7 @@ void handle_exception(void)
seq_ptr++;
seq_insn = *seq_ptr;
*seq_ptr = LM32_BREAK;
/* Make sure one insn doesn't get replaced twice */
if (seq_ptr == (unsigned int*)branch_target)
branch_step = 0;
@@ -805,7 +805,7 @@ void handle_exception(void)
break;
}
break;
case 'z':
switch (*ptr++)
{
@@ -820,11 +820,11 @@ void handle_exception(void)
if (err > 0)
strcpy(remcomOutBuffer, "OK");
else if (err < 0)
strcpy(remcomOutBuffer, "E28");
}
strcpy(remcomOutBuffer, "E28");
}
else
strcpy(remcomOutBuffer, "E22");
break;
break;
}
break;
@@ -858,7 +858,7 @@ void handle_exception(void)
}
break;
#endif
/* Set thread */
case 'H':
#if defined(GDB_STUB_ENABLE_THREAD_SUPPORT)
@@ -923,8 +923,8 @@ void handle_exception(void)
/* We reset by branching to the reset exception handler. */
registers[LM32_REG_PC] = 0;
return;
#endif
}
#endif
}
/* reply to the request */
putpacket(remcomOutBuffer);
@@ -935,7 +935,7 @@ void gdb_handle_break(rtems_vector_number vector, CPU_Interrupt_frame *frame)
{
int i;
unsigned int *int_regs = (unsigned int*)frame;
/* copy extended frame to registers */
registers[LM32_REG_R0] = 0;
for (i = 1; i < NUM_REGS; i++)
@@ -957,13 +957,13 @@ void gdb_handle_break(rtems_vector_number vector, CPU_Interrupt_frame *frame)
void lm32_gdb_stub_install(int enable_threads)
{
unsigned int dc;
/* set DEBA and remap all exception */
__asm__("wcsr DEBA, %0" : : "r" (&_deba));
__asm__("rcsr %0, DC" : "=r" (dc));
dc |= 0x2;
__asm__("wcsr DC, %0" : : "r" (dc));
#if defined(GDB_STUB_ENABLE_THREAD_SUPPORT)
if( enable_threads )
do_threads = 1;

22
c/src/lib/libbsp/lm32/shared/start/start.S
View File

@@ -29,9 +29,9 @@
.globl crt0
.type crt0,@function
LatticeDDInit:
__start:
_start:
LatticeDDInit:
__start:
_start:
start:
/* Clear r0 */
xor r0,r0,r0
@@ -51,7 +51,7 @@ start:
breakpoint_handler:
rcsr r7, DEBA
addi r7, r7, 32
b r7
b r7
nop
nop
nop
@@ -60,7 +60,7 @@ breakpoint_handler:
instruction_bus_error_handler:
rcsr r7, DEBA
addi r7, r7, 64
b r7
b r7
nop
nop
nop
@@ -69,7 +69,7 @@ instruction_bus_error_handler:
watchpoint_handler:
rcsr r7, DEBA
addi r7, r7, 96
b r7
b r7
nop
nop
nop
@@ -78,7 +78,7 @@ watchpoint_handler:
data_bus_error_handler:
rcsr r7, DEBA
addi r7, r7, 128
b r7
b r7
nop
nop
nop
@@ -87,7 +87,7 @@ data_bus_error_handler:
divide_by_zero_handler:
rcsr r7, DEBA
addi r7, r7, 160
b r7
b r7
nop
nop
nop
@@ -106,14 +106,14 @@ interrupt_handler:
system_call_handler:
rcsr r7, DEBA
addi r7, r7, 224
b r7
b r7
nop
nop
nop
nop
nop
crt0:
crt0:
/* Flush data cache */
addi r1, r0, 1
wcsr DCC, r1
@@ -153,7 +153,7 @@ crt0:
#define SYS_exit 1
mvi r8, SYS_exit
scall
scall
#endif
.dead_end:

42
c/src/lib/libbsp/lm32/shared/tsmac/tsmac.c
View File

@@ -230,11 +230,11 @@ static void tsmac_rxDaemon(void *arg)
for(;;)
{
rtems_bsdnet_event_receive( RTEMS_ALL_EVENTS,
rtems_bsdnet_event_receive( RTEMS_ALL_EVENTS,
RTEMS_WAIT | RTEMS_EVENT_ANY,
RTEMS_NO_TIMEOUT,
RTEMS_NO_TIMEOUT,
&events);
#ifdef DEBUG
printk(TSMAC_NAME ": tsmac_rxDaemon wakeup\n");
#endif
@@ -247,10 +247,10 @@ static void tsmac_rxDaemon(void *arg)
/* Get number of RX frames in RX FIFO */
rxq = tsmacread(LM32_TSMAC_RX_FRAMES_CNT);
if (rxq == 0)
break;
/* Get lenght of frame */
len = tsmacread(LM32_TSMAC_RX_LEN_FIFO);
#ifdef DEBUG
@@ -263,7 +263,7 @@ static void tsmac_rxDaemon(void *arg)
*/
MGETHDR(m, M_WAIT, MT_DATA);
MCLGET(m, M_WAIT);
m->m_pkthdr.rcvif = ifp;
buf = (uint32_t *) mtod(m, uint32_t*);
@@ -279,7 +279,7 @@ static void tsmac_rxDaemon(void *arg)
printk("\n");
#endif
m->m_len = m->m_pkthdr.len =
m->m_len = m->m_pkthdr.len =
len - sizeof(uint32_t) - sizeof(struct ether_header);
eh = mtod(m, struct ether_header*);
m->m_data += sizeof(struct ether_header);
@@ -290,7 +290,7 @@ static void tsmac_rxDaemon(void *arg)
/* Notify the ip stack that there is a new packet */
ether_input(ifp, eh, m);
/*
* Release RX frame
*/
@@ -322,7 +322,7 @@ static void tsmac_sendpacket(struct ifnet *ifp, struct mbuf *m)
}
printk("\n");
#endif
if (nm->m_len > 0)
{
memcpy(&tsmac_txbuf[len], (char *)nm->m_data, nm->m_len);
@@ -394,7 +394,7 @@ static void tsmac_txDaemon(void *arg)
#endif
break;
}
/*
* Get the next mbuf chain to transmit.
*/
@@ -442,7 +442,7 @@ void tsmac_init_hardware(struct tsmac_softc *tsmac)
tsmacregread(LM32_TSMAC_MAC_ADDR_2_BYTE0));
printk(TSMAC_NAME ": MAC TX_RX_STS %04x\n",
tsmacregread(LM32_TSMAC_TX_RX_STS_BYTE0));
#endif
#endif
/*
* Set our physical address
@@ -460,12 +460,12 @@ void tsmac_init_hardware(struct tsmac_softc *tsmac)
tsmacregread(LM32_TSMAC_MAC_ADDR_1_BYTE0));
printk(TSMAC_NAME ": MAC MAC_ADDR2 %04x\n",
tsmacregread(LM32_TSMAC_MAC_ADDR_2_BYTE0));
#endif
#endif
/*
* Configure PHY
*/
phyid = tsmacphyread(PHY_PHYIDR1);
#ifdef DEBUG
printk(TSMAC_NAME ": PHYIDR1 %08x\n", phyid);
@@ -491,7 +491,7 @@ void tsmac_init_hardware(struct tsmac_softc *tsmac)
tsmacphywrite(PHY_ANAR, PHY_ANAR_10_FD | PHY_ANAR_10 | PHY_ANAR_SEL_DEF);
stat = tsmacphyread(PHY_ANAR);
#ifdef DEBUG
printk(TSMAC_NAME ": PHY ANAR %04x, wrote %04x\n", stat,
printk(TSMAC_NAME ": PHY ANAR %04x, wrote %04x\n", stat,
PHY_ANAR_10_FD | PHY_ANAR_10 | PHY_ANAR_SEL_DEF);
#endif
#endif /* TSMAC_FORCE_10BASET */
@@ -501,7 +501,7 @@ void tsmac_init_hardware(struct tsmac_softc *tsmac)
#endif
/* Enable receive and transmit interrupts */
tsmacwrite(LM32_TSMAC_INTR_ENB, INTR_ENB |
tsmacwrite(LM32_TSMAC_INTR_ENB, INTR_ENB |
INTR_RX_SMRY | INTR_TX_SMRY |
INTR_RX_PKT_RDY | INTR_TX_PKT_SENT);
}
@@ -541,13 +541,13 @@ void tsmac_init(void *arg)
/* Interrupt line for TSMAC */
lm32_interrupt_unmask(TSMAC_IRQMASK);
}
ifp->if_flags |= IFF_RUNNING;
/*
* Receive broadcast
*/
tsmacregwrite(LM32_TSMAC_TX_RX_CTL_BYTE0, TX_RX_CTL_RECEIVE_BRDCST |
TX_RX_CTL_RECEIVE_PAUSE);
@@ -557,7 +557,7 @@ void tsmac_init(void *arg)
* Enable receiver
*/
tsmacregwrite(LM32_TSMAC_MODE_BYTE0, MODE_TX_EN | MODE_RX_EN | MODE_FC_EN);
tsmacregwrite(LM32_TSMAC_MODE_BYTE0, MODE_TX_EN | MODE_RX_EN | MODE_FC_EN);
/*
* Wake up receive task to receive packets in queue
@@ -767,7 +767,7 @@ int rtems_tsmac_driver_attach(struct rtems_bsdnet_ifconfig *config, int attachin
mtu = config->mtu;
else
mtu = ETHERMTU;
/*
* Set up network interface values
*/
@@ -811,7 +811,7 @@ rtems_isr tsmac_interrupt_handler(rtems_vector_number vector)
rx_stat = tsmacread(LM32_TSMAC_RX_STATUS);
if (rx_stat & STAT_RX_FIFO_FULL)
tsmac->rxFifoFull++;
tx_stat = tsmacread(LM32_TSMAC_TX_STATUS);
if (tx_stat & STAT_TX_FIFO_FULL)
tsmac->txFifoFull++;