From 317cfa50d05b409ac412e8766953821527e822b2 Mon Sep 17 00:00:00 2001
From: Christian Mauderer <christian.mauderer@embedded-brains.de>
Date: Mon, 7 Jul 2025 10:51:35 +0200
Subject: [PATCH] bsps/stm32u5: Fix warnings in HAL

The HAL has a few comparisons of a pointer with 0U instead of NULL. This
patch fixes that.

Fixes #5289
---
 bsps/arm/stm32u5/hal/stm32u5xx_hal_dcmi.c   |  8 ++++++++
 bsps/arm/stm32u5/hal/stm32u5xx_hal_dma_ex.c |  8 ++++++++
 bsps/arm/stm32u5/hal/stm32u5xx_hal_lptim.c  |  4 ++++
 bsps/arm/stm32u5/hal/stm32u5xx_hal_sram.c   |  8 ++++++++
 bsps/arm/stm32u5/hal/stm32u5xx_hal_tim.c    | 14 ++++++++++++++
 5 files changed, 42 insertions(+)

diff --git a/bsps/arm/stm32u5/hal/stm32u5xx_hal_dcmi.c b/bsps/arm/stm32u5/hal/stm32u5xx_hal_dcmi.c
index 36a51270aa..07379dbfcf 100644
--- a/bsps/arm/stm32u5/hal/stm32u5xx_hal_dcmi.c
+++ b/bsps/arm/stm32u5/hal/stm32u5xx_hal_dcmi.c
@@ -424,7 +424,11 @@ HAL_StatusTypeDef HAL_DCMI_Start_DMA(DCMI_HandleTypeDef *hdcmi, uint32_t DCMI_Mo
     /* Enable the DMA Stream */
     if ((hdcmi->DMA_Handle->Mode & DMA_LINKEDLIST) == DMA_LINKEDLIST)
     {
+#ifndef __rtems__
       if ((hdcmi->DMA_Handle->LinkedListQueue != 0U) && (hdcmi->DMA_Handle->LinkedListQueue->Head != 0U))
+#else /* __rtems__ */
+      if ((hdcmi->DMA_Handle->LinkedListQueue != NULL) && (hdcmi->DMA_Handle->LinkedListQueue->Head != NULL))
+#endif /* __rtems__ */
       {
         /* Set Source , Destination , Length for DMA Xfer */
 
@@ -478,7 +482,11 @@ HAL_StatusTypeDef HAL_DCMI_Start_DMA(DCMI_HandleTypeDef *hdcmi, uint32_t DCMI_Mo
 
     if ((hdcmi->DMA_Handle->Mode & DMA_LINKEDLIST) == DMA_LINKEDLIST)
     {
+#ifndef __rtems__
       if ((hdcmi->DMA_Handle->LinkedListQueue != 0U) && (hdcmi->DMA_Handle->LinkedListQueue->Head != 0U))
+#else /* __rtems__ */
+      if ((hdcmi->DMA_Handle->LinkedListQueue != NULL) && (hdcmi->DMA_Handle->LinkedListQueue->Head != NULL))
+#endif /* __rtems__ */
       {
         /* Update first node */
 
diff --git a/bsps/arm/stm32u5/hal/stm32u5xx_hal_dma_ex.c b/bsps/arm/stm32u5/hal/stm32u5xx_hal_dma_ex.c
index a1c4d0ffdc..bac7b34b8a 100644
--- a/bsps/arm/stm32u5/hal/stm32u5xx_hal_dma_ex.c
+++ b/bsps/arm/stm32u5/hal/stm32u5xx_hal_dma_ex.c
@@ -2961,7 +2961,11 @@ HAL_StatusTypeDef HAL_DMAEx_List_ConvertQToDynamic(DMA_QListTypeDef *const pQLis
   DMA_List_GetCLLRNodeInfo(pQList->Head, NULL, &cllr_offset);
 
   /* Check queue circularity */
+#ifndef __rtems__
   if (pQList->FirstCircularNode != 0U)
+#else /* __rtems__ */
+  if (pQList->FirstCircularNode != NULL)
+#endif /* __rtems__ */
   {
     /* Find the last queue node and get its position in selected queue */
     node_info.cllr_offset = cllr_offset;
@@ -4591,7 +4595,11 @@ static void DMA_List_UpdateDynamicQueueNodesCLLR(DMA_QListTypeDef const *const p
   }
 
   /* Check queue circularity */
+#ifndef __rtems__
   if (pQList->FirstCircularNode != 0U)
+#else /* __rtems__ */
+  if (pQList->FirstCircularNode != NULL)
+#endif /* __rtems__ */
   {
     /* First circular queue is not last queue node */
     if (LastNode_IsCircular == 0U)
diff --git a/bsps/arm/stm32u5/hal/stm32u5xx_hal_lptim.c b/bsps/arm/stm32u5/hal/stm32u5xx_hal_lptim.c
index d9783af738..c30ec657c6 100644
--- a/bsps/arm/stm32u5/hal/stm32u5xx_hal_lptim.c
+++ b/bsps/arm/stm32u5/hal/stm32u5xx_hal_lptim.c
@@ -3709,7 +3709,11 @@ HAL_StatusTypeDef LPTIM_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t src, uint
   /* Enable the DMA channel */
   if ((hdma->Mode & DMA_LINKEDLIST) == DMA_LINKEDLIST)
   {
+#ifndef __rtems__
     if ((hdma->LinkedListQueue != 0U) && (hdma->LinkedListQueue->Head != 0U))
+#else /* __rtems__ */
+    if ((hdma->LinkedListQueue != NULL) && (hdma->LinkedListQueue->Head != NULL))
+#endif /* __rtems__ */
     {
       /* Enable the DMA channel */
       hdma->LinkedListQueue->Head->LinkRegisters[NODE_CBR1_DEFAULT_OFFSET] = length;
diff --git a/bsps/arm/stm32u5/hal/stm32u5xx_hal_sram.c b/bsps/arm/stm32u5/hal/stm32u5xx_hal_sram.c
index 97514484dd..8881a47cec 100644
--- a/bsps/arm/stm32u5/hal/stm32u5xx_hal_sram.c
+++ b/bsps/arm/stm32u5/hal/stm32u5xx_hal_sram.c
@@ -686,7 +686,11 @@ HAL_StatusTypeDef HAL_SRAM_Read_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddres
 
     if ((hsram->hdma->Mode & DMA_LINKEDLIST) == DMA_LINKEDLIST)
     {
+#ifndef __rtems__
       if ((hsram->hdma->LinkedListQueue != 0U) && (hsram->hdma->LinkedListQueue->Head != 0U))
+#else /* __rtems__ */
+      if ((hsram->hdma->LinkedListQueue != NULL) && (hsram->hdma->LinkedListQueue->Head != NULL))
+#endif /* __rtems__ */
       {
         /* Check destination data width and set the size to be transferred */
         data_width = hsram->hdma->LinkedListQueue->Head->LinkRegisters[NODE_CTR1_DEFAULT_OFFSET] & DMA_CTR1_DDW_LOG2;
@@ -788,7 +792,11 @@ HAL_StatusTypeDef HAL_SRAM_Write_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddre
 
     if ((hsram->hdma->Mode & DMA_LINKEDLIST) == DMA_LINKEDLIST)
     {
+#ifndef __rtems__
       if ((hsram->hdma->LinkedListQueue != 0U) && (hsram->hdma->LinkedListQueue->Head != 0U))
+#else /* __rtems__ */
+      if ((hsram->hdma->LinkedListQueue != NULL) && (hsram->hdma->LinkedListQueue->Head != NULL))
+#endif /* __rtems__ */
       {
         /* Check destination data width and set the size to be transferred */
         data_width = hsram->hdma->LinkedListQueue->Head->LinkRegisters[NODE_CTR1_DEFAULT_OFFSET] & DMA_CTR1_DDW_LOG2;
diff --git a/bsps/arm/stm32u5/hal/stm32u5xx_hal_tim.c b/bsps/arm/stm32u5/hal/stm32u5xx_hal_tim.c
index f45e3ece05..479278928c 100644
--- a/bsps/arm/stm32u5/hal/stm32u5xx_hal_tim.c
+++ b/bsps/arm/stm32u5/hal/stm32u5xx_hal_tim.c
@@ -4690,8 +4690,13 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *htim, uint32_t
   if (hdma != NULL)
   {
 
+#ifndef __rtems__
     if (((hdma->Mode & DMA_LINKEDLIST) == DMA_LINKEDLIST) && (hdma->LinkedListQueue != 0U)
         && (hdma->LinkedListQueue->Head != 0U))
+#else /* __rtems__ */
+    if (((hdma->Mode & DMA_LINKEDLIST) == DMA_LINKEDLIST) && (hdma->LinkedListQueue != NULL)
+        && (hdma->LinkedListQueue->Head != NULL))
+#endif /* __rtems__ */
     {
       data_width = hdma->LinkedListQueue->Head->LinkRegisters[0] & DMA_CTR1_SDW_LOG2;
     }
@@ -5145,8 +5150,13 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStart(TIM_HandleTypeDef *htim, uint32_t B
   if (hdma != NULL)
   {
 
+#ifndef __rtems__
     if (((hdma->Mode & DMA_LINKEDLIST) == DMA_LINKEDLIST) && (hdma->LinkedListQueue != 0U)
         && (hdma->LinkedListQueue->Head != 0U))
+#else /* __rtems__ */
+    if (((hdma->Mode & DMA_LINKEDLIST) == DMA_LINKEDLIST) && (hdma->LinkedListQueue != NULL)
+        && (hdma->LinkedListQueue->Head != NULL))
+#endif /* __rtems__ */
     {
       data_width = hdma->LinkedListQueue->Head->LinkRegisters[0] & DMA_CTR1_SDW_LOG2;
     }
@@ -6082,7 +6092,11 @@ HAL_StatusTypeDef TIM_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t src, uint32
   /* Enable the DMA channel */
   if ((hdma->Mode & DMA_LINKEDLIST) == DMA_LINKEDLIST)
   {
+#ifndef __rtems__
     if ((hdma->LinkedListQueue != 0U) && (hdma->LinkedListQueue->Head != 0U))
+#else /* __rtems__ */
+    if ((hdma->LinkedListQueue != NULL) && (hdma->LinkedListQueue->Head != NULL))
+#endif /* __rtems__ */
     {
       /* Enable the DMA channel */
       hdma->LinkedListQueue->Head->LinkRegisters[NODE_CBR1_DEFAULT_OFFSET] = length;