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add support for mpc551x based GW_LCFM system

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This commit is contained in:
Thomas Doerfler
2010-03-25 20:26:00 +00:00
parent 89bb075414
commit 2f5435a42f
15 changed files with 579 additions and 89 deletions
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4
c/src/lib/libcpu/powerpc/mpc55xx/edma/edma.c
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@@ -158,7 +158,7 @@ void mpc55xx_edma_enable_error_interrupts( unsigned channel, bool enable)
}
}
rtems_status_code mpc55xx_edma_init()
rtems_status_code mpc55xx_edma_init(void)
{
rtems_status_code sc = RTEMS_SUCCESSFUL;
@@ -170,7 +170,7 @@ rtems_status_code mpc55xx_edma_init()
EDMA.CR.B.ERGA = 1;
/* Clear TCDs */
memset( &EDMA.TCD [0], 0, sizeof( EDMA.TCD));
memset( (void *)&EDMA.TCD [0], 0, sizeof( EDMA.TCD));
/* Error interrupt handlers */
sc = mpc55xx_interrupt_handler_install(

14
c/src/lib/libcpu/powerpc/mpc55xx/esci/esci.c
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@@ -253,12 +253,13 @@ static int mpc55xx_esci_termios_poll_read( int minor)
/**
* @brief Writes @a n characters from @a out to port @a minor.
*
* @return Returns 0 on success or -1 otherwise.
* @return Returns number of chars sent on success or -1 otherwise.
*/
static int mpc55xx_esci_termios_poll_write( int minor, const char *out, int n)
static int mpc55xx_esci_termios_poll_write( int minor, const char *out,
size_t n)
{
mpc55xx_esci_driver_entry *e = &mpc55xx_esci_driver_table [minor];
int i = 0;
size_t i = 0;
/* Check minor number */
if (MPC55XX_ESCI_IS_MINOR_INVALD( minor)) {
@@ -270,18 +271,18 @@ static int mpc55xx_esci_termios_poll_write( int minor, const char *out, int n)
mpc55xx_esci_write_char( e, out [i]);
}
return 0;
return n;
}
/**
* @brief Writes one character from @a out to port @a minor.
*
* @return Returns always 0.
* @return (always 0).
*
* @note The buffer @a out has to provide at least one character.
* This function assumes that the transmit data register is empty.
*/
static int mpc55xx_esci_termios_write( int minor, const char *out, int n)
static int mpc55xx_esci_termios_write( int minor, const char *out, size_t n)
{
mpc55xx_esci_driver_entry *e = &mpc55xx_esci_driver_table [minor];
@@ -531,7 +532,6 @@ rtems_device_driver console_initialize( rtems_device_major_number major, rtems_d
rtems_device_driver console_open( rtems_device_major_number major, rtems_device_minor_number minor, void *arg)
{
rtems_status_code sc = RTEMS_SUCCESSFUL;
int rv = 0;
mpc55xx_esci_driver_entry *e = &mpc55xx_esci_driver_table [minor];
/* Check minor number */

11
c/src/lib/libcpu/powerpc/mpc55xx/include/reg-defs.h
View File

@@ -24,6 +24,16 @@
/*
* Register addresses
*/
#if ((MPC55XX_CHIP_DERIVATE >= 5510) && (MPC55XX_CHIP_DERIVATE <= 5517))
#define FMPLL_SYNSR 0xFFFF0004
#define FMPLL_ESYNCR1 0xFFFF0008
#define FMPLL_ESYNCR2 0xFFFF000C
#define FLASH_BIUCR 0xFFFF801C
#define SIU_ECCR 0xFFFE8984
#define SIU_SRCR 0xFFFE8010
#else /* ((MPC55XX_CHIP_DERIVATE >= 5510) && (MPC55XX_CHIP_DERIVATE <= 5517))*/
#define FMPLL_SYNCR 0xC3F80000
#define FMPLL_SYNSR 0xC3F80004
@@ -31,6 +41,7 @@
#define SIU_ECCR 0xC3F90984
#define SIU_SRCR 0xC3F90010
#endif /*((MPC55XX_CHIP_DERIVATE >= 5510) && (MPC55XX_CHIP_DERIVATE <= 5517))*/
/*
* Special purpose registers
*/

90
c/src/lib/libcpu/powerpc/mpc55xx/include/regs.h
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@@ -6,8 +6,12 @@
* @brief Register definitions for the MPC55XX microcontroller family
*
* This file is based on the mpc5566.h header file provided by Freescale Semiconductor, INC.
* with some added fields/structures/definitions for MPC5510
*/
/* to get the chip derivate... */
#include <bspopts.h>
/*
* Copyright (c) 2008
* Embedded Brains GmbH
@@ -344,7 +348,7 @@ extern "C" {
/* MODULE : FMPLL */
/****************************************************************************/
struct FMPLL_tag {
union {
union SYNCR_tag {
uint32_t R;
struct {
uint32_t:1;
@@ -362,7 +366,7 @@ extern "C" {
uint32_t DEPTH:2;
uint32_t EXP:10;
} B;
} SYNCR;
} SYNCR; /* not present on MPC551x */
union {
uint32_t R;
@@ -381,6 +385,36 @@ extern "C" {
} B;
} SYNSR;
union ESYNCR1_tag {
uint32_t R;
struct {
uint32_t:1;
uint32_t CLKCFG:3;
uint32_t:8;
uint32_t EPREDIV:4;
uint32_t :8;
uint32_t EMFD:8;
} B;
} ESYNCR1; /* present on MPC551x */
union ESYNCR2_tag{
uint32_t R;
struct {
uint32_t:8;
uint32_t LOCEN:1;
uint32_t LOLRE:1;
uint32_t LOCRE:1;
uint32_t LOLIRQ:1;
uint32_t LOCIRQ:1;
uint32_t:1;
uint32_t ERATE:2;
uint32_t:5;
uint32_t DEPTH:3;
uint32_t:2;
uint32_t ERFD:6;
} B;
} ESYNCR2; /* present on MPC551x */
};
/****************************************************************************/
/* MODULE : External Bus Interface (EBI) */
@@ -4353,11 +4387,60 @@ extern "C" {
.MAS6 = { .R = 0 }
};
#if ((MPC55XX_CHIP_DERIVATE >= 5510) && (MPC55XX_CHIP_DERIVATE <= 5517))
/* Define memories */
#define SRAM_START 0x40000000
#define SRAM_SIZE 0x14000
#define SRAM_END (SRAM_START+SRAM_SIZE-1)
#define FLASH_START 0x00000000
#define FLASH_SIZE 0x180000
#define FLASH_END (FLASH_START+FLASH_SIZE-1)
/* Define instances of modules */
#define EDMA (*(volatile struct EDMA_tag *) 0xFFF44000)
#define INTC (*(volatile struct INTC_tag *) 0xFFF48000)
#define EQADC (*(volatile struct EQADC_tag *) 0xFFF80000)
#define SOFTMLB (*(volatile struct SOFTMLB_tag *) 0xFFF84000)
#define I2C_A (*(volatile struct I2C_tag *) 0xFFF88000)
#define DSPI_A (*(volatile struct DSPI_tag *) 0xFFF90000)
#define DSPI_B (*(volatile struct DSPI_tag *) 0xFFF94000)
#define DSPI_C (*(volatile struct DSPI_tag *) 0xFFF98000)
#define DSPI_D (*(volatile struct DSPI_tag *) 0xFFF9C000)
#define ESCI_A (*(volatile struct ESCI_tag *) 0xFFFA0000)
#define ESCI_B (*(volatile struct ESCI_tag *) 0xFFFA4000)
#define ESCI_C (*(volatile struct ESCI_tag *) 0xFFFA8000)
#define ESCI_D (*(volatile struct ESCI_tag *) 0xFFFAC000)
#define ESCI_E (*(volatile struct ESCI_tag *) 0xFFFB0000)
#define ESCI_F (*(volatile struct ESCI_tag *) 0xFFFB4000)
#define ESCI_G (*(volatile struct ESCI_tag *) 0xFFFB8000)
#define ESCI_H (*(volatile struct ESCI_tag *) 0xFFFBC000)
#define CAN_A (*(volatile struct FLEXCAN2_tag *) 0xFFFC0000)
#define CAN_B (*(volatile struct FLEXCAN2_tag *) 0xFFFC4000)
#define CAN_C (*(volatile struct FLEXCAN2_tag *) 0xFFFC8000)
#define CAN_D (*(volatile struct FLEXCAN2_tag *) 0xFFFCC000)
#define CAN_D (*(volatile struct FLEXCAN2_tag *) 0xFFFD0000)
#define CAN_D (*(volatile struct FLEXCAN2_tag *) 0xFFFD4000)
#define EMIOS (*(volatile struct EMIOS_tag *) 0xFFFE4000)
#define SIU (*(volatile struct SIU_tag *) 0xFFFE8000)
#define CRP (*(volatile struct CRP_tag *) 0xFFFEC000)
#define FMPLL (*(volatile struct FMPLL_tag *) 0xFFFF0000)
#define EBI (*(volatile struct EBI_tag *) 0xFFFF4000)
#define FLASH (*(volatile struct FLASH_tag *) 0xFFFF8000)
#else /* ((MPC55XX_CHIP_DERIVATE >= 5510) && (MPC55XX_CHIP_DERIVATE <= 5517)) */
/* Define memories */
#define SRAM_START 0x40000000
#define SRAM_SIZE 0x20000
#define SRAM_END 0x4001FFFF
#define SRAM_END (SRAM_START+SRAM_SIZE-1)
#define FLASH_START 0x0
#define FLASH_SIZE 0x300000
@@ -4400,6 +4483,7 @@ extern "C" {
#define CAN_D (*(volatile struct FLEXCAN2_tag *) 0xFFFCC000)
#define FEC (*(volatile struct FEC_tag *) 0xFFF4C000)
#endif
#define MPC55XX_ZERO_FLAGS { .R = 0 }

47
c/src/lib/libcpu/powerpc/mpc55xx/include/siu.h Normal file
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@@ -0,0 +1,47 @@
/**
* @file
*
* @ingroup mpc55xx
*
* @brief System Integration Unit Access (SIU).
*/
/*
* Copyright (c) 2010
* Embedded Brains GmbH
* Obere Lagerstr. 30
* D-82178 Puchheim
* Germany
* rtems@embedded-brains.de
*
* The license and distribution terms for this file may be found in the file
* LICENSE in this distribution or at http://www.rtems.com/license/LICENSE.
*/
#ifndef LIBCPU_POWERPC_MPC55XX_SIU_H
#define LIBCPU_POWERPC_MPC55XX_SIU_H
#include <stdbool.h>
#include <stdint.h>
#include <rtems.h>
#include <rtems/chain.h>
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
typedef struct mpc55xx_siu_pcr_entry {
uint16_t pcr_idx; /* first PCR index for this entry */
uint16_t pcr_cnt; /* PCR count using this entry */
union SIU_PCR_tag pcr_val; /* value to write to the PCR[idx++val] */
} mpc55xx_siu_pcr_entry_t;
rtems_status_code mpc55xx_siu_pcr_init(volatile struct SIU_tag *siu,
const mpc55xx_siu_pcr_entry_t *pcr_entry);
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* LIBCPU_POWERPC_MPC55XX_SIU_H */

77
c/src/lib/libcpu/powerpc/mpc55xx/misc/fmpll.S
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@@ -20,21 +20,15 @@
#include <libcpu/powerpc-utility.h>
#include <mpc55xx/reg-defs.h>
#include <bspopts.h>
.section ".text"
/* Timeout for delay in clocks */
.equ FMPLL_TIMEOUT, 6000
/* Reference clock */
.equ FMPLL_REF_CLOCK, 8000000
/* Settings for FMPLL from 12 MHz up to 128 MHz with 8 MHz reference frequency */
.equ FMPLL_128_8_SYNCR_SETTING_0, (FMPLL_SYNCR_PREDIV_0 | FMPLL_SYNCR_MFD_12 | FMPLL_SYNCR_RFD_2 | FMPLL_SYNCR_LOCEN)
.equ FMPLL_128_8_SYNCR_SETTING_1, (FMPLL_SYNCR_PREDIV_0 | FMPLL_SYNCR_MFD_12 | FMPLL_SYNCR_RFD_0 | FMPLL_SYNCR_LOCEN)
.macro DO_SETTING setting
LWI r5, FMPLL_128_8_SYNCR_SETTING_\setting
lwz r5, \setting
stw r5, 0(r4)
msync
bl mpc55xx_fmpll_wait_for_lock
@@ -48,13 +42,37 @@
*/
GLOBAL_FUNCTION mpc55xx_fmpll_reset_config
/* Save link register */
mflr r3
mflr r9
#if ((MPC55XX_CHIP_DERIVATE >= 5510) && (MPC55XX_CHIP_DERIVATE <= 5517))
/*
* for MPC5510: pass in ptr to array with:
* off 0: temp setting for ESYNCR2
* off 4: final setting for ESYNCR2
* off 8: final setting for ESYNCR1
*/
LA r4, FMPLL_ESYNCR2
DO_SETTING 0(r3)
lwz r5, 8(r3)
stw r5, (FMPLL_ESYNCR1-FMPLL_ESYNCR2)(r4)
msync
DO_SETTING 4(r3)
#else
/*
* for MPC5566: pass in ptr to array with:
* off 0: temp setting for SYNCR
* off 4: final setting for SYNCR
*/
LA r4, FMPLL_SYNCR
DO_SETTING 0
DO_SETTING 1
DO_SETTING 0(r3)
DO_SETTING 4(r3)
#endif
/* Enable loss-of-clock and loss-of-lock IRQs */
lwz r5, 0(r4)
LWI r6, FMPLL_SYNCR_LOCIRQ | FMPLL_SYNCR_LOLIRQ
@@ -66,7 +84,7 @@ GLOBAL_FUNCTION mpc55xx_fmpll_reset_config
stw r5, 0(r4)
/* Restore link register and return */
mtlr r3
mtlr r9
blr
/**
@@ -88,8 +106,8 @@ fmpll_not_locked:
b mpc55xx_system_reset
fmpll_continue:
lwz r8, 0(r6)
and. r8, r8, r7
lwz r5, 0(r6)
and. r5, r5, r7
beq fmpll_not_locked
blr
@@ -99,6 +117,29 @@ fmpll_continue:
* @brief Returns the system clock.
*/
GLOBAL_FUNCTION mpc55xx_get_system_clock
#if ((MPC55XX_CHIP_DERIVATE >= 5510) && (MPC55XX_CHIP_DERIVATE <= 5517))
LA r4, FMPLL_ESYNCR1
lwz r3, 0(r4)
/* EPREDIV */
rlwinm r5, r3,16, 28, 31
/* MFD */
rlwinm r6, r3,32, 24, 31
LA r4, FMPLL_ESYNCR2
lwz r3, 0(r4)
/* ERFD */
rlwinm r7, r3,32, 26, 31
LWI r8, MPC55XX_FMPLL_REF_CLOCK
addi r5, r5, 1
addi r6, r6,16
addi r7, r7, 1
mullw r6, r6, r8
divw r3, r6, r5
divw r3, r3, r7
#else
LA r4, FMPLL_SYNCR
lwz r3, 0(r4)
@@ -110,14 +151,14 @@ GLOBAL_FUNCTION mpc55xx_get_system_clock
/* RFD */
rlwinm r7, r3, 13, 29, 31
/* Calculate system clock (Table 11-10 [MPC5567 Microcontroller Reference Manual]) */
LWI r8, FMPLL_REF_CLOCK
LWI r8, MPC55XX_FMPLL_REF_CLOCK
addi r5, r5, 1
addi r6, r6, 4
mullw r6, r6, r8
sraw r6, r6, r7
divw r3, r6, r5
#endif
blr

41
c/src/lib/libcpu/powerpc/mpc55xx/siu/siu.c Normal file
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@@ -0,0 +1,41 @@
/**
* @file
*
* @ingroup mpc55xx
*
* @brief System Integration Unit Access (SIU).
*/
/*
* Copyright (c) 2010
* Embedded Brains GmbH
* Obere Lagerstr. 30
* D-82178 Puchheim
* Germany
* rtems@embedded-brains.de
*
* The license and distribution terms for this file may be found in the file
* LICENSE in this distribution or at http://www.rtems.com/license/LICENSE.
*/
#include <mpc55xx/regs.h>
#include <mpc55xx/mpc55xx.h>
#include <mpc55xx/siu.h>
rtems_status_code mpc55xx_siu_pcr_init(volatile struct SIU_tag *siu,
const mpc55xx_siu_pcr_entry_t *pcr_entry)
{
int idx,cnt;
/*
* repeat, until end of list reached (pcr_cnt = 0)
*/
while ((pcr_entry != NULL) &&
(pcr_entry->pcr_cnt > 0)) {
idx = pcr_entry->pcr_idx;
for (cnt = pcr_entry->pcr_cnt;cnt > 0;cnt--) {
siu->PCR[idx++].R = pcr_entry->pcr_val.R;
}
pcr_entry++;
}
return RTEMS_SUCCESSFUL;
}