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powerpc: Use PPC_HAS_FPU

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Provide floating point context support only if PPC_HAS_FPU == 1.
This commit is contained in:
Sebastian Huber
2014-12-23 12:27:53 +01:00
parent 0d0095f1f0
commit 2e19bfde2f
2 changed files with 8 additions and 6 deletions
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12
c/src/lib/libcpu/powerpc/new-exceptions/cpu_asm.S
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@@ -56,8 +56,12 @@
#define PPC_CONTEXT_CACHE_LINE_3 (4 * PPC_DEFAULT_CACHE_LINE_SIZE) #define PPC_CONTEXT_CACHE_LINE_3 (4 * PPC_DEFAULT_CACHE_LINE_SIZE)
#define PPC_CONTEXT_CACHE_LINE_4 (5 * PPC_DEFAULT_CACHE_LINE_SIZE) #define PPC_CONTEXT_CACHE_LINE_4 (5 * PPC_DEFAULT_CACHE_LINE_SIZE)
BEGIN_CODE
#if PPC_HAS_FPU == 1
/* /*
* Offsets for various Contexts * Offsets for Context_Control_fp
*/ */
#if (PPC_HAS_DOUBLE==1) #if (PPC_HAS_DOUBLE==1)
@@ -104,7 +108,6 @@
.set FP_31, (FP_30 + FP_SIZE) .set FP_31, (FP_30 + FP_SIZE)
.set FP_FPSCR, (FP_31 + FP_SIZE) .set FP_FPSCR, (FP_31 + FP_SIZE)
BEGIN_CODE
/* /*
* _CPU_Context_save_fp_context * _CPU_Context_save_fp_context
* *
@@ -121,7 +124,6 @@
ALIGN (PPC_CACHE_ALIGNMENT, PPC_CACHE_ALIGN_POWER) ALIGN (PPC_CACHE_ALIGNMENT, PPC_CACHE_ALIGN_POWER)
PUBLIC_PROC (_CPU_Context_save_fp) PUBLIC_PROC (_CPU_Context_save_fp)
PROC (_CPU_Context_save_fp): PROC (_CPU_Context_save_fp):
#if (PPC_HAS_FPU == 1)
/* A FP context switch may occur in an ISR or exception handler when the FPU is not /* A FP context switch may occur in an ISR or exception handler when the FPU is not
* available. Therefore, we must explicitely enable it here! * available. Therefore, we must explicitely enable it here!
*/ */
@@ -171,7 +173,6 @@ PROC (_CPU_Context_save_fp):
mtmsr r4 mtmsr r4
isync isync
1: 1:
#endif
blr blr
/* /*
@@ -190,7 +191,6 @@ PROC (_CPU_Context_save_fp):
ALIGN (PPC_CACHE_ALIGNMENT, PPC_CACHE_ALIGN_POWER) ALIGN (PPC_CACHE_ALIGNMENT, PPC_CACHE_ALIGN_POWER)
PUBLIC_PROC (_CPU_Context_restore_fp) PUBLIC_PROC (_CPU_Context_restore_fp)
PROC (_CPU_Context_restore_fp): PROC (_CPU_Context_restore_fp):
#if (PPC_HAS_FPU == 1)
lwz r3, 0(r3) lwz r3, 0(r3)
/* A FP context switch may occur in an ISR or exception handler when the FPU is not /* A FP context switch may occur in an ISR or exception handler when the FPU is not
* available. Therefore, we must explicitely enable it here! * available. Therefore, we must explicitely enable it here!
@@ -240,8 +240,8 @@ PROC (_CPU_Context_restore_fp):
mtmsr r4 mtmsr r4
isync isync
1: 1:
#endif
blr blr
#endif /* PPC_HAS_FPU == 1 */
ALIGN (PPC_CACHE_ALIGNMENT, PPC_CACHE_ALIGN_POWER) ALIGN (PPC_CACHE_ALIGNMENT, PPC_CACHE_ALIGN_POWER)
PUBLIC_PROC (_CPU_Context_switch) PUBLIC_PROC (_CPU_Context_switch)

2
cpukit/score/cpu/powerpc/rtems/score/cpu.h
View File

@@ -392,6 +392,7 @@ static inline ppc_context *ppc_get_context( const Context_Control *context )
#ifndef ASM #ifndef ASM
typedef struct { typedef struct {
#if (PPC_HAS_FPU == 1)
/* The ABIs (PowerOpen/SVR4/EABI) only require saving f14-f31 over /* The ABIs (PowerOpen/SVR4/EABI) only require saving f14-f31 over
* procedure calls. However, this would mean that the interrupt * procedure calls. However, this would mean that the interrupt
* frame had to hold f0-f13, and the fpscr. And as the majority * frame had to hold f0-f13, and the fpscr. And as the majority
@@ -405,6 +406,7 @@ typedef struct {
float f[32]; float f[32];
uint32_t fpscr; uint32_t fpscr;
#endif #endif
#endif /* (PPC_HAS_FPU == 1) */
} Context_Control_fp; } Context_Control_fp;
typedef struct CPU_Interrupt_frame { typedef struct CPU_Interrupt_frame {