forked from Imagelibrary/rtems
doxygen: refactored doxygen in libbsp/arm/lpc32xx
This patch refactors a lot of the existing doxygen within libbsp/arm/lpc32xx. Much of this refactoring was just renaming of existing groups to conform to a more consistent naming structure. With the addition of a doxygen header for tm27.h, all files within lpc32xx belong to doxygen group now. lpc32xx should be used a reference for adding doxygen to other bsps.
This commit is contained in:
committed by
Gedare Bloom
parent
ad36dc2c36
commit
2d6543d4c8
@@ -1,7 +1,7 @@
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/**
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* @file
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*
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* @ingroup lpc32xx
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* @ingroup arm_lpc32xx
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*
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* @brief Console configuration.
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*/
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@@ -1,7 +1,7 @@
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/**
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* @file
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*
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* @ingroup lpc32xx
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* @ingroup arm_lpc32xx
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*
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* @brief High speed UART driver (14-clock).
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*/
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@@ -33,7 +33,7 @@ extern "C" {
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/**
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* @defgroup lpc32xx_boot Boot Support
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*
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* @ingroup lpc32xx
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* @ingroup arm_lpc32xx
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*
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* @brief Boot support.
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*
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@@ -1,7 +1,7 @@
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/**
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* @file
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*
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* @ingroup lpc32xx
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* @ingroup arm_lpc32xx
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*
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* @brief Global BSP definitions.
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*/
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@@ -43,9 +43,9 @@ extern "C" {
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struct rtems_bsdnet_ifconfig;
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/**
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* @defgroup lpc32xx LPC32XX Support
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* @defgroup arm_lpc32xx LPC32XX Support
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*
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* @ingroup bsp_kit
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* @ingroup bsp_arm
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*
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* @brief LPC32XX support package.
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*
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@@ -247,7 +247,7 @@ extern uint32_t lpc32xx_magic_zero_size [];
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/**
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* @defgroup lpc LPC Support
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*
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* @ingroup lpc32xx
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* @ingroup arm_lpc32xx
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*
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* @brief LPC support package.
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*/
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@@ -33,7 +33,7 @@ extern "C" {
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/**
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* @defgroup lpc32xx_i2c I2C Support
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*
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* @ingroup lpc32xx
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* @ingroup arm_lpc32xx
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*
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* @brief I2C Support
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*
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@@ -1,7 +1,7 @@
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/**
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* @file
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*
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* @ingroup bsp_interrupt
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* @ingroup lpc32xx_interrupt
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*
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* @brief Interrupt definitions.
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*/
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@@ -33,7 +33,11 @@ extern "C" {
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#endif /* __cplusplus */
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/**
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* @addtogroup bsp_interrupt
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* @defgroup lpc32xx_interrupt Interrupt Support
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*
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* @ingroup arm_lpc32xx
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*
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* @ingroup bsp_interrupt
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*
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* @{
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*/
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@@ -33,7 +33,7 @@
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/**
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* @defgroup lpc32xx_reg Register Definitions
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*
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* @ingroup lpc32xx
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* @ingroup arm_lpc32xx
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*
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* @brief Register definitions.
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*
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@@ -32,7 +32,7 @@ extern "C" {
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/**
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* @defgroup lpc32xx_mmu MMU Support
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*
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* @ingroup lpc32xx
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* @ingroup arm_lpc32xx
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*
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* @brief MMU support.
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*
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@@ -36,7 +36,7 @@ extern "C" {
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/**
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* @defgroup lpc32xx_nand_mlc NAND MLC Controller
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*
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* @ingroup lpc32xx
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* @ingroup arm_lpc32xx
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*
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* @brief NAND MLC Controller.
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*
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@@ -1,3 +1,10 @@
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/* @file
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*
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* @ingroup arm_lpc32xx
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*
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* @brief Implementations of interrupt mechanisms for Time Test 27
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*/
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/*
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* Copyright (c) 2010 embedded brains GmbH. All rights reserved.
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*
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@@ -1,7 +1,7 @@
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/**
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* @file
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*
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* @ingroup bsp_interrupt
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* @ingroup lpc32xx_interrupt
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*
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* @brief Interrupt support.
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*/
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@@ -1,7 +1,7 @@
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/**
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* @file
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*
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* @ingroup lpc32xx
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* @ingroup arm_lpc32xx
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*
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* @brief bsp_idle_thread() implementation.
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*/
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@@ -1,7 +1,7 @@
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/**
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* @file
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*
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* @ingroup lpc32xx
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* @ingroup arm_lpc32xx
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*
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* @brief NAND controller selection.
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*/
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@@ -1,7 +1,7 @@
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/**
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* @file
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*
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* @ingroup lpc32xx
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* @ingroup arm_lpc32xx
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*
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* @brief Restart implementation.
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*/
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@@ -1,7 +1,7 @@
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/**
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* @file
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*
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* @ingroup lpc32xx
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* @ingroup arm_lpc32xx
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*
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* @brief System clocks.
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*/
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@@ -1,7 +1,7 @@
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/**
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* @file
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*
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* @ingroup lpc32xx
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* @ingroup arm_lpc32xx
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*
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* @brief Benchmark timer support.
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*/
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@@ -1,7 +1,7 @@
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/**
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* @file
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*
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* @ingroup lpc32xx
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* @ingroup arm_lpc32xx
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*
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* @brief RTC configuration.
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*/
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@@ -1,7 +1,7 @@
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/**
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* @file
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*
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* @ingroup lpc32xx
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* @ingroup arm_lpc32xx
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*
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* @brief Reset code.
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*/
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@@ -1,7 +1,7 @@
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/**
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* @file
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*
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* @ingroup lpc32xx
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* @ingroup arm_lpc32xx
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*
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* @brief Startup code.
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*/
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@@ -1,7 +1,7 @@
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/**
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* @file
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*
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* @ingroup lpc32xx
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* @ingroup arm_lpc32xx
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*
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* @brief Startup code.
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*/
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@@ -1,3 +1,12 @@
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/**
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* @file
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*
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* @ingroup arm_start
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*
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* @brief Arm CP15 start.
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*/
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/*
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* Copyright (c) 2013 Hesham AL-Matary.
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* Copyright (c) 2009-2013 embedded brains GmbH. All rights reserved.
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@@ -33,8 +33,8 @@ extern "C" {
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/**
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* @defgroup lpc_dma DMA Support
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*
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* @ingroup lpc24xx
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* @ingroup lpc32xx
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* @ingroup arm_lpc24xx
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* @ingroup arm_lpc32xx
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*
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* @brief DMA support.
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*
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@@ -32,8 +32,8 @@ extern "C" {
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/**
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* @defgroup lpc_emc EMC Support
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*
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* @ingroup lpc24xx
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* @ingroup lpc32xx
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* @ingroup arm_lpc24xx
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* @ingroup arm_lpc32xx
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*
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* @brief EMC Support
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*
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@@ -32,8 +32,8 @@ extern "C" {
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/**
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* @defgroup lpc_i2s I2S Support
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*
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* @ingroup lpc24xx
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* @ingroup lpc32xx
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* @ingroup arm_lpc24xx
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* @ingroup arm_lpc32xx
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*
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* @brief I2S support.
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*
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@@ -33,7 +33,7 @@ extern "C" {
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* @defgroup lpc_lcd LCD Support
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*
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* @ingroup lpc
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* @ingroup lpc32xx
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* @ingroup arm_lpc32xx
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*
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* @brief LCD support.
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*
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@@ -31,8 +31,8 @@ extern "C" {
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/**
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* @defgroup lpc_timer Timer Support
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*
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* @ingroup lpc24xx
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* @ingroup lpc32xx
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* @ingroup arm_lpc24xx
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* @ingroup arm_lpc32xx
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*
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* @brief Timer support.
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*
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@@ -92,6 +92,8 @@ static inline rtems_vector_number bsp_interrupt_handler_index(
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*
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* @ingroup rtems_interrupt_extension
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*
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* @brief Generic BSP Interrupt Support
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*
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* The BSP interrupt support manages a sequence of interrupt vector numbers
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* ranging from @ref BSP_INTERRUPT_VECTOR_MIN to @ref BSP_INTERRUPT_VECTOR_MAX
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* including the end points. It provides methods to
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@@ -29,14 +29,6 @@
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extern "C" {
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#endif /* __cplusplus */
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/**
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* @defgroup bsp_interrupt BSP Interrupt Information
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*
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* @ingroup rtems_interrupt_extension
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*
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* @{
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*/
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/**
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* @brief Prints interrupt information via the printk plugin @a print with the
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* context @a context.
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@@ -26,12 +26,6 @@
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#include <stdint.h>
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/**
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* @addtogroup bsp_interrupt
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*
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* @{
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*/
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/**
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* @brief Minimum vector number.
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*/
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@@ -80,6 +74,4 @@
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*/
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#undef BSP_INTERRUPT_CUSTOM_VALID_VECTOR
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/** @} */
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#endif /* LIBBSP_SHARED_IRQ_CONFIG_H */
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