RTOS/rtems
1
0
Fork 0
forked from Imagelibrary/rtems
Code Pull Requests Activity

Update for exception support changes.

Browse Source
This commit is contained in:
Thomas Doerfler
2009-10-23 07:32:46 +00:00
parent cc1e864dfe
commit 2d2de4eba1
103 changed files with 1609 additions and 1588 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
c/src/lib/libbsp/powerpc/ChangeLog
View File

@@ -1,3 +1,9 @@
2009-10-22 Sebastian Huber <sebastian.huber@embedded-brains.de>
* shared/clock/clock.c, shared/irq/irq_init.c,
shared/irq/openpic_i8259_irq.c: Changed exception header file
includes.
2009-10-20 Till Straumann <strauman@slac.stanford.edu>
* shared/startup/pgtbl_setup.c: Fixed compiler warnings

7
c/src/lib/libbsp/powerpc/ep1a/ChangeLog
View File

@@ -1,3 +1,10 @@
2009-10-22 Sebastian Huber <sebastian.huber@embedded-brains.de>
* Makefile.am, preinstall.am: Update for exception support changes.
* irq/irq_init.c, irq/openpic_xxx_irq.c: Changed exception header file
includes.
* startup/bspstart.c: Update for ppc_exc_initialize() changes.
2009-10-21 Ralf Corsépius <ralf.corsepius@rtems.org>
* make/custom/ep1a.cfg: Remove RTEMS_BSP_FAMILY.

4
c/src/lib/libbsp/powerpc/ep1a/Makefile.am
View File

@@ -65,8 +65,6 @@ libbsp_a_SOURCES += pci/no_host_bridge.c ../../powerpc/shared/pci/pci.c \
../../powerpc/shared/pci/pcifinddevice.c
include_bsp_HEADERS += ../../powerpc/shared/irq/irq.h \
../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/ppc_exc_bspsupp.h \
../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/vectors.h \
../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/irq_supp.h
# irq
libbsp_a_SOURCES += irq/irq_init.c irq/openpic_xxx_irq.c ../../powerpc/shared/irq/i8259.c
@@ -87,11 +85,11 @@ libbsp_a_SOURCES += ../../shared/vmeUniverse/vmeUniverse.c \
../../shared/vmeUniverse/vme_am_defs.h
libbsp_a_LIBADD = \
../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
../../../libcpu/@RTEMS_CPU@/shared/cpuIdent.rel \
../../../libcpu/@RTEMS_CPU@/shared/stack.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \
../../../libcpu/@RTEMS_CPU@/mpc6xx/clock.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/raw_exception.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/exc_bspsupport.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/irq_bspsupport.rel \
../../../libcpu/@RTEMS_CPU@/mpc6xx/mmu.rel \

2
c/src/lib/libbsp/powerpc/ep1a/irq/irq_init.c
View File

@@ -27,7 +27,7 @@
#include <bsp/openpic.h>
#include <bsp/irq.h>
#include <bsp.h>
#include <libcpu/raw_exception.h>
#include <bsp/vectors.h>
#include <bsp/motorola.h>
#include <rtems/bspIo.h>

1
c/src/lib/libbsp/powerpc/ep1a/irq/openpic_xxx_irq.c
View File

@@ -18,7 +18,6 @@
#include <bsp/irq_supp.h>
#include <bsp/VMEConfig.h>
#include <bsp/openpic.h>
#include <libcpu/raw_exception.h>
#include <libcpu/io.h>
#include <bsp/vectors.h>
#include <stdlib.h>

8
c/src/lib/libbsp/powerpc/ep1a/preinstall.am
View File

@@ -105,14 +105,6 @@ $(PROJECT_INCLUDE)/bsp/irq.h: ../../powerpc/shared/irq/irq.h $(PROJECT_INCLUDE)/
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq.h
$(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/ppc_exc_bspsupp.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h
$(PROJECT_INCLUDE)/bsp/vectors.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/vectors.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vectors.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vectors.h
$(PROJECT_INCLUDE)/bsp/irq_supp.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/irq_supp.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq_supp.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq_supp.h

12
c/src/lib/libbsp/powerpc/ep1a/startup/bspstart.c
View File

@@ -277,8 +277,9 @@ void Read_ep1a_config_registers( ppc_cpu_id_t myCpu ) {
void bsp_start( void )
{
uint32_t intrStackStart;
uint32_t intrStackSize;
rtems_status_code sc = RTEMS_SUCCESSFUL;
uintptr_t intrStackStart;
uintptr_t intrStackSize;
ppc_cpu_id_t myCpu;
ppc_cpu_revision_t myCpuRevision;
Triv121PgTbl pt=0; /* R = e; */
@@ -315,17 +316,20 @@ ShowBATS();
/*
* Initialize the interrupt related settings.
*/
intrStackStart = (uint32_t) __rtems_end;
intrStackStart = (uintptr_t) __rtems_end;
intrStackSize = rtems_configuration_get_interrupt_stack_size();
/*
* Initialize default raw exception hanlders.
*/
ppc_exc_initialize(
sc = ppc_exc_initialize(
PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
intrStackStart,
intrStackSize
);
if (sc != RTEMS_SUCCESSFUL) {
BSP_panic("cannot initialize exceptions");
}
/*
* Init MMU block address translation to enable hardware

7
c/src/lib/libbsp/powerpc/gen5200/ChangeLog
View File

@@ -1,3 +1,10 @@
2009-10-22 Sebastian Huber <sebastian.huber@embedded-brains.de>
* Makefile.am, preinstall.am: Update for exception support changes.
* irq/irq.c: Changed exception header file includes.
* startup/bspstart.c: Changed exception header file includes. Update
for ppc_exc_initialize() changes.
2009-10-22 Ralf Corsépius <ralf.corsepius@rtems.org>
* clock/clock.c: Add missing prototypes.

5
c/src/lib/libbsp/powerpc/gen5200/Makefile.am
View File

@@ -68,9 +68,7 @@ libbsp_a_SOURCES += i2c/i2c.c i2c/i2cdrv.c i2c/mpc5200mbus.c i2c/mpc5200mbus.h
# ide
libbsp_a_SOURCES += ide/idecfg.c ide/pcmcia_ide.c ide/pcmcia_ide.h
include_bsp_HEADERS = ../../../libcpu/@RTEMS_CPU@/new-exceptions/bspsupport/vectors.h \
../../../libcpu/@RTEMS_CPU@/new-exceptions/bspsupport/ppc_exc_bspsupp.h \
../../shared/include/irq-generic.h \
include_bsp_HEADERS = ../../shared/include/irq-generic.h \
include/irq-config.h \
include/irq.h \
include/i2cdrv.h \
@@ -134,7 +132,6 @@ libbsp_a_LIBADD = ../../../libcpu/@RTEMS_CPU@/shared/cpuIdent.rel \
../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
../../../libcpu/@RTEMS_CPU@/shared/stack.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/raw_exception.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/exc_bspsupport.rel \
../../../libcpu/@RTEMS_CPU@/mpc6xx/mmu.rel \
../../../libcpu/@RTEMS_CPU@/mpc6xx/timer.rel

4
c/src/lib/libbsp/powerpc/gen5200/irq/irq.c
View File

@@ -76,12 +76,10 @@
#include <rtems.h>
#include <libcpu/powerpc-utility.h>
#include <libcpu/raw_exception.h>
#include <bsp/vectors.h>
#include <bsp.h>
#include <bsp/irq.h>
#include <bsp/vectors.h>
#include <bsp/ppc_exc_bspsupp.h>
#include <bsp/irq-generic.h>
#include <bsp/mpc5200.h>

8
c/src/lib/libbsp/powerpc/gen5200/preinstall.am
View File

@@ -101,14 +101,6 @@ $(PROJECT_LIB)/linkcmds.pm520: startup/linkcmds.pm520 $(PROJECT_LIB)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.pm520
PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.pm520
$(PROJECT_INCLUDE)/bsp/vectors.h: ../../../libcpu/@RTEMS_CPU@/new-exceptions/bspsupport/vectors.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vectors.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vectors.h
$(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h: ../../../libcpu/@RTEMS_CPU@/new-exceptions/bspsupport/ppc_exc_bspsupp.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h
$(PROJECT_INCLUDE)/bsp/irq-generic.h: ../../shared/include/irq-generic.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-generic.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-generic.h

23
c/src/lib/libbsp/powerpc/gen5200/startup/bspstart.c
View File

@@ -94,17 +94,15 @@
/* */
/***********************************************************************/
#warning The interrupt disable mask is now stored in SPRG0, please verify that this is compatible to this BSP (see also bootcard.c).
#include <rtems.h>
#include <libcpu/powerpc-utility.h>
#include <libcpu/raw_exception.h>
#include <bsp.h>
#include <bsp/vectors.h>
#include <bsp/bootcard.h>
#include <bsp/ppc_exc_bspsupp.h>
#include <bsp/irq.h>
#include <bsp/irq-generic.h>
#if defined(HAS_UBOOT)
/* will be overwritten from startup code */
@@ -132,6 +130,7 @@ void _BSP_Fatal_error(unsigned int v)
void bsp_start(void)
{
rtems_status_code sc = RTEMS_SUCCESSFUL;
ppc_cpu_id_t myCpu;
ppc_cpu_revision_t myCpuRevision;
@@ -170,15 +169,19 @@ void bsp_start(void)
/* Initialize exception handler */
ppc_exc_cache_wb_check = 0;
ppc_exc_initialize(
sc = ppc_exc_initialize(
PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
(uint32_t) bsp_interrupt_stack_start,
(uint32_t) bsp_interrupt_stack_size
(uintptr_t) bsp_interrupt_stack_start,
(uintptr_t) bsp_interrupt_stack_size
);
if (sc != RTEMS_SUCCESSFUL) {
BSP_panic("cannot initialize exceptions");
}
/* Initalize interrupt support */
if (bsp_interrupt_initialize() != RTEMS_SUCCESSFUL) {
BSP_panic( "Cannot intitialize interrupt support\n");
sc = bsp_interrupt_initialize();
if (sc != RTEMS_SUCCESSFUL) {
BSP_panic("cannot intitialize interrupts");
}
/*

7
c/src/lib/libbsp/powerpc/gen83xx/ChangeLog
View File

@@ -1,3 +1,10 @@
2009-10-22 Sebastian Huber <sebastian.huber@embedded-brains.de>
* Makefile.am, preinstall.am: Update for exception support changes.
* irq/irq.c, irq/irq_init.c: Changed exception header file includes.
* startup/bspstart.c: Changed exception header file includes. Update
for ppc_exc_initialize() changes.
2009-10-21 Ralf Corsépius <ralf.corsepius@rtems.org>
* make/custom/gen83xx.inc: Remove RTEMS_BSP_FAMILY.

11
c/src/lib/libbsp/powerpc/gen83xx/Makefile.am
View File

@@ -66,16 +66,18 @@ libbsp_a_SOURCES += ../shared/clock/clock.c
include_bsp_HEADERS = include/irq.h \
include/irq-config.h \
../../shared/include/irq-generic.h \
../../shared/include/irq-info.h \
include/hwreg_vals.h \
../shared/include/u-boot.h \
../shared/include/tictac.h
# irq
libbsp_a_SOURCES += include/irq.h \
include/irq-config.h \
irq/irq.c \
libbsp_a_SOURCES += irq/irq.c \
../../shared/src/irq-generic.c \
../../shared/src/irq-legacy.c
../../shared/src/irq-legacy.c \
../../shared/src/irq-info.c \
../../shared/src/irq-shell.c \
../../shared/src/irq-server.c
# console
libbsp_a_SOURCES += console/console.c console/ns16550cfg.c
@@ -95,7 +97,6 @@ endif
libbsp_a_LIBADD = ../../../libcpu/@RTEMS_CPU@/shared/cpuIdent.rel \
../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/raw_exception.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/exc_bspsupport.rel \
../../../libcpu/@RTEMS_CPU@/mpc6xx/mmu.rel \
../../../libcpu/@RTEMS_CPU@/mpc6xx/timer.rel \

4
c/src/lib/libbsp/powerpc/gen83xx/include/tm27.h
View File

@@ -24,9 +24,7 @@
#define TMTESTS_TM27_H
#include <libcpu/powerpc-utility.h>
#include <libcpu/raw_exception.h>
#include <bsp/ppc_exc_bspsupp.h>
#include <bsp/vectors.h>
#define MUST_WAIT_FOR_INTERRUPT 1

4
c/src/lib/libbsp/powerpc/gen83xx/irq/irq.c
View File

@@ -22,12 +22,10 @@
#include <rtems.h>
#include <libcpu/powerpc-utility.h>
#include <libcpu/raw_exception.h>
#include <bsp/vectors.h>
#include <bsp.h>
#include <bsp/irq.h>
#include <bsp/vectors.h>
#include <bsp/ppc_exc_bspsupp.h>
#include <bsp/irq-generic.h>
#define MPC83XX_IPIC_VECTOR_NUMBER 92

4
c/src/lib/libbsp/powerpc/gen83xx/preinstall.am
View File

@@ -101,6 +101,10 @@ $(PROJECT_INCLUDE)/bsp/irq-generic.h: ../../shared/include/irq-generic.h $(PROJE
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-generic.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-generic.h
$(PROJECT_INCLUDE)/bsp/irq-info.h: ../../shared/include/irq-info.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-info.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-info.h
$(PROJECT_INCLUDE)/bsp/hwreg_vals.h: include/hwreg_vals.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/hwreg_vals.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/hwreg_vals.h

21
c/src/lib/libbsp/powerpc/gen83xx/startup/bspstart.c
View File

@@ -21,12 +21,11 @@
*/
#include <libcpu/powerpc-utility.h>
#include <libcpu/raw_exception.h>
#include <bsp.h>
#include <bsp/vectors.h>
#include <bsp/bootcard.h>
#include <bsp/irq-generic.h>
#include <bsp/ppc_exc_bspsupp.h>
#ifdef HAS_UBOOT
@@ -84,13 +83,12 @@ void _BSP_Fatal_error(unsigned n)
void bsp_start( void)
{
rtems_status_code sc = RTEMS_SUCCESSFUL;
int rv = 0;
ppc_cpu_id_t myCpu;
ppc_cpu_revision_t myCpuRevision;
uint32_t interrupt_stack_start = (uint32_t) bsp_interrupt_stack_start;
uint32_t interrupt_stack_size = (uint32_t) bsp_interrupt_stack_size;
uintptr_t interrupt_stack_start = (uintptr_t) bsp_interrupt_stack_start;
uintptr_t interrupt_stack_size = (uintptr_t) bsp_interrupt_stack_size;
/*
* Get CPU identification dynamically. Note that the get_ppc_cpu_type() function
@@ -130,22 +128,25 @@ void bsp_start( void)
#endif /* HAS_UBOOT */
/* Initialize exception handler */
ppc_exc_initialize(
sc = ppc_exc_initialize(
PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
interrupt_stack_start,
interrupt_stack_size
);
if (sc != RTEMS_SUCCESSFUL) {
BSP_panic("cannot initialize exceptions");
}
/* Install default handler for the decrementer exception */
rv = ppc_exc_set_handler( ASM_DEC_VECTOR, mpc83xx_decrementer_exception_handler);
if (rv < 0) {
BSP_panic( "Cannot install decrementer exception handler!\n");
sc = ppc_exc_set_handler( ASM_DEC_VECTOR, mpc83xx_decrementer_exception_handler);
if (sc != RTEMS_SUCCESSFUL) {
BSP_panic("cannot install decrementer exception handler");
}
/* Initalize interrupt support */
sc = bsp_interrupt_initialize();
if (sc != RTEMS_SUCCESSFUL) {
BSP_panic( "Cannot intitialize interrupt support\n");
BSP_panic("cannot intitialize interrupts\n");
}
#ifdef SHOW_MORE_INIT_SETTINGS

7
c/src/lib/libbsp/powerpc/haleakala/ChangeLog
View File

@@ -1,3 +1,10 @@
2009-10-22 Sebastian Huber <sebastian.huber@embedded-brains.de>
* Makefile.am, preinstall.am: Update for exception support changes.
* irq/irq.c, include/tm27.h: Changed exception header file includes.
* startup/bspstart.c: Changed exception header file includes. Update
for ppc_exc_initialize() changes.
2009-10-21 Ralf Corsépius <ralf.corsepius@rtems.org>
* make/custom/haleakala.cfg: Remove RTEMS_BSP_FAMILY.

6
c/src/lib/libbsp/powerpc/haleakala/Makefile.am
View File

@@ -46,17 +46,15 @@ libbsp_a_SOURCES += ../../powerpc/shared/console/uart.c \
../../powerpc/shared/console/console.c
include_bsp_HEADERS += irq/irq.h \
../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/vectors.h \
../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/irq_supp.h \
../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/ppc_exc_bspsupp.h
../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/irq_supp.h
# irq
libbsp_a_SOURCES += irq/irq_init.c irq/irq.c
libbsp_a_LIBADD = ../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/raw_exception.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/exc_bspsupport.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/irq_bspsupport.rel \
../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
../../../libcpu/@RTEMS_CPU@/shared/cpuIdent.rel \
../../../libcpu/@RTEMS_CPU@/ppc403/clock.rel \
../../../libcpu/@RTEMS_CPU@/ppc403/timer.rel

4
c/src/lib/libbsp/powerpc/haleakala/irq/irq.c
View File

@@ -14,7 +14,7 @@
#include <bsp.h>
#include <bsp/irq.h>
#include <bsp/irq_supp.h>
#include <libcpu/raw_exception.h>
#include <bsp/vectors.h>
#include <libcpu/powerpc-utility.h>
@@ -166,7 +166,7 @@ BSP_setup_the_pic(rtems_irq_global_settings* config)
*/
int
C_dispatch_irq_handler( struct _BSP_Exception_frame* frame, unsigned int excNum )
C_dispatch_irq_handler( BSP_Exception_frame* frame, unsigned int excNum )
{
if (excNum == ASM_EXT_VECTOR) {
uint32_t active[kUICWords];

2
c/src/lib/libbsp/powerpc/haleakala/irq/irq.h
View File

@@ -139,7 +139,7 @@ extern "C" {
#define BSP_UART_COM1_IRQ BSP_UIC_UART0 /* Required by shared/console/uart.c */
#define BSP_UART_COM2_IRQ BSP_UIC_UART1
/* Define processor IRQ numbers; IRQs that are handled by the raw_exception vectors */
/* Define processor IRQ numbers; IRQs that are handled by the exception vectors */
#define BSP_PIT BSP_PROCESSOR_IRQ_LOWEST_OFFSET /* Required by ppc403/clock.c */
#define BSP_FIT BSP_PROCESSOR_IRQ_LOWEST_OFFSET + 1

2
c/src/lib/libbsp/powerpc/haleakala/irq/irq_init.c
View File

@@ -13,7 +13,7 @@
#include <libcpu/spr.h>
#include <bsp/irq.h>
#include <bsp.h>
#include <libcpu/raw_exception.h>
#include <bsp/vectors.h>
#include <rtems/bspIo.h>
#include <rtems/powerpc/powerpc.h>

8
c/src/lib/libbsp/powerpc/haleakala/preinstall.am
View File

@@ -77,15 +77,7 @@ $(PROJECT_INCLUDE)/bsp/irq.h: irq/irq.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq.h
$(PROJECT_INCLUDE)/bsp/vectors.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/vectors.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vectors.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vectors.h
$(PROJECT_INCLUDE)/bsp/irq_supp.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/irq_supp.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq_supp.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq_supp.h
$(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/ppc_exc_bspsupp.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h

17
c/src/lib/libbsp/powerpc/haleakala/startup/bspstart.c
View File

@@ -64,10 +64,8 @@
#include <bsp.h>
#include <bsp/uart.h>
#include <bsp/irq.h>
#include <rtems/bspIo.h>
#include <libcpu/cpuIdent.h>
#include <rtems/powerpc/powerpc.h>
#include <bsp/ppc_exc_bspsupp.h>
#include <libcpu/powerpc-utility.h>
#include <bsp/vectors.h>
#include <ppc4xx/ppc405gp.h>
#include <ppc4xx/ppc405ex.h>
@@ -171,6 +169,7 @@ BSP_output_char_function_type BSP_output_char = DirectUARTWrite;
*/
void bsp_start( void )
{
rtems_status_code sc = RTEMS_SUCCESSFUL;
LINKER_SYMBOL(intrStack_start);
LINKER_SYMBOL(intrStack_size);
ppc_cpu_id_t myCpu;
@@ -205,10 +204,14 @@ void bsp_start( void )
/*
* Initialize default raw exception handlers.
*/
ppc_exc_initialize(
sc = ppc_exc_initialize(
PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
(uint32_t) intrStack_start,
(uint32_t) intrStack_size);
(uintptr_t) intrStack_start,
(uintptr_t) intrStack_size
);
if (sc != RTEMS_SUCCESSFUL) {
BSP_panic("cannot initialize exceptions");
}
/*
* Install our own set of exception vectors

9
c/src/lib/libbsp/powerpc/mbx8xx/ChangeLog
View File

@@ -1,3 +1,12 @@
2009-10-23 Sebastian Huber <sebastian.huber@embedded-brains.de>
* include/irq-config.h: New file.
* Makefile.am, preinstall.am: Update for exception support changes.
Use generic interrupt support.
* make/custom/mbx8xx.inc, startup/linkcmds: Enable EABI.
* irq/irq.c, startup/bspstart.c: Converted to generic interrupt
support. Update for exception support changes.
2009-10-23 Ralf Corsépius <ralf.corsepius@rtems.org>
* irq/irq.h: Add BSP_irq_enabled_at_cpm.

17
c/src/lib/libbsp/powerpc/mbx8xx/Makefile.am
View File

@@ -21,7 +21,10 @@ noinst_PROGRAMS =
include_HEADERS += include/coverhd.h
include_bsp_HEADERS = include/mbx.h include/commproc.h include/8xx_immap.h \
irq/irq.h vectors/vectors.h
irq/irq.h \
include/irq-config.h \
../../shared/include/irq-generic.h \
../../shared/include/irq-info.h
EXTRA_DIST = times-mbx821 times-mbx860
@@ -35,12 +38,14 @@ libbsp_a_SOURCES += clock/p_clock.c
# console
libbsp_a_SOURCES += console/console.c
# irq
libbsp_a_SOURCES += irq/irq.c irq/irq_asm.S irq/irq_init.c
libbsp_a_SOURCES += irq/irq.c \
../../shared/src/irq-generic.c \
../../shared/src/irq-legacy.c \
../../shared/src/irq-info.c \
../../shared/src/irq-shell.c \
../../shared/src/irq-server.c
# ide
libbsp_a_SOURCES += ide/idecfg.c ide/pcmcia_ide.c
# vectors
libbsp_a_SOURCES += vectors/vectors.h vectors/vectors_init.c \
vectors/vectors.S
# startup
libbsp_a_SOURCES += ../../shared/bspclean.c ../../shared/bsplibc.c \
../../shared/bsppost.c ../../shared/bsppredriverhook.c \
@@ -61,7 +66,7 @@ libbsp_a_LIBADD = \
../../../libcpu/@RTEMS_CPU@/shared/cpuIdent.rel \
../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/raw_exception.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/exc_bspsupport.rel \
../../../libcpu/@RTEMS_CPU@/mpc8xx/clock.rel \
../../../libcpu/@RTEMS_CPU@/mpc8xx/console-generic.rel \
../../../libcpu/@RTEMS_CPU@/mpc8xx/cpm.rel \

373
c/src/lib/libbsp/powerpc/mbx8xx/irq/irq.c
View File

@@ -2,6 +2,8 @@
*
* This file contains the implementation of the function described in irq.h
*
* Copyright (c) 2009 embedded brains GmbH.
*
* Copyright (C) 1998, 1999 valette@crf.canon.fr
*
* The license and distribution terms for this file may be
@@ -14,25 +16,13 @@
#include <rtems/system.h>
#include <bsp.h>
#include <bsp/irq.h>
#include <rtems/score/thread.h>
#include <rtems/score/apiext.h>
#include <libcpu/raw_exception.h>
#include <bsp/irq-generic.h>
#include <bsp/vectors.h>
#include <bsp/8xx_immap.h>
#include <bsp/mbx.h>
#include <bsp/commproc.h>
/*
* default handler connected on each irq after bsp initialization
*/
static rtems_irq_connect_data default_rtems_entry;
/*
* location used to store initial tables used for interrupt
* management.
*/
static rtems_irq_global_settings* internal_config;
static rtems_irq_connect_data* rtems_hdl_tbl;
volatile unsigned int ppc_cached_irq_mask;
/*
* Check if symbolic IRQ name is an SIU IRQ
@@ -54,16 +44,6 @@ static inline int is_cpm_irq(const rtems_irq_number irqLine)
);
}
/*
* Check if symbolic IRQ name is a Processor IRQ
*/
static inline int is_processor_irq(const rtems_irq_number irqLine)
{
return (((int) irqLine <= BSP_PROCESSOR_IRQ_MAX_OFFSET) &
((int) irqLine >= BSP_PROCESSOR_IRQ_LOWEST_OFFSET)
);
}
/*
* masks used to mask off the interrupts. For exmaple, for ILVL2, the
* mask is used to mask off interrupts ILVL2, IRQ3, ILVL3, ... IRQ7
@@ -85,36 +65,6 @@ const static unsigned int SIU_IvectMask[BSP_SIU_IRQ_NUMBER] =
0xFFF00000, 0xFFF80000, 0xFFFC0000, 0xFFFE0000
};
/*
* ------------------------ RTEMS Irq helper functions ----------------
*/
/*
* Caution : this function assumes the variable "internal_config"
* is already set and that the tables it contains are still valid
* and accessible.
*/
static void compute_SIU_IvectMask_from_prio (void)
{
/*
* In theory this is feasible. No time to code it yet. See i386/shared/irq.c
* for an example based on 8259 controller mask. The actual masks defined
* correspond to the priorities defined for the SIU in irq_init.c.
*/
}
/*
* This function check that the value given for the irq line
* is valid.
*/
static int isValidInterrupt(int irq)
{
if ( (irq < BSP_LOWEST_OFFSET) || (irq > BSP_MAX_OFFSET) || (irq == BSP_CPM_INTERRUPT) )
return 0;
return 1;
}
int BSP_irq_enable_at_cpm(const rtems_irq_number irqLine)
{
int cpm_irq_index;
@@ -191,210 +141,6 @@ int BSP_irq_enabled_at_siu (const rtems_irq_number irqLine)
return ppc_cached_irq_mask & (1 << (31-siu_irq_index));
}
/*
* ------------------------ RTEMS Single Irq Handler Mngt Routines ----------------
*/
int BSP_install_rtems_irq_handler (const rtems_irq_connect_data* irq)
{
rtems_interrupt_level level;
if (!isValidInterrupt(irq->name)) {
return 0;
}
/*
* Check if default handler is actually connected. If not issue an error.
* You must first get the current handler via i386_get_current_idt_entry
* and then disconnect it using i386_delete_idt_entry.
* RATIONALE : to always have the same transition by forcing the user
* to get the previous handler before accepting to disconnect.
*/
if (rtems_hdl_tbl[irq->name].hdl != default_rtems_entry.hdl) {
return 0;
}
rtems_interrupt_disable(level);
/*
* store the data provided by user
*/
rtems_hdl_tbl[irq->name] = *irq;
if (is_cpm_irq(irq->name)) {
/*
* Enable interrupt at PIC level
*/
BSP_irq_enable_at_cpm (irq->name);
}
if (is_siu_irq(irq->name)) {
/*
* Enable interrupt at SIU level
*/
BSP_irq_enable_at_siu (irq->name);
}
if (is_processor_irq(irq->name)) {
/*
* Should Enable exception at processor level but not needed. Will restore
* EE flags at the end of the routine anyway.
*/
}
/*
* Enable interrupt on device
*/
if (irq->on)
irq->on(irq);
rtems_interrupt_enable(level);
return 1;
}
int BSP_get_current_rtems_irq_handler (rtems_irq_connect_data* irq)
{
if (!isValidInterrupt(irq->name)) {
return 0;
}
*irq = rtems_hdl_tbl[irq->name];
return 1;
}
int BSP_remove_rtems_irq_handler (const rtems_irq_connect_data* irq)
{
rtems_interrupt_level level;
if (!isValidInterrupt(irq->name)) {
return 0;
}
/*
* Check if default handler is actually connected. If not issue an error.
* You must first get the current handler via i386_get_current_idt_entry
* and then disconnect it using i386_delete_idt_entry.
* RATIONALE : to always have the same transition by forcing the user
* to get the previous handler before accepting to disconnect.
*/
if (rtems_hdl_tbl[irq->name].hdl != irq->hdl) {
return 0;
}
rtems_interrupt_disable(level);
if (is_cpm_irq(irq->name)) {
/*
* disable interrupt at PIC level
*/
BSP_irq_disable_at_cpm (irq->name);
}
if (is_siu_irq(irq->name)) {
/*
* disable interrupt at OPENPIC level
*/
BSP_irq_disable_at_siu (irq->name);
}
if (is_processor_irq(irq->name)) {
/*
* disable exception at processor level
*/
}
/*
* Disable interrupt on device
*/
if (irq->off)
irq->off(irq);
/*
* restore the default irq value
*/
rtems_hdl_tbl[irq->name] = default_rtems_entry;
rtems_interrupt_enable(level);
return 1;
}
/*
* ------------------------ RTEMS Global Irq Handler Mngt Routines ----------------
*/
int BSP_rtems_irq_mngt_set(rtems_irq_global_settings* config)
{
int i;
rtems_interrupt_level level;
/*
* Store various code accelerators
*/
internal_config = config;
default_rtems_entry = config->defaultEntry;
rtems_hdl_tbl = config->irqHdlTbl;
rtems_interrupt_disable(level);
/*
* start with CPM IRQ
*/
for (i=BSP_CPM_IRQ_LOWEST_OFFSET; i < BSP_CPM_IRQ_LOWEST_OFFSET + BSP_CPM_IRQ_NUMBER ; i++) {
if (rtems_hdl_tbl[i].hdl != default_rtems_entry.hdl) {
BSP_irq_enable_at_cpm (i);
if (rtems_hdl_tbl[i].on)
rtems_hdl_tbl[i].on(&rtems_hdl_tbl[i]);
}
else {
if (rtems_hdl_tbl[i].off)
rtems_hdl_tbl[i].off(&rtems_hdl_tbl[i]);
BSP_irq_disable_at_cpm (i);
}
}
/*
* continue with PCI IRQ
*/
/*
* set up internal tables used by rtems interrupt prologue
*/
compute_SIU_IvectMask_from_prio ();
for (i=BSP_SIU_IRQ_LOWEST_OFFSET; i < BSP_SIU_IRQ_LOWEST_OFFSET + BSP_SIU_IRQ_NUMBER ; i++) {
if (rtems_hdl_tbl[i].hdl != default_rtems_entry.hdl) {
BSP_irq_enable_at_siu (i);
if (rtems_hdl_tbl[i].on)
rtems_hdl_tbl[i].on(&rtems_hdl_tbl[i]);
}
else {
if (rtems_hdl_tbl[i].off)
rtems_hdl_tbl[i].off(&rtems_hdl_tbl[i]);
BSP_irq_disable_at_siu (i);
}
}
/*
* Must enable CPM interrupt on SIU. CPM on SIU Interrupt level has already been
* set up in BSP_CPM_irq_init.
*/
((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_cicr |= CICR_IEN;
BSP_irq_enable_at_siu (BSP_CPM_INTERRUPT);
/*
* finish with Processor exceptions handled like IRQ
*/
for (i=BSP_PROCESSOR_IRQ_LOWEST_OFFSET; i < BSP_PROCESSOR_IRQ_LOWEST_OFFSET + BSP_PROCESSOR_IRQ_NUMBER; i++) {
if (rtems_hdl_tbl[i].hdl != default_rtems_entry.hdl) {
if (rtems_hdl_tbl[i].on)
rtems_hdl_tbl[i].on(&rtems_hdl_tbl[i]);
}
else {
if (rtems_hdl_tbl[i].off)
rtems_hdl_tbl[i].off(&rtems_hdl_tbl[i]);
}
}
rtems_interrupt_enable(level);
return 1;
}
int BSP_rtems_irq_mngt_get(rtems_irq_global_settings** config)
{
*config = internal_config;
return 0;
}
#ifdef DISPATCH_HANDLER_STAT
volatile unsigned int maxLoop = 0;
#endif
@@ -402,7 +148,7 @@ volatile unsigned int maxLoop = 0;
/*
* High level IRQ handler called from shared_raw_irq_code_entry
*/
int C_dispatch_irq_handler (CPU_Interrupt_frame *frame, unsigned int excNum)
int C_dispatch_irq_handler (BSP_Exception_frame *frame, unsigned int excNum)
{
register unsigned int irq;
register unsigned cpmIntr; /* boolean */
@@ -420,7 +166,7 @@ int C_dispatch_irq_handler (CPU_Interrupt_frame *frame, unsigned int excNum)
new_msr = msr | MSR_EE;
_CPU_MSR_SET(new_msr);
rtems_hdl_tbl[BSP_DECREMENTER].hdl(rtems_hdl_tbl[BSP_DECREMENTER].handle);
bsp_interrupt_handler_dispatch(BSP_DECREMENTER);
_CPU_MSR_SET(msr);
return 0;
@@ -482,7 +228,7 @@ int C_dispatch_irq_handler (CPU_Interrupt_frame *frame, unsigned int excNum)
new_msr = msr | MSR_EE;
_CPU_MSR_SET(new_msr);
rtems_hdl_tbl[irq].hdl(rtems_hdl_tbl[irq].handle);
bsp_interrupt_handler_dispatch(irq);
_CPU_MSR_SET(msr);
@@ -505,21 +251,104 @@ int C_dispatch_irq_handler (CPU_Interrupt_frame *frame, unsigned int excNum)
return 0;
}
void _ThreadProcessSignalsFromIrq (BSP_Exception_frame* ctx)
void BSP_SIU_irq_init(void)
{
/*
* Process pending signals that have not already been
* processed by _Thread_Displatch. This happens quite
* unfrequently : the ISR must have posted an action
* to the current running thread.
* In theory we should initialize two registers at least :
* SIMASK, SIEL. SIMASK is reset at 0 value meaning no interrupt. But
* we should take care that a monitor may have restoreed to another value.
* If someone find a reasonnable value for SIEL, AND THE NEED TO CHANGE IT
* please feel free to add it here.
*/
if ( _Thread_Do_post_task_switch_extension ||
_Thread_Executing->do_post_task_switch_extension ) {
_Thread_Executing->do_post_task_switch_extension = false;
_API_extensions_Run_postswitch();
((volatile immap_t *)IMAP_ADDR)->im_siu_conf.sc_simask = 0;
((volatile immap_t *)IMAP_ADDR)->im_siu_conf.sc_sipend = 0xffff0000;
ppc_cached_irq_mask = 0;
((volatile immap_t *)IMAP_ADDR)->im_siu_conf.sc_siel = ((volatile immap_t *)IMAP_ADDR)->im_siu_conf.sc_siel;
}
/*
* I plan to process other thread related events here.
* This will include DEBUG session requested from keyboard...
* Initialize CPM interrupt management
*/
void
BSP_CPM_irq_init(void)
{
/*
* Initialize the CPM interrupt controller.
*/
((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_cicr =
#ifdef mpc860
(CICR_SCD_SCC4 | CICR_SCC_SCC3 | CICR_SCB_SCC2 | CICR_SCA_SCC1) |
#else
(CICR_SCB_SCC2 | CICR_SCA_SCC1) |
#endif
((BSP_CPM_INTERRUPT/2) << 13) | CICR_HP_MASK;
((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr = 0;
((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_cicr |= CICR_IEN;
}
rtems_status_code bsp_interrupt_vector_enable( rtems_vector_number irqnum)
{
if (is_cpm_irq(irqnum)) {
/*
* Enable interrupt at PIC level
*/
BSP_irq_enable_at_cpm (irqnum);
}
if (is_siu_irq(irqnum)) {
/*
* Enable interrupt at SIU level
*/
BSP_irq_enable_at_siu (irqnum);
}
return RTEMS_SUCCESSFUL;
}
rtems_status_code bsp_interrupt_vector_disable( rtems_vector_number irqnum)
{
if (is_cpm_irq(irqnum)) {
/*
* disable interrupt at PIC level
*/
BSP_irq_disable_at_cpm (irqnum);
}
if (is_siu_irq(irqnum)) {
/*
* disable interrupt at OPENPIC level
*/
BSP_irq_disable_at_siu (irqnum);
}
return RTEMS_SUCCESSFUL;
}
rtems_status_code bsp_interrupt_facility_initialize()
{
/* Install exception handler */
if (ppc_exc_set_handler( ASM_EXT_VECTOR, C_dispatch_irq_handler)) {
return RTEMS_IO_ERROR;
}
if (ppc_exc_set_handler( ASM_DEC_VECTOR, C_dispatch_irq_handler)) {
return RTEMS_IO_ERROR;
}
/* Initialize the interrupt controller */
BSP_SIU_irq_init();
BSP_CPM_irq_init();
/*
* Must enable CPM interrupt on SIU. CPM on SIU Interrupt level has already been
* set up in BSP_CPM_irq_init.
*/
((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_cicr |= CICR_IEN;
BSP_irq_enable_at_siu (BSP_CPM_INTERRUPT);
return RTEMS_SUCCESSFUL;
}
void bsp_interrupt_handler_default( rtems_vector_number vector)
{
printk( "Spurious interrupt: 0x%08x\n", vector);
}

3
c/src/lib/libbsp/powerpc/mbx8xx/make/custom/mbx8xx.inc
View File

@@ -40,7 +40,8 @@ RTEMS_CPU_MODEL=mpc$(8XX_CPU_TYPE)
# This contains the compiler options necessary to select the CPU model
# and (hopefully) optimize for it.
#
CPU_CFLAGS = -mcpu=$(8XX_CPU_TYPE) -Dmpc$(8XX_CPU_TYPE) -D$(RTEMS_MBX_MODEL)
CPU_CFLAGS = -mcpu=$(8XX_CPU_TYPE) -Dmpc$(8XX_CPU_TYPE) -D$(RTEMS_MBX_MODEL) \
-meabi -msdata -fno-common
# optimize flag: typically -O2
CFLAGS_OPTIMIZE_V = -O2 -g -fno-keep-inline-functions

14
c/src/lib/libbsp/powerpc/mbx8xx/preinstall.am
View File

@@ -68,9 +68,17 @@ $(PROJECT_INCLUDE)/bsp/irq.h: irq/irq.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq.h
$(PROJECT_INCLUDE)/bsp/vectors.h: vectors/vectors.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vectors.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vectors.h
$(PROJECT_INCLUDE)/bsp/irq-config.h: include/irq-config.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-config.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-config.h
$(PROJECT_INCLUDE)/bsp/irq-generic.h: ../../shared/include/irq-generic.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-generic.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-generic.h
$(PROJECT_INCLUDE)/bsp/irq-info.h: ../../shared/include/irq-info.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-info.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-info.h
$(PROJECT_LIB)/linkcmds: startup/linkcmds $(PROJECT_LIB)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds

37
c/src/lib/libbsp/powerpc/mbx8xx/startup/bspstart.c
View File

@@ -18,8 +18,6 @@
* $Id$
*/
#warning The interrupt disable mask is now stored in SPRG0, please verify that this is compatible to this BSP (see also bootcard.c).
#include <bsp.h>
#include <bsp/irq.h>
#include <rtems/bspIo.h>
@@ -29,8 +27,6 @@
SPR_RW(SPRG1)
extern unsigned long intrStackPtr;
/*
* Driver configuration parameters
*/
@@ -45,6 +41,9 @@ uint32_t bsp_timer_average_overhead; /* Average overhead of timer in ticks */
uint32_t bsp_timer_least_valid; /* Least valid number from timer */
bool bsp_timer_internal_clock; /* TRUE, when timer runs with CPU clk */
extern char IntrStack_start [];
extern char intrStack [];
void BSP_panic(char *s)
{
printk("%s PANIC %s\n",_RTEMS_version, s);
@@ -83,9 +82,9 @@ void _BSP_Fatal_error(unsigned int v)
*/
void bsp_start(void)
{
rtems_status_code sc = RTEMS_SUCCESSFUL;
ppc_cpu_id_t myCpu;
ppc_cpu_revision_t myCpuRevision;
register unsigned char* intrStack;
/*
* Get CPU identification dynamically. Note that the get_ppc_cpu_type() function
@@ -112,17 +111,22 @@ void bsp_start(void)
rtems_cache_enable_data();
#endif
#endif
/*
* Initialize some SPRG registers related to irq handling
*/
intrStack = (((unsigned char*)&intrStackPtr) - PPC_MINIMUM_STACK_FRAME_SIZE);
_write_SPRG1((unsigned int)intrStack);
/* Initialize exception handler */
sc = ppc_exc_initialize(
PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
(uintptr_t) IntrStack_start,
(uintptr_t) intrStack - (uintptr_t) IntrStack_start
);
if ( sc != RTEMS_SUCCESSFUL ) {
BSP_panic( "cannot initialize exceptions" );
}
/*
* Install our own set of exception vectors
*/
initialize_exceptions();
/* Initalize interrupt support */
sc = bsp_interrupt_initialize();
if ( sc != RTEMS_SUCCESSFUL ) {
BSP_panic( "cannot initialize interrupts" );
}
/*
* initialize the device driver parameters
@@ -165,10 +169,7 @@ void bsp_start(void)
m8xx.scc2p.rbase=0;
m8xx.scc2p.tbase=0;
m8xx_cp_execute_cmd( M8xx_CR_OP_STOP_TX | M8xx_CR_CHAN_SCC2 );
/*
* Initalize RTEMS IRQ system
*/
BSP_rtems_irq_mng_init(0);
#ifdef SHOW_MORE_INIT_SETTINGS
printk("Exit from bspstart\n");
#endif

48
c/src/lib/libbsp/powerpc/mbx8xx/startup/linkcmds
View File

@@ -192,12 +192,6 @@ SECTIONS
*(.data.*)
*(.data1)
PROVIDE (__SDATA_START__ = .);
*(.sdata*)
*(.gnu.linkonce.d*)
*(.gnu.linkonce.s.*)
PROVIDE (__SDATA_END__ = .);
PROVIDE (__EXCEPT_START__ = .);
*(.gcc_except_table*)
PROVIDE (__EXCEPT_END__ = .);
@@ -220,35 +214,41 @@ SECTIONS
*(.fixup)
PROVIDE (_FIXUP_END_ = .);
PROVIDE (__FIXUP_END__ = .);
/* We want the small data sections together, so single-instruction offsets
* can access them all.
*/
PROVIDE (__SDATA2_START__ = .);
*(.sdata2)
*(.gnu.linkonce.s2.*)
*(.sbss2)
PROVIDE (__SDATA2_END__ = .);
} > ram
.sdata : {
PROVIDE (_SDA_BASE_ = 32768);
*(.sdata .sdata.* .gnu.linkonce.s.*)
} > ram
.sbss : {
__bss_start = .;
PROVIDE (__sbss_start = .); PROVIDE (___sbss_start = .);
*(.scommon)
*(.dynsbss)
*(.sbss .sbss.* .gnu.linkonce.sb.*)
PROVIDE (__sbss_end = .); PROVIDE (___sbss_end = .);
} > ram
.sdata2 : {
PROVIDE (_SDA2_BASE_ = 32768);
*(.sdata2 .sdata2.* .gnu.linkonce.s2.*)
} > ram =0
.sbss2 : {
*(.sbss2 .sbss2.* .gnu.linkonce.sb2.*)
} > ram =0
.bss :
{
PROVIDE (__SBSS_START__ = .);
PROVIDE (__SBSS2_START__ = .);
*(.sbss2)
PROVIDE (__SBSS2_END__ = .);
bss.start = .;
*(.bss .bss* .gnu.linkonce.b*)
*(.sbss*)
*(COMMON)
. = ALIGN(4);
bss.end = .;
PROVIDE (__SBSS_END__ = .);
} > ram
bss.size = bss.end - bss.start;

4
c/src/lib/libbsp/powerpc/motorola_powerpc/ChangeLog
View File

@@ -1,3 +1,7 @@
2009-10-22 Sebastian Huber <sebastian.huber@embedded-brains.de>
* Makefile.am, preinstall.am: Update for exception support changes.
2009-10-21 Ralf Corsépius <ralf.corsepius@rtems.org>
* make/custom/mcp750.cfg: Remove RTEMS_BSP_FAMILY.

6
c/src/lib/libbsp/powerpc/motorola_powerpc/Makefile.am
View File

@@ -80,9 +80,7 @@ libbsp_a_SOURCES += \
../../powerpc/shared/console/uart.h
include_bsp_HEADERS += ../../powerpc/shared/irq/irq.h \
../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/irq_supp.h \
../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/vectors.h \
../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/ppc_exc_bspsupp.h
../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/irq_supp.h
# irq
libbsp_a_SOURCES += ../../powerpc/shared/irq/irq_init.c \
@@ -133,11 +131,11 @@ libbsp_a_SOURCES += ../../shared/vmeUniverse/vmeUniverse.c \
libbsp_a_LIBADD = \
polledIO.rel \
../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
../../../libcpu/@RTEMS_CPU@/shared/cpuIdent.rel \
../../../libcpu/@RTEMS_CPU@/shared/stack.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \
../../../libcpu/@RTEMS_CPU@/mpc6xx/clock.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/raw_exception.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/exc_bspsupport.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/irq_bspsupport.rel \
../../../libcpu/@RTEMS_CPU@/mpc6xx/mmu.rel \

8
c/src/lib/libbsp/powerpc/motorola_powerpc/preinstall.am
View File

@@ -97,14 +97,6 @@ $(PROJECT_INCLUDE)/bsp/irq_supp.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bsps
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq_supp.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq_supp.h
$(PROJECT_INCLUDE)/bsp/vectors.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/vectors.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vectors.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vectors.h
$(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/ppc_exc_bspsupp.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h
$(PROJECT_INCLUDE)/bsp/motorola.h: ../../powerpc/shared/motorola/motorola.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/motorola.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/motorola.h

6
c/src/lib/libbsp/powerpc/mpc55xxevb/ChangeLog
View File

@@ -1,3 +1,9 @@
2009-10-22 Sebastian Huber <sebastian.huber@embedded-brains.de>
* Makefile.am: Update for exception support changes.
* startup/bspstart.c: Changed exception header file includes. Update
for ppc_exc_initialize() changes.
2009-10-21 Sebastian Huber <sebastian.huber@embedded-brains.de>
* network/smsc9218i.c, tests/tests.c: Update for interrupt handler

1
c/src/lib/libbsp/powerpc/mpc55xxevb/Makefile.am
View File

@@ -83,7 +83,6 @@ libbsp_a_LIBADD = ../../../libcpu/@RTEMS_CPU@/shared/cpuIdent.rel \
../../../libcpu/@RTEMS_CPU@/@RTEMS_CPU_MODEL@/dspi.rel \
../../../libcpu/@RTEMS_CPU@/@RTEMS_CPU_MODEL@/esci.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/raw_exception.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/exc_bspsupport.rel
if HAS_NETWORKING

12
c/src/lib/libbsp/powerpc/mpc55xxevb/startup/bspstart.c
View File

@@ -25,12 +25,12 @@
#include <rtems.h>
#include <libcpu/powerpc-utility.h>
#include <bsp/vectors.h>
#include <bsp.h>
#include <bsp/bootcard.h>
#include <bsp/irq.h>
#include <bsp/irq-generic.h>
#include <bsp/ppc_exc_bspsupp.h>
#define RTEMS_STATUS_CHECKS_USE_PRINTK
@@ -188,6 +188,7 @@ static void mpc55xx_ebi_init()
*/
void bsp_start(void)
{
rtems_status_code sc = RTEMS_SUCCESSFUL;
ppc_cpu_id_t myCpu;
ppc_cpu_revision_t myCpuRevision;
@@ -224,16 +225,21 @@ void bsp_start(void)
/* Initialize exceptions */
RTEMS_DEBUG_PRINT( "Initialize exceptions ...\n");
ppc_exc_initialize(
sc = ppc_exc_initialize(
PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
interrupt_stack_start,
interrupt_stack_size
);
if (sc != RTEMS_SUCCESSFUL) {
BSP_panic( "Cannot initialize exceptions");
} else {
DEBUG_DONE();
}
/* Initialize interrupts */
RTEMS_DEBUG_PRINT( "Initialize interrupts ...\n");
if (bsp_interrupt_initialize() != RTEMS_SUCCESSFUL) {
sc = bsp_interrupt_initialize();
if (sc != RTEMS_SUCCESSFUL) {
BSP_panic( "Cannot initialize interrupts");
} else {
DEBUG_DONE();

9
c/src/lib/libbsp/powerpc/mpc8260ads/ChangeLog
View File

@@ -1,3 +1,12 @@
2009-10-22 Sebastian Huber <sebastian.huber@embedded-brains.de>
* include/irq-config.h: New file.
* Makefile.am, preinstall.am: Update for exception support changes.
Use generic interrupt support.
* make/custom/mpc8260ads.cfg, startup/linkcmds: Enable EABI.
* irq/irq.c, startup/bspstart.c: Converted to generic interrupt
support. Update for exception support changes.
2009-10-21 Ralf Corsépius <ralf.corsepius@rtems.org>
* make/custom/mpc8260ads.cfg: Remove RTEMS_BSP_FAMILY.

24
c/src/lib/libbsp/powerpc/mpc8260ads/Makefile.am
View File

@@ -35,11 +35,19 @@ libbsp_a_SOURCES += clock/p_clock.c
# console
libbsp_a_SOURCES += console/console.c
include_bsp_HEADERS = irq/irq.h
# irq
libbsp_a_SOURCES += irq/irq.c irq/irq_init.c irq/irq.h irq/irq_asm.S
include_bsp_HEADERS = irq/irq.h \
include/irq-config.h \
../../shared/include/irq-generic.h \
../../shared/include/irq-info.h
# irq
libbsp_a_SOURCES += irq/irq.c \
../../shared/src/irq-generic.c \
../../shared/src/irq-legacy.c \
../../shared/src/irq-info.c \
../../shared/src/irq-shell.c \
../../shared/src/irq-server.c
include_bsp_HEADERS += vectors/vectors.h
# startup
libbsp_a_SOURCES += ../../shared/bspclean.c ../../shared/bsplibc.c \
../../shared/bsppredriverhook.c ../../shared/bsppost.c \
@@ -47,10 +55,6 @@ libbsp_a_SOURCES += ../../shared/bspclean.c ../../shared/bsplibc.c \
../../shared/sbrk.c ../../shared/gnatinstallhandler.c startup/cpuinit.c \
../../shared/bspgetworkarea.c ../../shared/bsppretaskinghook.c
# vectors
libbsp_a_SOURCES += vectors/vectors_init.c vectors/vectors.h \
vectors/vectors.S
if HAS_NETWORKING
network_CPPFLAGS = -D__INSIDE_RTEMS_BSD_TCPIP_STACK__
network_CPPFLAGS += -D__BSD_VISIBLE
@@ -63,12 +67,12 @@ endif
libbsp_a_LIBADD = ../../../libcpu/@RTEMS_CPU@/shared/cpuIdent.rel \
../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/exc_bspsupport.rel \
../../../libcpu/@RTEMS_CPU@/mpc8260/clock.rel \
../../../libcpu/@RTEMS_CPU@/mpc8260/console-generic.rel \
../../../libcpu/@RTEMS_CPU@/mpc8260/cpm.rel \
../../../libcpu/@RTEMS_CPU@/mpc8260/mmu.rel \
../../../libcpu/@RTEMS_CPU@/mpc8260/timer.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/raw_exception.rel
../../../libcpu/@RTEMS_CPU@/mpc8260/timer.rel
if HAS_NETWORKING
libbsp_a_LIBADD += network.rel
endif

326
c/src/lib/libbsp/powerpc/mpc8260ads/irq/irq.c
View File

@@ -6,9 +6,9 @@
*
* Modified for mpc8260 Andy Dachs <a.dachs@sstl.co.uk>
* Surrey Satellite Technology Limited, 2000
+ * 21/4/2002 Added support for nested interrupts and improved
+ * masking operations. Now we compute priority mask based
+ * on table in irq_init.c
* 21/4/2002 Added support for nested interrupts and improved
* masking operations. Now we compute priority mask based
* on table in irq_init.c
*
* The license and distribution terms for this file may be
* found in found in the file LICENSE in this distribution or at
@@ -19,25 +19,12 @@
#include <bsp.h>
#include <bsp/irq.h>
#include <bsp/irq-generic.h>
#include <rtems.h>
#include <rtems/score/apiext.h>
#include <rtems/bspIo.h>
#include <libcpu/raw_exception.h>
#include <bsp/vectors.h>
#include <mpc8260.h>
/*
* default handler connected on each irq after bsp initialization
*/
static rtems_irq_connect_data default_rtems_entry;
/*
* location used to store initial tables used for interrupt
* management.
*/
static rtems_irq_global_settings* internal_config;
static rtems_irq_connect_data* rtems_hdl_tbl;
/*
* Check if symbolic IRQ name is an CPM IRQ
*/
@@ -48,16 +35,6 @@ static inline int is_cpm_irq(const rtems_irq_number irqLine)
);
}
/*
* Check if symbolic IRQ name is a Processor IRQ
*/
static inline int is_processor_irq(const rtems_irq_number irqLine)
{
return (((int) irqLine <= BSP_PROCESSOR_IRQ_MAX_OFFSET) &
((int) irqLine >= BSP_PROCESSOR_IRQ_LOWEST_OFFSET)
);
}
typedef struct {
uint32_t mask_h; /* mask for sipnr_h and simr_h */
uint32_t mask_l; /* mask for sipnr_l and simr_l */
@@ -65,6 +42,20 @@ typedef struct {
uint32_t priority_l;
} m82xxIrqMasks_t;
static unsigned char irqPrioTable[BSP_CPM_IRQ_NUMBER]={
/*
* actual priorities for interrupt :
*/
/*
* CPM Interrupts
*/
0, 45, 63, 44, 66, 68, 35, 39, 50, 62, 34, 0, 30, 40, 52, 58,
2, 3, 0, 5, 15, 16, 17, 18, 49, 51, 0, 0, 0, 0, 0, 0,
6, 7, 8, 0, 11, 12, 0, 0, 20, 21, 22, 23, 0, 0, 0, 0,
29, 31, 33, 37, 38, 41, 47, 48, 55, 56, 57, 60, 64, 65, 69, 70,
};
/*
* Mask fields should have a '1' in the bit position for that
* interrupt.
@@ -140,19 +131,6 @@ static m82xxIrqMasks_t SIU_MaskBit[BSP_CPM_IRQ_NUMBER] =
};
void dump_irq_masks(void )
{
int i;
for( i=0; i<BSP_CPM_IRQ_NUMBER;i++ )
{
printk( "%04d: %08X %08X\n",
i,
SIU_MaskBit[i].priority_h,
SIU_MaskBit[i].priority_l
);
}
}
/*
* ------------------------ RTEMS Irq helper functions ----------------
*/
@@ -175,7 +153,7 @@ static void compute_SIU_IvectMask_from_prio (void)
for( i=0; i<BSP_CPM_IRQ_NUMBER; i++ )
{
for( j=0;j<BSP_CPM_IRQ_NUMBER; j++ )
if( internal_config->irqPrioTbl[j] < internal_config->irqPrioTbl[i] )
if( irqPrioTable[j] < irqPrioTable[i] )
{
SIU_MaskBit[i].priority_h |= SIU_MaskBit[j].mask_h;
SIU_MaskBit[i].priority_l |= SIU_MaskBit[j].mask_l;
@@ -184,17 +162,6 @@ static void compute_SIU_IvectMask_from_prio (void)
}
/*
* This function check that the value given for the irq line
* is valid.
*/
static int isValidInterrupt(int irq)
{
if ( (irq < BSP_LOWEST_OFFSET) || (irq > BSP_MAX_OFFSET) )
return 0;
return 1;
}
int BSP_irq_enable_at_cpm(const rtems_irq_number irqLine)
{
@@ -239,182 +206,6 @@ int BSP_irq_enabled_at_cpm(const rtems_irq_number irqLine)
(m8260.simr_l & SIU_MaskBit[cpm_irq_index].mask_l));
}
/*
* ------------------------ RTEMS Single Irq Handler Mngt Routines ----------------
*/
int BSP_install_rtems_irq_handler (const rtems_irq_connect_data* irq)
{
rtems_interrupt_level level;
if (!isValidInterrupt(irq->name)) {
printk( "not a valid intr\n" ) ;
return 0;
}
/*
* Check if default handler is actually connected. If not issue an error.
* You must first get the current handler via i386_get_current_idt_entry
* and then disconnect it using i386_delete_idt_entry.
* RATIONALE : to always have the same transition by forcing the user
* to get the previous handler before accepting to disconnect.
*/
if (rtems_hdl_tbl[irq->name].hdl != default_rtems_entry.hdl) {
printk( "Default handler not there\n" );
return 0;
}
rtems_interrupt_disable(level);
/*
* store the data provided by user
*/
rtems_hdl_tbl[irq->name] = *irq;
if (is_cpm_irq(irq->name)) {
/*
* Enable interrupt at PIC level
*/
BSP_irq_enable_at_cpm (irq->name);
}
#if 0
if (is_processor_irq(irq->name)) {
/*
* Should Enable exception at processor level but not needed. Will restore
* EE flags at the end of the routine anyway.
*/
}
#endif
/*
* Enable interrupt on device
*/
if (irq->on)
irq->on(irq);
rtems_interrupt_enable(level);
/*
printk( "Enabled\n" );
*/
return 1;
}
int BSP_get_current_rtems_irq_handler (rtems_irq_connect_data* irq)
{
if (!isValidInterrupt(irq->name)) {
return 0;
}
*irq = rtems_hdl_tbl[irq->name];
return 1;
}
int BSP_remove_rtems_irq_handler (const rtems_irq_connect_data* irq)
{
rtems_interrupt_level level;
if (!isValidInterrupt(irq->name)) {
return 0;
}
/*
* Check if default handler is actually connected. If not issue an error.
* You must first get the current handler via i386_get_current_idt_entry
* and then disconnect it using i386_delete_idt_entry.
* RATIONALE : to always have the same transition by forcing the user
* to get the previous handler before accepting to disconnect.
*/
if (rtems_hdl_tbl[irq->name].hdl != irq->hdl) {
return 0;
}
rtems_interrupt_disable(level);
if (is_cpm_irq(irq->name)) {
/*
* disable interrupt at PIC level
*/
BSP_irq_disable_at_cpm (irq->name);
}
if (is_processor_irq(irq->name)) {
/*
* disable exception at processor level
*/
}
/*
* Disable interrupt on device
*/
if (irq->off)
irq->off(irq);
/*
* restore the default irq value
*/
rtems_hdl_tbl[irq->name] = default_rtems_entry;
rtems_interrupt_enable(level);
return 1;
}
/*
* ------------------------ RTEMS Global Irq Handler Mngt Routines ----------------
*/
int BSP_rtems_irq_mngt_set(rtems_irq_global_settings* config)
{
int i;
rtems_interrupt_level level;
/*
* Store various code accelerators
*/
internal_config = config;
default_rtems_entry = config->defaultEntry;
rtems_hdl_tbl = config->irqHdlTbl;
/* Fill in priority masks */
compute_SIU_IvectMask_from_prio();
rtems_interrupt_disable(level);
/*
* start with CPM IRQ
*/
for (i=BSP_CPM_IRQ_LOWEST_OFFSET; i < BSP_CPM_IRQ_LOWEST_OFFSET + BSP_CPM_IRQ_NUMBER ; i++) {
if (rtems_hdl_tbl[i].hdl != default_rtems_entry.hdl) {
BSP_irq_enable_at_cpm (i);
if (rtems_hdl_tbl[i].on)
rtems_hdl_tbl[i].on(&rtems_hdl_tbl[i]);
} else {
if (rtems_hdl_tbl[i].off)
rtems_hdl_tbl[i].off(&rtems_hdl_tbl[i]);
BSP_irq_disable_at_cpm (i);
}
}
/*
* finish with Processor exceptions handled like IRQ
*/
for (i=BSP_PROCESSOR_IRQ_LOWEST_OFFSET; i < BSP_PROCESSOR_IRQ_LOWEST_OFFSET + BSP_PROCESSOR_IRQ_NUMBER; i++) {
if (rtems_hdl_tbl[i].hdl != default_rtems_entry.hdl) {
if (rtems_hdl_tbl[i].on)
rtems_hdl_tbl[i].on(&rtems_hdl_tbl[i]);
} else {
if (rtems_hdl_tbl[i].off)
rtems_hdl_tbl[i].off(&rtems_hdl_tbl[i]);
}
}
rtems_interrupt_enable(level);
return 1;
}
int BSP_rtems_irq_mngt_get(rtems_irq_global_settings** config)
{
*config = internal_config;
return 0;
}
#ifdef DISPATCH_HANDLER_STAT
volatile unsigned int maxLoop = 0;
#endif
@@ -444,7 +235,7 @@ int C_dispatch_irq_handler (CPU_Interrupt_frame *frame, unsigned int excNum)
new_msr = msr | MSR_EE;
_CPU_MSR_SET(new_msr);
rtems_hdl_tbl[BSP_DECREMENTER].hdl(rtems_hdl_tbl[BSP_DECREMENTER].handle);
bsp_interrupt_handler_dispatch(BSP_DECREMENTER);
_CPU_MSR_SET(msr);
@@ -495,7 +286,7 @@ int C_dispatch_irq_handler (CPU_Interrupt_frame *frame, unsigned int excNum)
_CPU_MSR_SET(new_msr);
/* call handler */
rtems_hdl_tbl[irq].hdl(rtems_hdl_tbl[irq].handle);
bsp_interrupt_handler_dispatch(irq);
/* disable exceptions again */
_CPU_MSR_SET(msr);
@@ -518,22 +309,71 @@ int C_dispatch_irq_handler (CPU_Interrupt_frame *frame, unsigned int excNum)
return 0;
}
void _ThreadProcessSignalsFromIrq (BSP_Exception_frame* ctx)
{
/*
* Process pending signals that have not already been
* processed by _Thread_Displatch. This happens quite
* unfrequently : the ISR must have posted an action
* to the current running thread.
* Initialize CPM interrupt management
*/
if ( _Thread_Do_post_task_switch_extension ||
_Thread_Executing->do_post_task_switch_extension ) {
_Thread_Executing->do_post_task_switch_extension = false;
_API_extensions_Run_postswitch();
}
void
BSP_CPM_irq_init(void)
{
m8260.simr_l = 0;
m8260.simr_h = 0;
m8260.sipnr_l = 0xffffffff;
m8260.sipnr_h = 0xffffffff;
m8260.sicr = 0;
/*
* I plan to process other thread related events here.
* This will include DEBUG session requested from keyboard...
* Initialize the interrupt priorities.
*/
m8260.siprr = 0x05309770; /* reset value */
m8260.scprr_h = 0x05309770; /* reset value */
m8260.scprr_l = 0x05309770; /* reset value */
}
rtems_status_code bsp_interrupt_vector_enable( rtems_vector_number irqnum)
{
if (is_cpm_irq(irqnum)) {
/*
* Enable interrupt at PIC level
*/
BSP_irq_enable_at_cpm (irqnum);
}
return RTEMS_SUCCESSFUL;
}
rtems_status_code bsp_interrupt_vector_disable( rtems_vector_number irqnum)
{
if (is_cpm_irq(irqnum)) {
/*
* disable interrupt at PIC level
*/
BSP_irq_disable_at_cpm (irqnum);
}
return RTEMS_SUCCESSFUL;
}
rtems_status_code bsp_interrupt_facility_initialize()
{
/* Install exception handler */
if (ppc_exc_set_handler( ASM_EXT_VECTOR, C_dispatch_irq_handler)) {
return RTEMS_IO_ERROR;
}
if (ppc_exc_set_handler( ASM_DEC_VECTOR, C_dispatch_irq_handler)) {
return RTEMS_IO_ERROR;
}
/* Fill in priority masks */
compute_SIU_IvectMask_from_prio();
/* Initialize the interrupt controller */
BSP_CPM_irq_init();
return RTEMS_SUCCESSFUL;
}
void bsp_interrupt_handler_default( rtems_vector_number vector)
{
printk( "Spurious interrupt: 0x%08x\n", vector);
}

3
c/src/lib/libbsp/powerpc/mpc8260ads/make/custom/mpc8260ads.cfg
View File

@@ -14,7 +14,8 @@ RTEMS_CPU_MODEL=mpc8260
# and (hopefully) optimize for it.
#
# CPU_CFLAGS = -mcpu=$(8XX_CPU_TYPE) -mstrict-align
CPU_CFLAGS = -mcpu=603e -mstrict-align -Dmpc8260
CPU_CFLAGS = -mcpu=603e -mstrict-align -Dmpc8260 \
-meabi -msdata -fno-common
# optimize flag: typically -O2
CFLAGS_OPTIMIZE_V = -O2 -g -fno-keep-inline-functions

14
c/src/lib/libbsp/powerpc/mpc8260ads/preinstall.am
View File

@@ -69,7 +69,15 @@ $(PROJECT_INCLUDE)/bsp/irq.h: irq/irq.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq.h
$(PROJECT_INCLUDE)/bsp/vectors.h: vectors/vectors.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vectors.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vectors.h
$(PROJECT_INCLUDE)/bsp/irq-config.h: include/irq-config.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-config.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-config.h
$(PROJECT_INCLUDE)/bsp/irq-generic.h: ../../shared/include/irq-generic.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-generic.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-generic.h
$(PROJECT_INCLUDE)/bsp/irq-info.h: ../../shared/include/irq-info.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-info.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-info.h

42
c/src/lib/libbsp/powerpc/mpc8260ads/startup/bspstart.c
View File

@@ -35,8 +35,6 @@
* $Id$
*/
#warning The interrupt disable mask is now stored in SPRG0, please verify that this is compatible to this BSP (see also bootcard.c).
#include <bsp.h>
/*
@@ -55,8 +53,6 @@
SPR_RW(SPRG1)
extern unsigned long intrStackPtr;
/*
* Driver configuration parameters
*/
@@ -74,7 +70,9 @@ bool bsp_timer_internal_clock; /* TRUE, when timer runs with CPU clk */
void _BSP_GPLED1_on(void);
void _BSP_GPLED0_on(void);
void cpu_init(void);
void initialize_exceptions(void);
extern char IntrStack_start [];
extern char intrStack [];
void BSP_panic(char *s)
{
@@ -150,10 +148,10 @@ void _BSP_Uart2_disable()
void bsp_start(void)
{
rtems_status_code sc = RTEMS_SUCCESSFUL;
extern void *_WorkspaceBase;
ppc_cpu_id_t myCpu;
ppc_cpu_revision_t myCpuRevision;
register unsigned char* intrStack;
/* Set MPC8260ADS board LEDS and Uart enable lines */
_BSP_GPLED0_off();
@@ -172,22 +170,25 @@ void bsp_start(void)
/*
mmu_init();
*/
/*
* Initialize some SPRG registers related to irq handling
*/
intrStack = (((unsigned char*)&intrStackPtr) - PPC_MINIMUM_STACK_FRAME_SIZE);
_write_SPRG1((unsigned int)intrStack);
/* Initialize exception handler */
/* FIXME: Interrupt stack begin and size */
sc = ppc_exc_initialize(
PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
(uintptr_t) IntrStack_start,
(uintptr_t) intrStack - (uintptr_t) IntrStack_start
);
if (sc != RTEMS_SUCCESSFUL) {
BSP_panic("cannot intitialize exceptions");
}
/*
printk( "About to call initialize_exceptions\n" );
*/
/*
* Install our own set of exception vectors
*/
/* Initalize interrupt support */
sc = bsp_interrupt_initialize();
if (sc != RTEMS_SUCCESSFUL) {
BSP_panic("cannot intitialize interrupts");
}
initialize_exceptions();
/*
mmu_init();
@@ -227,11 +228,6 @@ void bsp_start(void)
m8260.brgc1 = M8260_BRG_EN + (uint32_t)(((uint16_t)((40016384)/(32768)) - 1) << 1) + 0;
*/
/*
* Initalize RTEMS IRQ system
*/
BSP_rtems_irq_mng_init(0);
#ifdef SHOW_MORE_INIT_SETTINGS
printk("Exit from bspstart\n");
#endif

36
c/src/lib/libbsp/powerpc/mpc8260ads/startup/linkcmds
View File

@@ -209,28 +209,38 @@ SECTIONS
PROVIDE (_FIXUP_END_ = .);
PROVIDE (__FIXUP_END__ = .);
PROVIDE (__SDATA2_START__ = .);
.sdata2 : { *(.sdata2) *(.gnu.linkonce.s2.*) } >ram
.sbss2 : { *(.sbss2) *(.gnu.linkonce.sb2.*) } >ram
PROVIDE (__SBSS2_END__ = .);
.sdata : {
PROVIDE (_SDA_BASE_ = 32768);
*(.sdata .sdata.* .gnu.linkonce.s.*)
} > ram
.sbss2 : { *(.sbss2) } >ram
PROVIDE (__SBSS2_END__ = .);
.sbss : {
__bss_start = .;
PROVIDE (__sbss_start = .); PROVIDE (___sbss_start = .);
*(.scommon)
*(.dynsbss)
*(.sbss .sbss.* .gnu.linkonce.sb.*)
PROVIDE (__sbss_end = .); PROVIDE (___sbss_end = .);
} > ram
.sdata2 : {
PROVIDE (_SDA2_BASE_ = 32768);
*(.sdata2 .sdata2.* .gnu.linkonce.s2.*)
} > ram =0
.sbss2 : {
*(.sbss2 .sbss2.* .gnu.linkonce.sb2.*)
} > ram =0
__SBSS_START__ = .;
.bss :
{
bss.start = .;
*(.bss .bss* .gnu.linkonce.b*)
*(.sbss*) *(COMMON)
. = ALIGN(4);
bss.end = .;
} > ram
__SBSS_END__ = .;
/* R/W Data */
.data ( . ) :

6
c/src/lib/libbsp/powerpc/mvme3100/ChangeLog
View File

@@ -1,3 +1,9 @@
2009-10-22 Sebastian Huber <sebastian.huber@embedded-brains.de>
* Makefile.am, preinstall.am: Update for exception support changes.
* irq/irq_init.c: Changed exception header file includes.
* startup/bspstart.c: Update for ppc_exc_initialize() changes.
2009-10-21 Ralf Corsépius <ralf.corsepius@rtems.org>
* make/custom/mvme3100.cfg: Remove RTEMS_BSP_FAMILY.

4
c/src/lib/libbsp/powerpc/mvme3100/Makefile.am
View File

@@ -97,8 +97,6 @@ libbsp_a_SOURCES += ../../powerpc/shared/pci/pci.c \
../../powerpc/shared/pci/pcifinddevice.c ../../powerpc/shared/pci/pci.h
include_bsp_HEADERS += \
../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/vectors.h \
../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/ppc_exc_bspsupp.h \
../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/irq_supp.h
include_bsp_HEADERS += vme/VMEConfig.h \
@@ -142,12 +140,12 @@ network_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
endif
libbsp_a_LIBADD = ../../../libcpu/@RTEMS_CPU@/shared/cpuIdent.rel \
../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
../../../libcpu/@RTEMS_CPU@/shared/stack.rel \
../../../libcpu/@RTEMS_CPU@/e500/clock.rel \
../../../libcpu/@RTEMS_CPU@/e500/timer.rel \
../../../libcpu/@RTEMS_CPU@/e500/mmu.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/raw_exception.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/exc_bspsupport.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/irq_bspsupport.rel

2
c/src/lib/libbsp/powerpc/mvme3100/irq/irq_init.c
View File

@@ -25,7 +25,7 @@
#include <bsp/openpic.h>
#include <bsp/irq.h>
#include <bsp.h>
#include <libcpu/raw_exception.h>
#include <bsp/vectors.h>
#include <rtems/bspIo.h>
static void nop_func(void *unused)

8
c/src/lib/libbsp/powerpc/mvme3100/preinstall.am
View File

@@ -89,14 +89,6 @@ $(PROJECT_INCLUDE)/bsp/pci.h: ../../powerpc/shared/pci/pci.h $(PROJECT_INCLUDE)/
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/pci.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/pci.h
$(PROJECT_INCLUDE)/bsp/vectors.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/vectors.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vectors.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vectors.h
$(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/ppc_exc_bspsupp.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h
$(PROJECT_INCLUDE)/bsp/irq_supp.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/irq_supp.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq_supp.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq_supp.h

12
c/src/lib/libbsp/powerpc/mvme3100/startup/bspstart.c
View File

@@ -225,9 +225,10 @@ SPR_RW(HID1)
void bsp_start( void )
{
rtems_status_code sc;
unsigned char *stack;
uint32_t intrStackStart;
uint32_t intrStackSize;
uintptr_t intrStackStart;
uintptr_t intrStackSize;
char *chpt;
ppc_cpu_id_t myCpu;
ppc_cpu_revision_t myCpuRevision;
@@ -271,17 +272,20 @@ VpdBufRec vpdData [] = {
/*
* Initialize the interrupt related settings.
*/
intrStackStart = (uint32_t) __rtems_end;
intrStackStart = (uintptr_t) __rtems_end;
intrStackSize = rtems_configuration_get_interrupt_stack_size();
/*
* Initialize default raw exception handlers.
*/
ppc_exc_initialize(
sc = ppc_exc_initialize(
PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
intrStackStart,
intrStackSize
);
if (sc != RTEMS_SUCCESSFUL) {
BSP_panic("cannot initialize exceptions");
}
printk("CPU 0x%x - rev 0x%x\n", myCpu, myCpuRevision);

7
c/src/lib/libbsp/powerpc/mvme5500/ChangeLog
View File

@@ -1,3 +1,10 @@
2009-10-23 Sebastian Huber <sebastian.huber@embedded-brains.de>
* Makefile.am, preinstall.am: Update for exception support changes.
* irq/BSP_irq.c, irq/irq_init.c, vectors/exceptionhandler.c: Changed
exception header file includes.
* startup/bspstart.c: Update for ppc_exc_initialize() changes.
2009-10-23 Ralf Corsépius <ralf.corsepius@rtems.org>
* irq/BSP_irq.c, network/if_100MHz/GT64260eth.c,

5
c/src/lib/libbsp/powerpc/mvme5500/Makefile.am
View File

@@ -65,9 +65,7 @@ libbsp_a_SOURCES += ../../shared/tod.c tod/todcfg.c
include_bsp_HEADERS += vectors/bspException.h
include_bsp_HEADERS += \
../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/vectors.h \
../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/irq_supp.h \
../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/ppc_exc_bspsupp.h
../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/irq_supp.h
# vectors
libbsp_a_SOURCES += vectors/exceptionhandler.c \
@@ -120,7 +118,6 @@ libbsp_a_LIBADD = \
../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \
../../../libcpu/@RTEMS_CPU@/mpc6xx/clock.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/raw_exception.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/exc_bspsupport.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/irq_bspsupport.rel \
../../../libcpu/@RTEMS_CPU@/mpc6xx/mmu.rel \

1
c/src/lib/libbsp/powerpc/mvme5500/irq/BSP_irq.c
View File

@@ -32,7 +32,6 @@
#include <bsp/irq.h>
#include <rtems/score/thread.h>
#include <rtems/score/apiext.h>
#include <libcpu/raw_exception.h>
#include <rtems/rtems/intr.h>
#include <libcpu/io.h>
#include <libcpu/byteorder.h>

2
c/src/lib/libbsp/powerpc/mvme5500/irq/irq_init.c
View File

@@ -18,7 +18,7 @@
#include <libcpu/spr.h>
#include <bsp/irq.h>
#include <bsp.h>
#include <libcpu/raw_exception.h> /* ASM_EXT_VECTOR, ASM_DEC_VECTOR ... */
#include <bsp/vectors.h> /* ASM_EXT_VECTOR, ASM_DEC_VECTOR ... */
/*#define TRACE_IRQ_INIT*/
/*

8
c/src/lib/libbsp/powerpc/mvme5500/preinstall.am
View File

@@ -89,18 +89,10 @@ $(PROJECT_INCLUDE)/bsp/bspException.h: vectors/bspException.h $(PROJECT_INCLUDE)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bspException.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bspException.h
$(PROJECT_INCLUDE)/bsp/vectors.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/vectors.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vectors.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vectors.h
$(PROJECT_INCLUDE)/bsp/irq_supp.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/irq_supp.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq_supp.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq_supp.h
$(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/ppc_exc_bspsupp.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h
$(PROJECT_INCLUDE)/bsp/bspMvme5500.h: GT64260/bspMvme5500.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bspMvme5500.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bspMvme5500.h

12
c/src/lib/libbsp/powerpc/mvme5500/startup/bspstart.c
View File

@@ -216,6 +216,7 @@ save_boot_params(
void bsp_start( void )
{
rtems_status_code sc = RTEMS_SUCCESSFUL;
#ifdef CONF_VPD
int i;
#endif
@@ -228,8 +229,8 @@ void bsp_start( void )
#ifdef SHOW_LCR3_REGISTER
unsigned l3cr;
#endif
uint32_t intrStackStart;
uint32_t intrStackSize;
uintptr_t intrStackStart;
uintptr_t intrStackSize;
ppc_cpu_id_t myCpu;
ppc_cpu_revision_t myCpuRevision;
Triv121PgTbl pt=0;
@@ -267,17 +268,20 @@ void bsp_start( void )
/*
* Initialize the interrupt related settings.
*/
intrStackStart = (uint32_t) __rtems_end;
intrStackStart = (uintptr_t) __rtems_end;
intrStackSize = rtems_configuration_get_interrupt_stack_size();
/*
* Initialize default raw exception handlers.
*/
ppc_exc_initialize(
sc = ppc_exc_initialize(
PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
intrStackStart,
intrStackSize
);
if (sc != RTEMS_SUCCESSFUL) {
BSP_panic("cannot initialize exceptions");
}
/*
* Init MMU block address translation to enable hardware

4
c/src/lib/libbsp/powerpc/mvme5500/vectors/exceptionhandler.c
View File

@@ -50,7 +50,6 @@
#include <bsp.h>
#include <bsp/vectors.h>
#include <libcpu/raw_exception.h>
#include <libcpu/spr.h>
#include <bsp/pci.h>
#include <rtems/bspIo.h>
@@ -60,9 +59,6 @@
#define SRR1_TEA_EXC (1<<(31-13))
#define SRR1_MCP_EXC (1<<(31-12))
extern void
BSP_printStackTrace(BSP_Exception_frame* excPtr);
static volatile BSP_ExceptionExtension BSP_exceptionExtension = 0;
BSP_ExceptionExtension

6
c/src/lib/libbsp/powerpc/psim/ChangeLog
View File

@@ -1,3 +1,9 @@
2009-10-22 Sebastian Huber <sebastian.huber@embedded-brains.de>
* Makefile.am, preinstall.am: Update for exception support changes.
* irq/irq_init.c: Changed exception header file includes.
* startup/bspstart.c: Update for ppc_exc_initialize() changes.
2009-10-21 Ralf Corsépius <ralf.corsepius@rtems.org>
* make/custom/psim.cfg: Remove RTEMS_BSP_FAMILY.

7
c/src/lib/libbsp/powerpc/psim/Makefile.am
View File

@@ -57,10 +57,7 @@ EXTRA_DIST = vectors/README
# vectors
libbsp_a_SOURCES += vectors/align_h.S
include_bsp_HEADERS += \
../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/vectors.h \
../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/irq_supp.h \
../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/ppc_exc_bspsupp.h
include_bsp_HEADERS += ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/irq_supp.h
EXTRA_DIST += shmsupp/README
if HAS_MP
@@ -74,10 +71,10 @@ libbsp_a_SOURCES += network/if_sim.c
endif
libbsp_a_LIBADD = ../../../libcpu/@RTEMS_CPU@/shared/cpuIdent.rel \
../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
../../../libcpu/@RTEMS_CPU@/shared/stack.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \
../../../libcpu/@RTEMS_CPU@/mpc6xx/clock.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/raw_exception.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/exc_bspsupport.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/irq_bspsupport.rel \
../../../libcpu/@RTEMS_CPU@/mpc6xx/mmu.rel \

2
c/src/lib/libbsp/powerpc/psim/irq/irq_init.c
View File

@@ -20,7 +20,7 @@
#include <bsp/irq.h>
#include <bsp.h>
#include <psim.h>
#include <libcpu/raw_exception.h>
#include <bsp/vectors.h>
#include <rtems/bspIo.h>
#include <bsp/openpic.h>

8
c/src/lib/libbsp/powerpc/psim/preinstall.am
View File

@@ -81,15 +81,7 @@ $(PROJECT_INCLUDE)/bsp/openpic.h: ../shared/openpic/openpic.h $(PROJECT_INCLUDE)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/openpic.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/openpic.h
$(PROJECT_INCLUDE)/bsp/vectors.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/vectors.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vectors.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vectors.h
$(PROJECT_INCLUDE)/bsp/irq_supp.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/irq_supp.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq_supp.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq_supp.h
$(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/ppc_exc_bspsupp.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h

12
c/src/lib/libbsp/powerpc/psim/startup/bspstart.c
View File

@@ -79,8 +79,9 @@ void _BSP_Fatal_error(unsigned int v)
*/
void bsp_start( void )
{
uint32_t intrStackStart;
uint32_t intrStackSize;
rtems_status_code sc = RTEMS_SUCCESSFUL;
uintptr_t intrStackStart;
uintptr_t intrStackSize;
/*
* Note we can not get CPU identification dynamically, so
@@ -103,17 +104,20 @@ void bsp_start( void )
/*
* Initialize the interrupt related settings.
*/
intrStackStart = (uint32_t) __rtems_end;
intrStackStart = (uintptr_t) __rtems_end;
intrStackSize = rtems_configuration_get_interrupt_stack_size();
/*
* Initialize default raw exception handlers.
*/
ppc_exc_initialize(
sc = ppc_exc_initialize(
PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
intrStackStart,
intrStackSize
);
if (sc != RTEMS_SUCCESSFUL) {
BSP_panic("cannot initialize exceptions");
}
/*
* Initalize RTEMS IRQ system

7
c/src/lib/libbsp/powerpc/qemuppc/ChangeLog
View File

@@ -1,3 +1,10 @@
2009-10-22 Sebastian Huber <sebastian.huber@embedded-brains.de>
* Makefile.am, preinstall.am: Update for exception support changes.
* irq/irq_init.c: Changed exception header file includes.
* startup/bspstart.c: Changed exception header file includes. Update
for ppc_exc_initialize() changes.
2009-10-21 Ralf Corsépius <ralf.corsepius@rtems.org>
* make/custom/qemuppc.cfg: Remove RTEMS_BSP_FAMILY.

8
c/src/lib/libbsp/powerpc/qemuppc/Makefile.am
View File

@@ -56,18 +56,10 @@ noinst_LIBRARIES += libbsp.a
libbsp_a_SOURCES = $(startup_SOURCES) $(clock_SOURCES) $(console_SOURCES) \
$(irq_SOURCES)
# ../../../libcpu/@RTEMS_CPU@/mpc6xx/clock.rel
include_bsp_HEADERS += ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/vectors.h \
../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/irq_supp.h \
../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/ppc_exc_bspsupp.h
libbsp_a_LIBADD = ../../../libcpu/@RTEMS_CPU@/shared/cpuIdent.rel \
../../../libcpu/@RTEMS_CPU@/shared/stack.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/raw_exception.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/exc_bspsupport.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/irq_bspsupport.rel \
../../../libcpu/@RTEMS_CPU@/mpc6xx/mmu.rel \
../../../libcpu/@RTEMS_CPU@/mpc6xx/timer.rel

3
c/src/lib/libbsp/powerpc/qemuppc/irq/irq_init.c
View File

@@ -20,12 +20,10 @@
#include <rtems.h>
#include <libcpu/powerpc-utility.h>
#include <libcpu/raw_exception.h>
#include <bsp.h>
#include <bsp/irq.h>
#include <bsp/vectors.h>
#include <bsp/ppc_exc_bspsupp.h>
int qemuppc_exception_handler( BSP_Exception_frame *frame, unsigned exception_number)
{
@@ -55,6 +53,7 @@ rtems_status_code bsp_interrupt_facility_initialize(void)
return RTEMS_IO_ERROR;
}
return RTEMS_SUCCESSFUL;
}
void bsp_interrupt_handler_default( rtems_vector_number vector)

12
c/src/lib/libbsp/powerpc/qemuppc/preinstall.am
View File

@@ -81,15 +81,3 @@ $(PROJECT_INCLUDE)/bsp/irq-config.h: irq/irq-config.h $(PROJECT_INCLUDE)/bsp/$(d
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-config.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-config.h
$(PROJECT_INCLUDE)/bsp/vectors.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/vectors.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vectors.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vectors.h
$(PROJECT_INCLUDE)/bsp/irq_supp.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/irq_supp.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq_supp.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq_supp.h
$(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/ppc_exc_bspsupp.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h

42
c/src/lib/libbsp/powerpc/qemuppc/startup/bspstart.c
View File

@@ -16,19 +16,16 @@
#include <string.h>
#include <fcntl.h>
#include <bsp.h>
#include <bsp/irq.h>
#include <bsp/bootcard.h>
#include <rtems/bspIo.h>
#include <rtems/powerpc/powerpc.h>
#include <libcpu/powerpc-utility.h>
#include <libcpu/raw_exception.h>
#include <bsp/irq-generic.h>
#include <bsp/ppc_exc_bspsupp.h>
#include <libcpu/cpuIdent.h>
#include <libcpu/bat.h>
#include <libcpu/spr.h>
#include <libcpu/powerpc-utility.h>
#include <bsp.h>
#include <bsp/irq.h>
#include <bsp/vectors.h>
#include <bsp/bootcard.h>
#include <bsp/irq-generic.h>
/*
* CPU Bus Frequency
@@ -65,10 +62,10 @@ static int default_decrementer_exception_handler( BSP_Exception_frame *frame, un
void bsp_start( void )
{
uint32_t intrStackStart;
uint32_t intrStackSize;
int rv = 0;
rtems_status_code sc;
rtems_status_code sc = RTEMS_SUCCESSFUL;
uintptr_t intrStackStart;
uintptr_t intrStackSize;
/*
* Note we can not get CPU identification dynamically, so
* force current_ppc_cpu.
@@ -86,30 +83,33 @@ void bsp_start( void )
/*
* Initialize the interrupt related settings.
*/
intrStackStart = (uint32_t) bsp_interrupt_stack_start;
intrStackSize = (uint32_t) bsp_interrupt_stack_size;
intrStackStart = (uintptr_t) bsp_interrupt_stack_start;
intrStackSize = (uintptr_t) bsp_interrupt_stack_size;
BSP_mem_size = (uint32_t )RamSize;
/*
* Initialize default raw exception handlers.
*/
ppc_exc_initialize(
sc = ppc_exc_initialize(
PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
intrStackStart,
intrStackSize
);
if (sc != RTEMS_SUCCESSFUL) {
BSP_panic("cannot initialize exceptions");
}
/* Install default handler for the decrementer exception */
rv = ppc_exc_set_handler( ASM_DEC_VECTOR, default_decrementer_exception_handler);
if (rv < 0) {
BSP_panic( "Cannot install decrementer exception handler!\n");
sc = ppc_exc_set_handler( ASM_DEC_VECTOR, default_decrementer_exception_handler);
if (sc != RTEMS_SUCCESSFUL) {
BSP_panic("cannot install decrementer exception handler");
}
/* Initalize interrupt support */
sc = bsp_interrupt_initialize();
if (sc != RTEMS_SUCCESSFUL) {
BSP_panic( "Cannot intitialize interrupt support\n");
BSP_panic("cannot intitialize interrupts");
}
#if 0

8
c/src/lib/libbsp/powerpc/score603e/ChangeLog
View File

@@ -1,3 +1,11 @@
2009-10-22 Sebastian Huber <sebastian.huber@embedded-brains.de>
* Makefile.am, preinstall.am: Update for exception support changes.
* irq/irq.c, irq/irq_init.c, irq/no_pic.c: Changed exception header
file includes. Fixes for type changes.
* startup/bspstart.c: Changed exception header file includes. Update
for ppc_exc_initialize() changes.
2009-10-21 Ralf Corsépius <ralf.corsepius@rtems.org>
* make/custom/score603e.cfg: Remove RTEMS_BSP_FAMILY.

4
c/src/lib/libbsp/powerpc/score603e/Makefile.am
View File

@@ -46,8 +46,6 @@ pci_SOURCES = PCI_bus/flash.c ../../powerpc/shared/pci/pci.c \
../../powerpc/shared/pci/pcifinddevice.c PCI_bus/PCI.c PCI_bus/universe.c
include_bsp_HEADERS += irq/irq.h \
../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/ppc_exc_bspsupp.h \
../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/vectors.h \
../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/irq_supp.h
irq_SOURCES = irq/no_pic.c irq/irq_init.c \
@@ -70,13 +68,13 @@ libbsp_a_SOURCES = $(pclock_SOURCES) $(console_SOURCES) $(irq_SOURCES) \
$(pci_SOURCES) $(vectors_SOURCES) $(startup_SOURCES)
libbsp_a_LIBADD = \
../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
../../../libcpu/@RTEMS_CPU@/shared/cpuIdent.rel \
../../../libcpu/@RTEMS_CPU@/shared/stack.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \
../../../libcpu/@RTEMS_CPU@/mpc6xx/clock.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/exc_bspsupport.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/irq_bspsupport.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/raw_exception.rel \
../../../libcpu/@RTEMS_CPU@/mpc6xx/mmu.rel \
../../../libcpu/@RTEMS_CPU@/mpc6xx/timer.rel

1
c/src/lib/libbsp/powerpc/score603e/irq/irq.c
View File

@@ -16,7 +16,6 @@
#include <bsp/irq.h>
#include <bsp/VME.h>
#include <rtems/score/apiext.h> /* for post ISR signal processing */
#include <libcpu/raw_exception.h>
#include <libcpu/io.h>
#include <bsp/vectors.h>
#include <stdlib.h>

2
c/src/lib/libbsp/powerpc/score603e/irq/irq_init.c
View File

@@ -24,7 +24,7 @@
#include <bsp/residual.h>
#include <bsp/irq.h>
#include <bsp.h>
#include <libcpu/raw_exception.h>
#include <bsp/vectors.h>
#include <rtems/bspIo.h>
#define SHOW_ISA_PCI_BRIDGE_SETTINGS 1

4
c/src/lib/libbsp/powerpc/score603e/irq/no_pic.c
View File

@@ -16,7 +16,7 @@
#include <bsp.h>
#include <bsp/irq.h>
#include <bsp/irq_supp.h>
#include <libcpu/raw_exception.h>
#include <bsp/vectors.h>
static rtems_irq_connect_data *rtems_hdl_tbl;
static rtems_irq_connect_data dflt_entry;
@@ -25,7 +25,7 @@ static rtems_irq_connect_data dflt_entry;
* High level IRQ handler called from shared_raw_irq_code_entry
*/
int C_dispatch_irq_handler(
struct _BSP_Exception_frame *frame,
BSP_Exception_frame *frame,
unsigned int excNum
)
{

8
c/src/lib/libbsp/powerpc/score603e/preinstall.am
View File

@@ -93,14 +93,6 @@ $(PROJECT_INCLUDE)/bsp/irq.h: irq/irq.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq.h
$(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/ppc_exc_bspsupp.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h
$(PROJECT_INCLUDE)/bsp/vectors.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/vectors.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vectors.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vectors.h
$(PROJECT_INCLUDE)/bsp/irq_supp.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/irq_supp.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq_supp.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq_supp.h

12
c/src/lib/libbsp/powerpc/score603e/startup/bspstart.c
View File

@@ -157,10 +157,11 @@ void initialize_PMC(void) {
void bsp_start( void )
{
rtems_status_code sc = RTEMS_SUCCESSFUL;
unsigned char *work_space_start;
unsigned int msr_value = 0x0000;
uint32_t intrStackStart;
uint32_t intrStackSize;
uintptr_t intrStackStart;
uintptr_t intrStackSize;
volatile uint32_t *ptr;
ppc_cpu_id_t myCpu;
ppc_cpu_revision_t myCpuRevision;
@@ -190,7 +191,7 @@ void bsp_start( void )
/*
* Initialize the interrupt related settings.
*/
intrStackStart = (uint32_t) __rtems_end;
intrStackStart = (uintptr_t) __rtems_end;
intrStackSize = rtems_configuration_get_interrupt_stack_size();
printk("Interrupt Stack Start: 0x%x Size: 0x%x Heap Start: 0x%x\n",
intrStackStart, intrStackSize, BSP_heap_start
@@ -203,11 +204,14 @@ void bsp_start( void )
/*
* Initialize default raw exception handlers.
*/
ppc_exc_initialize(
sc = ppc_exc_initialize(
PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
intrStackStart,
intrStackSize
);
if (sc != RTEMS_SUCCESSFUL) {
BSP_panic("cannot initialize exceptions");
}
msr_value = 0x2030;
_CPU_MSR_SET( msr_value );

4
c/src/lib/libbsp/powerpc/shared/clock/clock.c
View File

@@ -23,9 +23,7 @@
#include <rtems/clockdrv.h>
#include <libcpu/powerpc-utility.h>
#include <libcpu/raw_exception.h>
#include <bsp/ppc_exc_bspsupp.h>
#include <bsp/vectors.h>
#define RTEMS_STATUS_CHECKS_USE_PRINTK

1
c/src/lib/libbsp/powerpc/shared/irq/irq_init.c
View File

@@ -26,7 +26,6 @@
#include <bsp/irq.h>
#include <bsp/irq_supp.h>
#include <bsp.h>
#include <libcpu/raw_exception.h>
#include <bsp/motorola.h>
#include <rtems/bspIo.h>

1
c/src/lib/libbsp/powerpc/shared/irq/openpic_i8259_irq.c
View File

@@ -21,7 +21,6 @@
#include <bsp/VMEConfig.h>
#endif
#include <bsp/openpic.h>
#include <libcpu/raw_exception.h>
#include <libcpu/io.h>
#include <bsp/vectors.h>
#include <stdlib.h>

12
c/src/lib/libbsp/powerpc/shared/startup/bspstart.c
View File

@@ -140,11 +140,12 @@ unsigned int get_eumbbar(void) {
void bsp_start( void )
{
rtems_status_code sc = RTEMS_SUCCESSFUL;
#if !defined(mvme2100)
unsigned l2cr;
#endif
uint32_t intrStackStart;
uint32_t intrStackSize;
uintptr_t intrStackStart;
uintptr_t intrStackSize;
ppc_cpu_id_t myCpu;
ppc_cpu_revision_t myCpuRevision;
prep_t boardManufacturer;
@@ -210,17 +211,20 @@ void bsp_start( void )
/*
* Initialize the interrupt related settings.
*/
intrStackStart = (uint32_t) __rtems_end;
intrStackStart = (uintptr_t) __rtems_end;
intrStackSize = rtems_configuration_get_interrupt_stack_size();
/*
* Initialize default raw exception handlers.
*/
ppc_exc_initialize(
sc = ppc_exc_initialize(
PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
intrStackStart,
intrStackSize
);
if (sc != RTEMS_SUCCESSFUL) {
BSP_panic("cannot initialize exceptions");
}
select_console(CONSOLE_LOG);

7
c/src/lib/libbsp/powerpc/tqm8xx/ChangeLog
View File

@@ -1,3 +1,10 @@
2009-10-22 Sebastian Huber <sebastian.huber@embedded-brains.de>
* Makefile.am, preinstall.am: Update for exception support changes.
* irq/irq.c: Changed exception header file includes.
* startup/bspstart.c: Changed exception header file includes. Update
for ppc_exc_initialize() changes.
2009-10-21 Thomas Doerfler <Thomas.Doerfler@imd-systems.de>
* ChangeLog, Makefile.am, console/console.c, include/bsp.h, irq/irq.c, preinstall.am, startup/bspstart.c, startup/start.S:

5
c/src/lib/libbsp/powerpc/tqm8xx/Makefile.am
View File

@@ -23,9 +23,7 @@ include_HEADERS += include/coverhd.h
include_bsp_HEADERS = include/tqm.h include/8xx_immap.h \
include/irq.h include/irq-config.h \
../../shared/include/irq-generic.h \
spi/spi.h\
../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/vectors.h \
../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/ppc_exc_bspsupp.h
spi/spi.h
EXTRA_DIST = times-tqm866
@@ -78,7 +76,6 @@ libbsp_a_LIBADD = \
../../../libcpu/@RTEMS_CPU@/shared/cpuIdent.rel \
../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/raw_exception.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/exc_bspsupport.rel \
../../../libcpu/@RTEMS_CPU@/mpc8xx/console-generic.rel \
../../../libcpu/@RTEMS_CPU@/mpc8xx/cpm.rel \

4
c/src/lib/libbsp/powerpc/tqm8xx/irq/irq.c
View File

@@ -26,12 +26,10 @@
#include <mpc8xx.h>
#include <libcpu/powerpc-utility.h>
#include <libcpu/raw_exception.h>
#include <bsp/vectors.h>
#include <bsp.h>
#include <bsp/irq.h>
#include <bsp/vectors.h>
#include <bsp/ppc_exc_bspsupp.h>
#include <bsp/irq-generic.h>
/*
* functions to enable/disable a source at the SIU/CPM irq controller

8
c/src/lib/libbsp/powerpc/tqm8xx/preinstall.am
View File

@@ -81,14 +81,6 @@ $(PROJECT_INCLUDE)/bsp/spi.h: spi/spi.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/spi.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/spi.h
$(PROJECT_INCLUDE)/bsp/vectors.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/vectors.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vectors.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vectors.h
$(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/ppc_exc_bspsupp.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h
$(PROJECT_LIB)/start.$(OBJEXT): start.$(OBJEXT) $(PROJECT_LIB)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_LIB)/start.$(OBJEXT)
TMPINSTALL_FILES += $(PROJECT_LIB)/start.$(OBJEXT)

22
c/src/lib/libbsp/powerpc/tqm8xx/startup/bspstart.c
View File

@@ -20,14 +20,16 @@
* $Id$
*/
#include <rtems.h>
#include <stdlib.h>
#include <rtems.h>
#include <libcpu/powerpc-utility.h>
#include <bsp.h>
#include <bsp/vectors.h>
#include <bsp/bootcard.h>
#include <bsp/irq-generic.h>
#include <bsp/ppc_exc_bspsupp.h>
#ifdef BSP_HAS_TQMMON
/*
@@ -124,11 +126,12 @@ rtems_status_code bsp_tqm_get_cib_uint32( const char *cib_id,
void bsp_start( void)
{
rtems_status_code sc = RTEMS_SUCCESSFUL;
ppc_cpu_id_t myCpu;
ppc_cpu_revision_t myCpuRevision;
uint32_t interrupt_stack_start = (uint32_t) bsp_interrupt_stack_start;
uint32_t interrupt_stack_size = (uint32_t) bsp_interrupt_stack_size;
uintptr_t interrupt_stack_start = (uintptr_t) bsp_interrupt_stack_start;
uintptr_t interrupt_stack_size = (uintptr_t) bsp_interrupt_stack_size;
/*
* Get CPU identification dynamically. Note that the get_ppc_cpu_type() function
@@ -177,14 +180,19 @@ void bsp_start( void)
bsp_timer_average_overhead = 3;
/* Initialize exception handler */
ppc_exc_initialize(PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
sc = ppc_exc_initialize(
PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
interrupt_stack_start,
interrupt_stack_size
);
if (sc != RTEMS_SUCCESSFUL) {
BSP_panic("cannot initialize exceptions");
}
/* Initalize interrupt support */
if (bsp_interrupt_initialize() != RTEMS_SUCCESSFUL) {
BSP_panic("Cannot intitialize interrupt support\n");
sc = bsp_interrupt_initialize();
if (sc != RTEMS_SUCCESSFUL) {
BSP_panic("cannot intitialize interrupts");
}
#ifdef SHOW_MORE_INIT_SETTINGS

7
c/src/lib/libbsp/powerpc/virtex/ChangeLog
View File

@@ -1,3 +1,10 @@
2009-10-22 Sebastian Huber <sebastian.huber@embedded-brains.de>
* Makefile.am, preinstall.am: Update for exception support changes.
* irq/irq.c: Changed exception header file includes.
* startup/bspstart.c: Changed exception header file includes. Update
for ppc_exc_initialize() changes.
2009-10-21 Ralf Corsépius <ralf.corsepius@rtems.org>
* make/custom/virtex.cfg: Remove RTEMS_BSP_FAMILY.

6
c/src/lib/libbsp/powerpc/virtex/Makefile.am
View File

@@ -53,10 +53,6 @@ include_bsp_HEADERS += irq/irq.h
# irq
libbsp_a_SOURCES += irq/irq_init.c
include_bsp_HEADERS += \
../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/vectors.h \
../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/ppc_exc_bspsupp.h
if HAS_NETWORKING
network_CPPFLAGS = -D__INSIDE_RTEMS_BSD_TCPIP_STACK__
network_CPPFLAGS += -D__BSD_VISIBLE
@@ -68,8 +64,8 @@ endif
libbsp_a_LIBADD = \
../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/raw_exception.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/exc_bspsupport.rel \
../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
../../../libcpu/@RTEMS_CPU@/shared/cpuIdent.rel \
../../../libcpu/@RTEMS_CPU@/ppc403/clock.rel \
../../../libcpu/@RTEMS_CPU@/ppc403/timer.rel \

1
c/src/lib/libbsp/powerpc/virtex/irq/irq_init.c
View File

@@ -22,7 +22,6 @@
#include <libcpu/spr.h>
#include <bsp/irq.h>
#include <bsp.h>
#include <libcpu/raw_exception.h>
#include <rtems/bspIo.h>
#include <rtems/powerpc/powerpc.h>
#include <bsp/vectors.h>

8
c/src/lib/libbsp/powerpc/virtex/preinstall.am
View File

@@ -82,11 +82,3 @@ $(PROJECT_INCLUDE)/bsp/irq.h: irq/irq.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq.h
$(PROJECT_INCLUDE)/bsp/vectors.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/vectors.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vectors.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vectors.h
$(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/ppc_exc_bspsupp.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h

6
c/src/lib/libbsp/powerpc/virtex/startup/bspstart.c
View File

@@ -104,6 +104,7 @@ void bsp_XAssertHandler(const char* file, int line) {
*/
void bsp_start( void )
{
rtems_status_code sc = RTEMS_SUCCESSFUL;
extern unsigned char IntrStack_start[];
extern unsigned char IntrStack_end[];
ppc_cpu_id_t myCpu;
@@ -135,11 +136,14 @@ void bsp_start( void )
/*
* Initialize default raw exception handlers.
*/
ppc_exc_initialize(
sc = ppc_exc_initialize(
PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
(uint32_t)IntrStack_start,
IntrStack_end - IntrStack_start
);
if (sc != RTEMS_SUCCESSFUL) {
BSP_panic("cannot initialize exceptions");
}
/*
* Install our own set of exception vectors

26
c/src/lib/libcpu/powerpc/ChangeLog
View File

@@ -1,3 +1,29 @@
2009-10-22 Sebastian Huber <sebastian.huber@embedded-brains.de>
* new-exceptions/bspsupport/ppc-code-copy.c,
new-exceptions/bspsupport/ppc_exc_address.c,
new-exceptions/bspsupport/ppc_exc_categories.c,
new-exceptions/bspsupport/ppc_exc_global_handler.c,
new-exceptions/bspsupport/ppc_exc_initialize.c,
new-exceptions/bspsupport/ppc_exc_naked.S,
new-exceptions/bspsupport/ppc_exc_prologue.c: New files.
* new-exceptions/bspsupport/irq.c,
new-exceptions/bspsupport/irq_supp.h,
new-exceptions/bspsupport/ppc_exc_asm_macros.h: Changed exception
header file includes. Fixes for type changes.
* new-exceptions/bspsupport/vectors.h: Reformatted. Documentation.
Removed parts that belong to the raw exception API. Added
declarations from files "new-exceptions/raw_exception.h" and
"bspsupport/ppc_exc_bspsupp.h".
* new-exceptions/bspsupport/ppc_exc_hdl.c: Reformatted. Removed parts
that belong to the raw exception API.
* new-exceptions/bspsupport/ppc_exc_bspsupp.h: Added prologue template.
* new-exceptions/bspsupport/ppc_exc.S: Fixed
ppc_exc_tgpr_clr_prolog_size.
* shared/include/powerpc-utility.h: Reformatted. Include more files
for ASM.
* shared/include/cpuIdent.h: Added ppc_cpu_current() and ppc_cpu_is().
2009-10-22 Ralf Corsépius <ralf.corsepius@rtems.org>
* new-exceptions/bspsupport/vectors_init.c: Remove duplicate

35
c/src/lib/libcpu/powerpc/Makefile.am
View File

@@ -15,6 +15,10 @@ include_libcpudir = $(includedir)/libcpu
include_libcpu_HEADERS = shared/include/powerpc-utility.h
include_bspdir = $(includedir)/bsp
include_bsp_HEADERS =
EXTRA_DIST =
noinst_PROGRAMS = new-exceptions/rtems-cpu.rel
@@ -25,19 +29,20 @@ new_exceptions_rtems_cpu_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
if !mpc5xx
include_libcpu_HEADERS += new-exceptions/raw_exception.h
noinst_PROGRAMS += new-exceptions/raw_exception.rel
new_exceptions_raw_exception_rel_SOURCES = new-exceptions/raw_exception.c \
new-exceptions/asm_utils.S \
new-exceptions/e500_raw_exc_init.c
new_exceptions_raw_exception_rel_CPPFLAGS = $(AM_CPPFLAGS)
new_exceptions_raw_exception_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
include_bsp_HEADERS += new-exceptions/bspsupport/vectors.h
noinst_PROGRAMS += new-exceptions/exc_bspsupport.rel
new_exceptions_exc_bspsupport_rel_SOURCES = \
new-exceptions/bspsupport/ppc-code-copy.c \
new-exceptions/bspsupport/ppc_exc.S \
new-exceptions/bspsupport/ppc_exc_naked.S \
new-exceptions/bspsupport/ppc_exc_hdl.c \
new-exceptions/bspsupport/vectors_init.c
new-exceptions/bspsupport/ppc_exc_initialize.c \
new-exceptions/bspsupport/ppc_exc_global_handler.c \
new-exceptions/bspsupport/ppc_exc_categories.c \
new-exceptions/bspsupport/ppc_exc_address.c \
new-exceptions/bspsupport/ppc_exc_prologue.c
new_exceptions_exc_bspsupport_rel_CPPFLAGS = $(AM_CPPFLAGS)
new_exceptions_exc_bspsupport_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
@@ -50,7 +55,6 @@ endif
EXTRA_DIST += new-exceptions/bspsupport/vectors.h
EXTRA_DIST += new-exceptions/bspsupport/irq_supp.h
EXTRA_DIST += new-exceptions/bspsupport/ppc_exc_bspsupp.h
EXTRA_DIST += new-exceptions/bspsupport/README
EXTRA_DIST += new-exceptions/bspsupport/nest_irq_test.c
EXTRA_DIST += new-exceptions/bspsupport/ppc_exc_test.c
@@ -357,11 +361,6 @@ endif
if mpc83xx
# Includes
include_bspdir = $(includedir)/bsp
include_bsp_HEADERS = new-exceptions/bspsupport/vectors.h \
new-exceptions/bspsupport/ppc_exc_bspsupp.h
include_mpc83xxdir = $(includedir)/mpc83xx
include_mpc83xx_HEADERS = mpc83xx/include/mpc83xx.h
@@ -407,12 +406,6 @@ endif
if mpc55xx
# Includes
include_bspdir = $(includedir)/bsp
include_bsp_HEADERS = new-exceptions/bspsupport/vectors.h \
new-exceptions/bspsupport/ppc_exc_bspsupp.h \
mpc55xx/include/irq.h
include_mpc55xxdir = $(includedir)/mpc55xx
include_mpc55xx_HEADERS = mpc55xx/include/regs.h \
@@ -424,6 +417,8 @@ include_mpc55xx_HEADERS = mpc55xx/include/regs.h \
mpc55xx/include/esci.h \
mpc55xx/include/watchdog.h
include_bsp_HEADERS += mpc55xx/include/irq.h
# IRQ
noinst_PROGRAMS += mpc55xx/irq.rel
mpc55xx_irq_rel_SOURCES = mpc55xx/irq/irq.c

3
c/src/lib/libcpu/powerpc/mpc55xx/irq/irq.c
View File

@@ -20,12 +20,11 @@
#include <mpc55xx/regs.h>
#include <libcpu/raw_exception.h>
#include <libcpu/powerpc-utility.h>
#include <bsp/irq.h>
#include <bsp/vectors.h>
#include <bsp/irq-generic.h>
#include <bsp/ppc_exc_bspsupp.h>
#define RTEMS_STATUS_CHECKS_USE_PRINTK

1
c/src/lib/libcpu/powerpc/mpc6xx/mmu/pte121.c
View File

@@ -69,7 +69,6 @@
#ifdef DEBUG_EXC
#include <bsp.h>
#include <bsp/vectors.h>
#include <libcpu/raw_exception.h>
#endif
#endif

5
c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/irq.c
View File

@@ -16,10 +16,7 @@
#include <rtems.h>
#include "irq_supp.h"
#include <rtems/score/apiext.h> /* for post ISR signal processing */
#include <libcpu/raw_exception.h>
#include <libcpu/cpuIdent.h>
#include "vectors.h"
#include "ppc_exc_bspsupp.h"
#include <bsp/vectors.h>
#include <stdlib.h>
#include <rtems/bspIo.h> /* for printk */
#include <libcpu/spr.h>

7
c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/irq_supp.h
View File

@@ -24,9 +24,10 @@
#endif
#include <rtems.h>
#include <stdint.h>
#include <rtems/irq.h>
#include <bsp/vectors.h>
#ifdef __cplusplus
extern "C" {
#endif
@@ -51,8 +52,6 @@ extern int BSP_disable_irq_at_pic(const rtems_irq_number irqLine);
*/
extern int BSP_setup_the_pic(rtems_irq_global_settings* config);
struct _BSP_Exception_frame;
/* IRQ dispatcher to be defined by the PIC driver; note that it MUST
* implement shared interrupts.
* Note also that the exception frame passed to this handler is not very
@@ -64,7 +63,7 @@ struct _BSP_Exception_frame;
* uncaught exception.
*******************************************************************
*/
int C_dispatch_irq_handler (struct _BSP_Exception_frame *frame, unsigned int excNum);
int C_dispatch_irq_handler (BSP_Exception_frame *frame, unsigned int excNum);
/*
* Snippet to be used by PIC drivers and by bsp_irq_dispatch_list

6
c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc.S
View File

@@ -64,6 +64,9 @@ ppc_exc_min_prolog_auto:
mflr VECTOR_REGISTER
bla wrap_auto
.global ppc_exc_tgpr_clr_prolog_size
ppc_exc_tgpr_clr_prolog_size = . - ppc_exc_tgpr_clr_prolog
/**
* @brief Use vector offsets with 16 byte boundaries.
*
@@ -76,9 +79,6 @@ ppc_exc_min_prolog_auto_packed:
mflr VECTOR_REGISTER
bla wrap_auto_packed
.global ppc_exc_tgpr_clr_prolog_size
ppc_exc_tgpr_clr_prolog_size = . - ppc_exc_tgpr_clr_prolog
/*
* Automatic vector, asynchronous exception; however,
* automatic vector calculation is less efficient than

5
c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_asm_macros.h
View File

@@ -12,10 +12,7 @@
* reintroduce such statements.
*/
#include <libcpu/powerpc-utility.h>
#include <libcpu/raw_exception.h>
#include "vectors.h"
#include <bsp/vectors.h>
#define LT(cr) ((cr)*4+0)
#define GT(cr) ((cr)*4+1)

1
c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_bspsupp.h
View File

@@ -117,6 +117,7 @@ extern void ppc_exc_min_prolog_async_tmpl_bookE_crit(void);
extern void ppc_exc_min_prolog_sync_tmpl_bookE_crit(void);
extern void ppc_exc_min_prolog_sync_tmpl_e500_mchk(void);
extern void ppc_exc_min_prolog_async_tmpl_e500_mchk(void);
extern void ppc_exc_min_prolog_tmpl_naked(void);
/* Special prologue for handling register shadowing on 603-style CPUs */
extern void ppc_exc_tgpr_clr_prolog(void);

86
c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_hdl.c
View File

@@ -10,20 +10,10 @@
* $Id$
*/
#include <stdint.h>
#include <string.h>
#include <rtems.h>
#include <rtems/score/cpu.h>
#include <libcpu/raw_exception.h>
#include <libcpu/spr.h>
#include <rtems/score/apiext.h>
#include "vectors.h"
#include "ppc_exc_bspsupp.h"
/* offset into min-prolog where vector # is hardcoded */
#define PPC_EXC_PROLOG_VEC_OFFSET 2
#include <bsp/vectors.h>
/* Provide temp. storage space for a few registers.
* This is used by the assembly code prior to setting up
@@ -51,9 +41,9 @@ uint32_t ppc_exc_vector_register_mchk = 0;
*/
uint32_t ppc_exc_msr_bits = MSR_IR | MSR_DR | MSR_RI;
int ppc_exc_handler_default( BSP_Exception_frame *f, unsigned int vector)
static int ppc_exc_handler_default(BSP_Exception_frame *f, unsigned int vector)
{
return 1;
return -1;
}
/* Table of C-handlers */
@@ -63,31 +53,32 @@ ppc_exc_handler_t ppc_exc_handler_table [LAST_VALID_EXC + 1] = {
ppc_exc_handler_t ppc_exc_get_handler(unsigned vector)
{
ppc_exc_handler_t handler = NULL;
if (vector > LAST_VALID_EXC) {
return 0;
if (
vector <= LAST_VALID_EXC
&& ppc_exc_handler_table [vector] != ppc_exc_handler_default
) {
return ppc_exc_handler_table [vector];
} else {
return NULL;
}
if (ppc_exc_handler_table [vector] != ppc_exc_handler_default) {
handler = ppc_exc_handler_table [vector];
}
return handler;
}
int ppc_exc_set_handler( unsigned vector, ppc_exc_handler_t handler)
rtems_status_code ppc_exc_set_handler(unsigned vector, ppc_exc_handler_t handler)
{
if (vector > LAST_VALID_EXC) {
return -1;
}
if (vector <= LAST_VALID_EXC) {
if (handler == NULL) {
ppc_exc_handler_table [vector] = ppc_exc_handler_default;
} else {
ppc_exc_handler_table [vector] = handler;
}
return 0;
return RTEMS_SUCCESSFUL;
} else {
return RTEMS_INVALID_ID;
}
}
void
ppc_exc_wrapup( BSP_Exception_frame *f)
void ppc_exc_wrapup(BSP_Exception_frame *frame)
{
/* dispatch_disable level is decremented from assembly code. */
if ( _Context_Switch_necessary ) {
@@ -110,44 +101,3 @@ ppc_exc_wrapup( BSP_Exception_frame *f)
}
}
}
void
ppc_exc_min_prolog_expand(ppc_exc_min_prolog_t buf, ppc_exc_min_prolog_template_t templ, uint16_t vec)
{
memcpy(&buf[0], templ, sizeof(ppc_exc_min_prolog_t));
/* fixup the vector */
buf[PPC_EXC_PROLOG_VEC_OFFSET] = (buf[PPC_EXC_PROLOG_VEC_OFFSET] & 0xffff8000) | (vec & 0x7fff);
}
#undef TESTING
#ifdef TESTING
static void noop(const struct __rtems_raw_except_connect_data__*x) {}
rtems_raw_except_connect_data exc_conn = {
exceptIndex: ASM_SYS_VECTOR,
hdl : {
vector: ASM_SYS_VECTOR,
raw_hdl: 0,
raw_hdl_size: 0
},
on : noop,
off : noop,
isOn : 0 /* never used AFAIK */
};
void
ppc_exc_raise()
{
asm volatile("li 3, 0xffffdead; sc");
}
int
exc_conn_do()
{
exc_conn.hdl.raw_hdl = ppc_exc_min_prolog_auto;
exc_conn.hdl.raw_hdl_size = 16;
return ppc_set_exception(&exc_conn);
}
#endif

398
c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/vectors.h
View File

@@ -1,10 +1,29 @@
/**
* @file
*
* @ingroup ppc_exc
* @ingroup ppc_exc_frame
*
* @brief PowerPC Exceptions API.
*/
/*
* vectors.h Exception frame related contant and API.
* Copyright (C) 1999 Eric Valette (valette@crf.canon.fr)
* Canon Centre Recherche France.
*
* This include file describe the data structure and the functions implemented
* by rtems to handle exceptions.
* Copyright (C) 2007 Till Straumann <strauman@slac.stanford.edu>
*
* CopyRight (C) 1999 valette@crf.canon.fr
* Copyright (C) 2009 embedded brains GmbH.
*
* Enhanced by Jay Kulpinski <jskulpin@eng01.gdds.com>
* to support 603, 603e, 604, 604e exceptions
*
* Moved to "libcpu/powerpc/new-exceptions" and consolidated
* by Thomas Doerfler <Thomas.Doerfler@embedded-brains.de>
* to be common for all PPCs with new exceptions.
*
* Derived from file "libcpu/powerpc/new-exceptions/raw_exception.h".
* Derived from file "libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_bspsupp.h".
*
* The license and distribution terms for this file may be
* found in found in the file LICENSE in this distribution or at
@@ -12,10 +31,117 @@
*
* $Id$
*/
#ifndef LIBCPU_POWERPC_BSPSUPP_VECTORS_H
#define LIBCPU_POWERPC_BSPSUPP_VECTORS_H
#include <libcpu/raw_exception.h>
/* DO NOT INTRODUCE #ifdef <cpu_flavor> in this file */
#ifndef LIBCPU_VECTORS_H
#define LIBCPU_VECTORS_H
#include <libcpu/powerpc-utility.h>
/**
* @defgroup ppc_exc PowerPC Exceptions
*
* @brief XXX
*
* @{
*/
#define ASM_RESET_VECTOR 0x01
#define ASM_MACH_VECTOR 0x02
#define ASM_PROT_VECTOR 0x03
#define ASM_ISI_VECTOR 0x04
#define ASM_EXT_VECTOR 0x05
#define ASM_ALIGN_VECTOR 0x06
#define ASM_PROG_VECTOR 0x07
#define ASM_FLOAT_VECTOR 0x08
#define ASM_DEC_VECTOR 0x09
#define ASM_SYS_VECTOR 0x0C
#define ASM_TRACE_VECTOR 0x0D
#define ASM_BOOKE_CRIT_VECTOR 0x01
/* We could use the std. decrementer vector # on bookE, too,
* but the bookE decrementer has slightly different semantics
* so we use a different vector (which happens to be
* the PIT vector on the 405 which is like the booke decrementer)
*/
#define ASM_BOOKE_DEC_VECTOR 0x10
#define ASM_BOOKE_ITLBMISS_VECTOR 0x11
#define ASM_BOOKE_DTLBMISS_VECTOR 0x12
#define ASM_BOOKE_FIT_VECTOR 0x13
#define ASM_BOOKE_WDOG_VECTOR 0x14
#define ASM_PPC405_APU_UNAVAIL_VECTOR ASM_60X_VEC_ASSIST_VECTOR
#define ASM_8XX_FLOATASSIST_VECTOR 0x0E
#define ASM_8XX_SOFTEMUL_VECTOR 0x10
#define ASM_8XX_ITLBMISS_VECTOR 0x11
#define ASM_8XX_DTLBMISS_VECTOR 0x12
#define ASM_8XX_ITLBERROR_VECTOR 0x13
#define ASM_8XX_DTLBERROR_VECTOR 0x14
#define ASM_8XX_DBREAK_VECTOR 0x1C
#define ASM_8XX_IBREAK_VECTOR 0x1D
#define ASM_8XX_PERIFBREAK_VECTOR 0x1E
#define ASM_8XX_DEVPORT_VECTOR 0x1F
#define ASM_5XX_FLOATASSIST_VECTOR 0x0E
#define ASM_5XX_SOFTEMUL_VECTOR 0x10
#define ASM_5XX_IPROT_VECTOR 0x13
#define ASM_5XX_DPROT_VECTOR 0x14
#define ASM_5XX_DBREAK_VECTOR 0x1C
#define ASM_5XX_IBREAK_VECTOR 0x1D
#define ASM_5XX_MEBREAK_VECTOR 0x1E
#define ASM_5XX_NMEBREAK_VECTOR 0x1F
#define ASM_60X_VEC_VECTOR 0x0A
#define ASM_60X_PERFMON_VECTOR 0x0F
#define ASM_60X_IMISS_VECTOR 0x10
#define ASM_60X_DLMISS_VECTOR 0x11
#define ASM_60X_DSMISS_VECTOR 0x12
#define ASM_60X_ADDR_VECTOR 0x13
#define ASM_60X_SYSMGMT_VECTOR 0x14
#define ASM_60X_VEC_ASSIST_VECTOR 0x16
#define ASM_60X_ITM_VECTOR 0x17
/* e200 */
#define ASM_E200_SPE_UNAVAILABLE_VECTOR 0x15
#define ASM_E200_SPE_DATA_VECTOR 0x16
#define ASM_E200_SPE_ROUND_VECTOR 0x17
/* e300 */
#define ASM_E300_CRIT_VECTOR 0x0A
#define ASM_E300_PERFMON_VECTOR 0x0F
#define ASM_E300_IMISS_VECTOR ASM_60X_IMISS_VECTOR /* Special case: Shadowed GPRs */
#define ASM_E300_DLMISS_VECTOR ASM_60X_DLMISS_VECTOR /* Special case: Shadowed GPRs */
#define ASM_E300_DSMISS_VECTOR ASM_60X_DSMISS_VECTOR /* Special case: Shadowed GPRs */
#define ASM_E300_ADDR_VECTOR 0x13
#define ASM_E300_SYSMGMT_VECTOR 0x14
/*
* If you change that number make sure to adjust the wrapper code in ppc_exc.S
* and that ppc_exc_handler_table will be correctly initialized.
*/
#define LAST_VALID_EXC 0x1F
/* DO NOT USE -- this symbol is DEPRECATED
* (only used by libbsp/shared/vectors/vectors.S
* which should not be used by new BSPs).
*/
#define ASM_60X_VEC_VECTOR_OFFSET 0xf20
#define ASM_PPC405_FIT_VECTOR_OFFSET 0x1010
#define ASM_PPC405_WDOG_VECTOR_OFFSET 0x1020
#define ASM_PPC405_TRACE_VECTOR_OFFSET 0x2000
/** @} */
/**
* @defgroup ppc_exc_frame PowerPC Exception Frame
*
* @brief XXX
*
* @{
*/
/*
* The callee (high level exception code written in C)
@@ -73,28 +199,17 @@
*/
#define EXCEPTION_FRAME_END 176
/** @} */
#ifndef ASM
#include <stdint.h>
/* codemove is like memmove, but it also gets the cache line size
* as 4th parameter to synchronize them. If this last parameter is
* zero, it performs more or less like memmove. No copy is performed if
* source and destination addresses are equal. However the caches
* are synchronized. Note that the size is always rounded up to the
* next mutiple of 4.
/**
* @ingroup ppc_exc_frame
*
* @{
*/
extern void * codemove(void *, const void *, unsigned int, unsigned long);
extern void exception_nop_enable(const rtems_raw_except_connect_data* ptr);
extern int exception_always_enabled(const rtems_raw_except_connect_data* ptr);
void ppc_exc_initialize(
uint32_t interrupt_disable_mask,
uint32_t interrupt_stack_start,
uint32_t interrupt_stack_size
);
typedef struct _BSP_Exception_frame {
typedef struct {
unsigned EXC_SRR0;
unsigned EXC_SRR1;
unsigned _EXC_number;
@@ -138,20 +253,237 @@ typedef struct _BSP_Exception_frame {
unsigned EXC_DAR;
} BSP_Exception_frame;
typedef void (*exception_handler_t) (BSP_Exception_frame* excPtr);
/** @} */
/**
* @ingroup ppc_exc
*
* @{
*/
/**
* @brief Global exception handler type.
*/
typedef void (*exception_handler_t)(BSP_Exception_frame*);
/**
* @brief Global exception handler.
*/
extern exception_handler_t globalExceptHdl;
/**
* @brief Default global exception handler.
*/
void C_exception_handler(BSP_Exception_frame* excPtr);
void BSP_printStackTrace(BSP_Exception_frame *excPtr);
/**
* @brief Exception categories.
*
* Exceptions of different categories use different SRR registers to save the
* machine state and do different things in the prologue and epilogue.
*
* For now, the CPU descriptions assume this fits into 8 bits.
*/
typedef enum {
PPC_EXC_INVALID = 0,
PPC_EXC_ASYNC = 1,
PPC_EXC_CLASSIC = 2,
PPC_EXC_CLASSIC_ASYNC = PPC_EXC_CLASSIC | PPC_EXC_ASYNC,
PPC_EXC_405_CRITICAL = 4,
PPC_EXC_405_CRITICAL_ASYNC = PPC_EXC_405_CRITICAL | PPC_EXC_ASYNC,
PPC_EXC_BOOKE_CRITICAL = 6,
PPC_EXC_BOOKE_CRITICAL_ASYNC = PPC_EXC_BOOKE_CRITICAL | PPC_EXC_ASYNC,
PPC_EXC_E500_MACHCHK = 8,
PPC_EXC_E500_MACHCHK_ASYNC = PPC_EXC_E500_MACHCHK | PPC_EXC_ASYNC,
PPC_EXC_NAKED = 10
} ppc_exc_category;
/**
* @brief Categorie set type.
*/
typedef uint8_t ppc_exc_categories [LAST_VALID_EXC + 1];
static inline bool ppc_exc_is_valid_category(ppc_exc_category category)
{
return (unsigned) category <= (unsigned) PPC_EXC_NAKED;
}
/**
* @brief Indicates if exception entry table resides in a writable memory.
*
* This variable is initialized to 'TRUE' by default;
* BSPs which have their vectors in ROM should set it
* to FALSE prior to initializing raw exceptions.
*
* I suspect the only candidate is the simulator.
* After all, the value of this variable is used to
* determine where to install the prologue code and
* installing to ROM on anyting that's real ROM
* will fail anyways.
*
* This should probably go away... (T.S. 2007/11/30)
*/
extern bool bsp_exceptions_in_RAM;
/**
* @brief Vector base address for CPUs (for example e200 and e500) with IVPR
* and IVOR registers.
*/
extern uint32_t ppc_exc_vector_base;
/**
* @brief Returns the entry address of the vector @a vector.
*/
void *ppc_exc_vector_address(unsigned vector);
/**
* @brief Returns the category set for a CPU of type @a cpu, or @c NULL if
* there is no category set available for this CPU.
*/
const ppc_exc_categories *ppc_exc_categories_for_cpu(ppc_cpu_id_t cpu);
/**
* @brief Returns the category set for the current CPU, or @c NULL if there is
* no category set available for this CPU.
*/
static inline const ppc_exc_categories *ppc_exc_current_categories(void)
{
return ppc_exc_categories_for_cpu(ppc_cpu_current());
}
/**
* @brief Returns the category for the vector @a vector using the category set
* @a categories.
*/
ppc_exc_category ppc_exc_category_for_vector(
const ppc_exc_categories *categories,
unsigned vector
);
/**
* @brief Makes a minimal prologue for the vector @a vector with the category
* @a category.
*
* The minimal prologue will be copied to @a prologue. Not more than @a
* prologue_size bytes will be copied. Returns the actual minimal prologue
* size in bytes in @a prologue_size.
*
* @retval RTEMS_SUCCESSFUL Minimal prologue successfully made.
* @retval RTEMS_INVALID_ID Invalid vector number.
* @retval RTEMS_INVALID_NUMBER Invalid category.
* @retval RTEMS_INVALID_SIZE Prologue size to small.
*/
rtems_status_code ppc_exc_make_prologue(
unsigned vector,
ppc_exc_category category,
uint32_t *prologue,
size_t *prologue_size
);
/**
* @brief Initializes the exception handling.
*
* @retval RTEMS_SUCCESSFUL Successful initialization.
* @retval RTEMS_NOT_IMPLEMENTED No category set available for the current CPU.
* @retval RTEMS_NOT_CONFIGURED Register r13 does not point to the small data
* area anchor required by SVR4/EABI.
* @retval RTEMS_INTERNAL_ERROR Minimal prologue creation failed.
*/
rtems_status_code ppc_exc_initialize(
uint32_t interrupt_disable_mask,
uintptr_t interrupt_stack_begin,
uintptr_t interrupt_stack_size
);
/**
* @brief High-level exception handler type.
*
* Exception handlers should return zero if the exception was handled and
* normal execution may resume.
*
* They should return minus one to reject the exception resulting in the
* globalExcHdl() being called.
*
* Other return values are reserved.
*/
typedef int (*ppc_exc_handler_t)(BSP_Exception_frame *f, unsigned vector);
/**
* @brief Bits for MSR update.
*
* Bits in MSR that are enabled during execution of exception handlers / ISRs
* (on classic PPC these are DR/IR/RI [default], on bookE-style CPUs they should
* be set to 0 during initialization)
*
* By default, the setting of these bits that is in effect when exception
* handling is initialized is used.
*/
extern uint32_t ppc_exc_msr_bits;
/**
* @brief Cache write back check flag.
*
* (See README under CAVEATS). During initialization
* a check is performed to assert that write-back
* caching is enabled for memory accesses. If a BSP
* runs entirely without any caching then it should
* set this variable to zero prior to initializing
* exceptions in order to skip the test.
* NOTE: The code does NOT support mapping memory
* with cache-attributes other than write-back
* (unless the entire cache is physically disabled)
*/
extern uint32_t ppc_exc_cache_wb_check;
/**
* @brief Set high-level exception handler.
*
* Hook C exception handlers.
* - handlers for asynchronous exceptions run on the ISR stack
* with thread-dispatching disabled.
* - handlers for synchronous exceptions run on the task stack
* with thread-dispatching enabled.
*
* If a particular slot is NULL then the traditional 'globalExcHdl' is used.
*
* ppc_exc_set_handler() registers a handler (returning 0 on success,
* -1 if the vector argument is too big).
*
* It is legal to set a NULL handler. This leads to the globalExcHdl
* being called if an exception for 'vector' occurs.
*/
rtems_status_code ppc_exc_set_handler(unsigned vector, ppc_exc_handler_t hdl);
/**
* @brief Returns the currently active high-level exception handler.
*/
ppc_exc_handler_t ppc_exc_get_handler(unsigned vector);
/**
* @brief Function for DAR access.
*
* CPU support may store the address of a function here
* that can be used by the default exception handler to
* obtain fault-address info which is helpful. Unfortunately,
* the SPR holding this information is not uniform
* across PPC families so we need assistance from
* CPU support
*/
extern uint32_t (*ppc_exc_get_DAR)(void);
void
ppc_exc_wrapup(BSP_Exception_frame *f);
/** @} */
/*
* Compatibility with pc386
*/
typedef BSP_Exception_frame CPU_Exception_frame;
typedef exception_handler_t cpuExcHandlerType;
/*
* dummy functions for exception interface
*/
void exception_nop_enable(const rtems_raw_except_connect_data* ptr);
int exception_always_enabled(const rtems_raw_except_connect_data* ptr);
#endif /* ASM */
#endif /* LIBCPU_POWERPC_BSPSUPP_VECTORS_H */
#endif /* LIBCPU_VECTORS_H */

2
c/src/lib/libcpu/powerpc/ppc403/clock/clock.c
View File

@@ -51,9 +51,7 @@
#include <bsp.h>
#ifdef BSP_PPC403_CLOCK_HOOK_EXCEPTION
#include <libcpu/raw_exception.h>
#include <bsp/vectors.h>
#include <bsp/ppc_exc_bspsupp.h>
#define PPC_HAS_CLASSIC_EXCEPTIONS FALSE
#else
#if !defined(ppc405)

Some files were not shown because too many files have changed in this diff Show More