From 2c24c8cb0c6893391fa56766993828e1092f0187 Mon Sep 17 00:00:00 2001 From: Joel Sherrill Date: Thu, 31 Jul 2025 15:32:50 -0500 Subject: [PATCH] imxrt/mcux-sdk/.../fsl_mipi_dsi.c: Fix used before initialized warning These were outputs from a called function. Initialized to 0 to make GCC happy. --- .../imxrt/mcux-sdk/drivers/mipi_dsi_split/fsl_mipi_dsi.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/bsps/arm/imxrt/mcux-sdk/drivers/mipi_dsi_split/fsl_mipi_dsi.c b/bsps/arm/imxrt/mcux-sdk/drivers/mipi_dsi_split/fsl_mipi_dsi.c index 7973e38b9b..45c9f84e99 100644 --- a/bsps/arm/imxrt/mcux-sdk/drivers/mipi_dsi_split/fsl_mipi_dsi.c +++ b/bsps/arm/imxrt/mcux-sdk/drivers/mipi_dsi_split/fsl_mipi_dsi.c @@ -624,9 +624,15 @@ uint32_t DSI_InitDphy(const MIPI_DSI_Type *base, const dsi_dphy_config_t *config DSI_HOST_Type *host = base->host; #if !((defined(FSL_FEATURE_MIPI_NO_DPHY_PLL)) && (0 != FSL_FEATURE_MIPI_DSI_HOST_NO_DPHY_PLL)) +#ifndef __rtems__ uint32_t cn; uint32_t cm; uint32_t co; +#else + uint32_t cn = 0; + uint32_t cm = 0; + uint32_t co = 0; +#endif uint32_t outputPllFreq; outputPllFreq = DSI_DphyGetPllDivider(&cn, &cm, &co, refClkFreq_Hz, config->txHsBitClk_Hz);