forked from Imagelibrary/rtems
Remove make preinstall
A speciality of the RTEMS build system was the make preinstall step. It copied header files from arbitrary locations into the build tree. The header files were included via the -Bsome/build/tree/path GCC command line option. This has at least seven problems: * The make preinstall step itself needs time and disk space. * Errors in header files show up in the build tree copy. This makes it hard for editors to open the right file to fix the error. * There is no clear relationship between source and build tree header files. This makes an audit of the build process difficult. * The visibility of all header files in the build tree makes it difficult to enforce API barriers. For example it is discouraged to use BSP-specifics in the cpukit. * An introduction of a new build system is difficult. * Include paths specified by the -B option are system headers. This may suppress warnings. * The parallel build had sporadic failures on some hosts. This patch removes the make preinstall step. All installed header files are moved to dedicated include directories in the source tree. Let @RTEMS_CPU@ be the target architecture, e.g. arm, powerpc, sparc, etc. Let @RTEMS_BSP_FAMILIY@ be a BSP family base directory, e.g. erc32, imx, qoriq, etc. The new cpukit include directories are: * cpukit/include * cpukit/score/cpu/@RTEMS_CPU@/include * cpukit/libnetworking The new BSP include directories are: * bsps/include * bsps/@RTEMS_CPU@/include * bsps/@RTEMS_CPU@/@RTEMS_BSP_FAMILIY@/include There are build tree include directories for generated files. The include directory order favours the most general header file, e.g. it is not possible to override general header files via the include path order. The "bootstrap -p" option was removed. The new "bootstrap -H" option should be used to regenerate the "headers.am" files. Update #3254.
This commit is contained in:
Chris Johns
committed by
Sebastian Huber
Sebastian Huber
parent
9704efb4ec
commit
2afb22b7e1
95
bsps/arm/lpc24xx/include/bsp/dma.h
Normal file
95
bsps/arm/lpc24xx/include/bsp/dma.h
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@@ -0,0 +1,95 @@
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/**
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* @file
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*
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* @ingroup lpc24xx_dma
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*
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* @brief Direct memory access (DMA) support.
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*/
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/*
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* Copyright (c) 2008, 2009
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* embedded brains GmbH
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* Obere Lagerstr. 30
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* D-82178 Puchheim
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* Germany
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* <rtems@embedded-brains.de>
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rtems.org/license/LICENSE.
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*/
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#ifndef LIBBSP_ARM_LPC24XX_DMA_H
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#define LIBBSP_ARM_LPC24XX_DMA_H
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#include <rtems.h>
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#ifdef __cplusplus
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extern "C" {
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#endif /* __cplusplus */
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/**
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* @defgroup lpc24xx_dma DMA Support
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*
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* @ingroup lpc24xx
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*
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* @brief Direct memory access (DMA) support.
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*
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* @{
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*/
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/**
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* @brief Initializes the general purpose DMA.
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*/
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void lpc24xx_dma_initialize(void);
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/**
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* @brief Tries to obtain the DMA channel @a channel.
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*
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* @retval RTEMS_SUCCESSFUL Successful operation.
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* @retval RTEMS_INVALID_ID Invalid channel number.
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* @retval RTEMS_RESOURCE_IN_USE Channel already occupied.
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*/
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rtems_status_code lpc24xx_dma_channel_obtain(unsigned channel);
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/**
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* @brief Releases the DMA channel @a channel.
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*
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* You must have obtained this channel with lpc24xx_dma_channel_obtain()
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* previously.
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*
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* If the channel number @a channel is out of range nothing will happen.
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*/
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void lpc24xx_dma_channel_release(unsigned channel);
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/**
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* @brief Disables the DMA channel @a channel.
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*
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* If @a force is @c false the channel will be halted and disabled when the
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* channel is inactive otherwise it will be disabled immediately.
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*
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* If the channel number @a channel is out of range nothing will happen.
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*/
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void lpc24xx_dma_channel_disable(unsigned channel, bool force);
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rtems_status_code lpc24xx_dma_copy_initialize(void);
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rtems_status_code lpc24xx_dma_copy_release(void);
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rtems_status_code lpc24xx_dma_copy(
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unsigned channel,
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void *dest,
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const void *src,
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size_t n,
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size_t width
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);
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rtems_status_code lpc24xx_dma_copy_wait(unsigned channel);
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/** @} */
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#ifdef __cplusplus
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}
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#endif /* __cplusplus */
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#endif /* LIBBSP_ARM_LPC24XX_DMA_H */
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71
bsps/arm/lpc24xx/include/bsp/i2c.h
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71
bsps/arm/lpc24xx/include/bsp/i2c.h
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@@ -0,0 +1,71 @@
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/**
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* @file
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*
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* @ingroup lpc24xx_libi2c
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*
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* @brief LibI2C bus driver for the I2C modules.
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*/
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/*
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* Copyright (c) 2009-2011 embedded brains GmbH. All rights reserved.
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*
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* embedded brains GmbH
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* Obere Lagerstr. 30
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* 82178 Puchheim
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* Germany
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* <rtems@embedded-brains.de>
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rtems.org/license/LICENSE.
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*/
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#ifndef LIBBSP_ARM_LPC24XX_I2C_H
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#define LIBBSP_ARM_LPC24XX_I2C_H
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#include <rtems.h>
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#include <rtems/libi2c.h>
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#include <bsp/io.h>
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#include <bsp/lpc24xx.h>
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#ifdef __cplusplus
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extern "C" {
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#endif /* __cplusplus */
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/**
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* @defgroup lpc24xx_libi2c LPC24XX Bus Drivers
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*
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* @ingroup libi2c
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*
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* @brief LibI2C bus drivers for LPC24XX.
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*
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* @{
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*/
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typedef struct {
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rtems_libi2c_bus_t bus;
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volatile lpc24xx_i2c *regs;
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size_t index;
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const lpc24xx_pin_range *pins;
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rtems_vector_number vector;
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rtems_id state_update;
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uint8_t *volatile data;
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uint8_t *volatile end;
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} lpc24xx_i2c_bus_entry;
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extern const rtems_libi2c_bus_ops_t lpc24xx_i2c_ops;
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extern rtems_libi2c_bus_t *const lpc24xx_i2c_0;
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extern rtems_libi2c_bus_t *const lpc24xx_i2c_1;
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extern rtems_libi2c_bus_t *const lpc24xx_i2c_2;
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/** @} */
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#ifdef __cplusplus
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}
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#endif /* __cplusplus */
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#endif /* LIBBSP_ARM_LPC24XX_I2C_H */
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1154
bsps/arm/lpc24xx/include/bsp/io.h
Normal file
1154
bsps/arm/lpc24xx/include/bsp/io.h
Normal file
File diff suppressed because it is too large
Load Diff
140
bsps/arm/lpc24xx/include/bsp/irq.h
Normal file
140
bsps/arm/lpc24xx/include/bsp/irq.h
Normal file
@@ -0,0 +1,140 @@
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/**
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* @file
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*
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* @ingroup bsp_interrupt
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*
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* @brief LPC24XX interrupt definitions.
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*/
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/*
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* Copyright (c) 2008-2012 embedded brains GmbH. All rights reserved.
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*
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* embedded brains GmbH
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* Obere Lagerstr. 30
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* 82178 Puchheim
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* Germany
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* <rtems@embedded-brains.de>
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rtems.org/license/LICENSE.
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*/
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#ifndef LIBBSP_ARM_LPC24XX_IRQ_H
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#define LIBBSP_ARM_LPC24XX_IRQ_H
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#ifndef ASM
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#include <rtems.h>
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#include <rtems/irq.h>
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#include <rtems/irq-extension.h>
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#endif
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/**
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* @addtogroup bsp_interrupt
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*
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* @{
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*/
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#define BSP_INTERRUPT_VECTOR_MIN 0
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#ifdef ARM_MULTILIB_ARCH_V4
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#define LPC24XX_IRQ_WDT 0
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#define LPC24XX_IRQ_SOFTWARE 1
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#define LPC24XX_IRQ_ARM_CORE_0 2
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#define LPC24XX_IRQ_ARM_CORE_1 3
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#define LPC24XX_IRQ_TIMER_0 4
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#define LPC24XX_IRQ_TIMER_1 5
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#define LPC24XX_IRQ_UART_0 6
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#define LPC24XX_IRQ_UART_1 7
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#define LPC24XX_IRQ_PWM 8
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#define LPC24XX_IRQ_I2C_0 9
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#define LPC24XX_IRQ_SPI_SSP_0 10
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#define LPC24XX_IRQ_SSP_1 11
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#define LPC24XX_IRQ_PLL 12
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#define LPC24XX_IRQ_RTC 13
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#define LPC24XX_IRQ_EINT_0 14
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#define LPC24XX_IRQ_EINT_1 15
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#define LPC24XX_IRQ_EINT_2 16
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#define LPC24XX_IRQ_EINT_3 17
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#define LPC24XX_IRQ_ADC_0 18
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#define LPC24XX_IRQ_I2C_1 19
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#define LPC24XX_IRQ_BOD 20
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#define LPC24XX_IRQ_ETHERNET 21
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#define LPC24XX_IRQ_USB 22
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#define LPC24XX_IRQ_CAN 23
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#define LPC24XX_IRQ_SD_MMC 24
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#define LPC24XX_IRQ_DMA 25
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#define LPC24XX_IRQ_TIMER_2 26
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#define LPC24XX_IRQ_TIMER_3 27
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#define LPC24XX_IRQ_UART_2 28
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#define LPC24XX_IRQ_UART_3 29
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#define LPC24XX_IRQ_I2C_2 30
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#define LPC24XX_IRQ_I2S 31
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#define BSP_INTERRUPT_VECTOR_MAX 31
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#else
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#define LPC24XX_IRQ_WDT 0
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#define LPC24XX_IRQ_TIMER_0 1
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#define LPC24XX_IRQ_TIMER_1 2
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#define LPC24XX_IRQ_TIMER_2 3
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#define LPC24XX_IRQ_TIMER_3 4
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#define LPC24XX_IRQ_UART_0 5
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#define LPC24XX_IRQ_UART_1 6
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#define LPC24XX_IRQ_UART_2 7
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#define LPC24XX_IRQ_UART_3 8
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#define LPC24XX_IRQ_PWM_1 9
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#define LPC24XX_IRQ_I2C_0 10
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#define LPC24XX_IRQ_I2C_1 11
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#define LPC24XX_IRQ_I2C_2 12
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#define LPC24XX_IRQ_SPI_SSP_0 14
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#define LPC24XX_IRQ_SSP_1 15
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#define LPC24XX_IRQ_PLL 16
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#define LPC24XX_IRQ_RTC 17
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#define LPC24XX_IRQ_EINT_0 18
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#define LPC24XX_IRQ_EINT_1 19
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#define LPC24XX_IRQ_EINT_2 20
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#define LPC24XX_IRQ_EINT_3 21
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#define LPC24XX_IRQ_ADC_0 22
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#define LPC24XX_IRQ_BOD 23
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#define LPC24XX_IRQ_USB 24
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#define LPC24XX_IRQ_CAN 25
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#define LPC24XX_IRQ_DMA 26
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#define LPC24XX_IRQ_I2S 27
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#define LPC24XX_IRQ_ETHERNET 28
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#define LPC24XX_IRQ_SD_MMC 29
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#define LPC24XX_IRQ_MCPWM 30
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#define LPC24XX_IRQ_QEI 31
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#define LPC24XX_IRQ_PLL_ALT 32
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#define LPC24XX_IRQ_USB_ACTIVITY 33
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#define LPC24XX_IRQ_CAN_ACTIVITY 34
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#define LPC24XX_IRQ_UART_4 35
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#define LPC24XX_IRQ_SSP_2 36
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#define LPC24XX_IRQ_LCD 37
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#define LPC24XX_IRQ_GPIO 38
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#define LPC24XX_IRQ_PWM 39
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#define LPC24XX_IRQ_EEPROM 40
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#define BSP_INTERRUPT_VECTOR_MAX 40
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#endif
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#define LPC24XX_IRQ_PRIORITY_VALUE_MIN 0
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#ifdef ARM_MULTILIB_ARCH_V4
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#define LPC24XX_IRQ_PRIORITY_VALUE_MAX 15
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#else
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#define LPC24XX_IRQ_PRIORITY_VALUE_MAX 31
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#endif
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#define LPC24XX_IRQ_PRIORITY_COUNT (LPC24XX_IRQ_PRIORITY_VALUE_MAX + 1)
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#define LPC24XX_IRQ_PRIORITY_HIGHEST LPC24XX_IRQ_PRIORITY_VALUE_MIN
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#define LPC24XX_IRQ_PRIORITY_LOWEST LPC24XX_IRQ_PRIORITY_VALUE_MAX
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#ifndef ASM
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void lpc24xx_irq_set_priority(rtems_vector_number vector, unsigned priority);
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unsigned lpc24xx_irq_get_priority(rtems_vector_number vector);
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#endif /* ASM */
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/** @} */
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#endif /* LIBBSP_ARM_LPC24XX_IRQ_H */
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91
bsps/arm/lpc24xx/include/bsp/lcd.h
Normal file
91
bsps/arm/lpc24xx/include/bsp/lcd.h
Normal file
@@ -0,0 +1,91 @@
|
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/**
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* @file
|
||||
*
|
||||
* @ingroup lpc24xx_lcd
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*
|
||||
* @brief LCD support.
|
||||
*/
|
||||
|
||||
/*
|
||||
* Copyright (c) 2010-2012 embedded brains GmbH. All rights reserved.
|
||||
*
|
||||
* embedded brains GmbH
|
||||
* Obere Lagerstr. 30
|
||||
* 82178 Puchheim
|
||||
* Germany
|
||||
* <rtems@embedded-brains.de>
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rtems.org/license/LICENSE.
|
||||
*/
|
||||
|
||||
#ifndef LIBBSP_ARM_LPC24XX_LCD_H
|
||||
#define LIBBSP_ARM_LPC24XX_LCD_H
|
||||
|
||||
#include <rtems.h>
|
||||
|
||||
#include <bsp/io.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @defgroup lpc_dma LCD Support
|
||||
*
|
||||
* @ingroup lpc24xx
|
||||
*
|
||||
* @brief LCD support.
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
|
||||
typedef enum {
|
||||
#ifdef ARM_MULTILIB_ARCH_V4
|
||||
LCD_MODE_STN_4_BIT = 0,
|
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LCD_MODE_STN_8_BIT,
|
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LCD_MODE_STN_DUAL_PANEL_4_BIT,
|
||||
LCD_MODE_STN_DUAL_PANEL_8_BIT,
|
||||
LCD_MODE_TFT_12_BIT_4_4_4,
|
||||
LCD_MODE_TFT_16_BIT_5_6_5,
|
||||
LCD_MODE_TFT_16_BIT_1_5_5_5,
|
||||
LCD_MODE_TFT_24_BIT,
|
||||
LCD_MODE_DISABLED
|
||||
#else
|
||||
LCD_MODE_STN_4_BIT = 0x4,
|
||||
LCD_MODE_STN_8_BIT = 0x6,
|
||||
LCD_MODE_STN_DUAL_PANEL_4_BIT = 0x84,
|
||||
LCD_MODE_STN_DUAL_PANEL_8_BIT = 0x86,
|
||||
LCD_MODE_TFT_12_BIT_4_4_4 = 0x2e,
|
||||
LCD_MODE_TFT_16_BIT_5_6_5 = 0x2c,
|
||||
LCD_MODE_TFT_16_BIT_1_5_5_5 = 0x28,
|
||||
LCD_MODE_TFT_24_BIT = 0x2a,
|
||||
LCD_MODE_DISABLED = 0xff
|
||||
#endif
|
||||
} lpc24xx_lcd_mode;
|
||||
|
||||
/**
|
||||
* @brief Set the LCD @a mode.
|
||||
*
|
||||
* The pins are configured according to @a pins.
|
||||
*
|
||||
* @see lpc24xx_pin_config().
|
||||
*
|
||||
* @retval RTEMS_SUCCESSFUL Successful operation.
|
||||
* @retval RTEMS_IO_ERROR Invalid mode.
|
||||
*/
|
||||
rtems_status_code lpc24xx_lcd_set_mode(
|
||||
lpc24xx_lcd_mode mode,
|
||||
const lpc24xx_pin_range *pins
|
||||
);
|
||||
|
||||
lpc24xx_lcd_mode lpc24xx_lcd_current_mode(void);
|
||||
|
||||
/** @} */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif /* __cplusplus */
|
||||
|
||||
#endif /* LIBBSP_ARM_LPC24XX_LCD_H */
|
||||
49
bsps/arm/lpc24xx/include/bsp/lpc-clock-config.h
Normal file
49
bsps/arm/lpc24xx/include/bsp/lpc-clock-config.h
Normal file
@@ -0,0 +1,49 @@
|
||||
/**
|
||||
* @file
|
||||
*
|
||||
* @ingroup lpc24xx
|
||||
*
|
||||
* @brief Clock driver configuration.
|
||||
*/
|
||||
|
||||
/*
|
||||
* Copyright (c) 2009
|
||||
* embedded brains GmbH
|
||||
* Obere Lagerstr. 30
|
||||
* D-82178 Puchheim
|
||||
* Germany
|
||||
* <rtems@embedded-brains.de>
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rtems.org/license/LICENSE.
|
||||
*/
|
||||
|
||||
#ifndef LIBBSP_ARM_LPC24XX_LPC_CLOCK_CONFIG_H
|
||||
#define LIBBSP_ARM_LPC24XX_LPC_CLOCK_CONFIG_H
|
||||
|
||||
#include <bsp.h>
|
||||
#include <bsp/irq.h>
|
||||
#include <bsp/lpc24xx.h>
|
||||
#include <bsp/io.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif /* __cplusplus */
|
||||
|
||||
#define LPC_CLOCK_INTERRUPT LPC24XX_IRQ_TIMER_0
|
||||
|
||||
#define LPC_CLOCK_TIMER_BASE TMR0_BASE_ADDR
|
||||
|
||||
#define LPC_CLOCK_TIMECOUNTER_BASE TMR1_BASE_ADDR
|
||||
|
||||
#define LPC_CLOCK_REFERENCE LPC24XX_PCLK
|
||||
|
||||
#define LPC_CLOCK_MODULE_ENABLE() \
|
||||
lpc24xx_module_enable(LPC24XX_MODULE_TIMER_0, LPC24XX_MODULE_PCLK_DEFAULT)
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif /* __cplusplus */
|
||||
|
||||
#endif /* LIBBSP_ARM_LPC24XX_LPC_CLOCK_CONFIG_H */
|
||||
130
bsps/arm/lpc24xx/include/bsp/lpc-ethernet-config.h
Normal file
130
bsps/arm/lpc24xx/include/bsp/lpc-ethernet-config.h
Normal file
@@ -0,0 +1,130 @@
|
||||
/**
|
||||
* @file
|
||||
*
|
||||
* @ingroup lpc24xx
|
||||
*
|
||||
* @brief Ethernet driver configuration.
|
||||
*/
|
||||
|
||||
/*
|
||||
* Copyright (c) 2009-2012 embedded brains GmbH. All rights reserved.
|
||||
*
|
||||
* embedded brains GmbH
|
||||
* Obere Lagerstr. 30
|
||||
* 82178 Puchheim
|
||||
* Germany
|
||||
* <rtems@embedded-brains.de>
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rtems.org/license/LICENSE.
|
||||
*/
|
||||
|
||||
#ifndef LIBBSP_ARM_LPC24XX_LPC_ETHERNET_CONFIG_H
|
||||
#define LIBBSP_ARM_LPC24XX_LPC_ETHERNET_CONFIG_H
|
||||
|
||||
#include <bsp.h>
|
||||
#include <bsp/io.h>
|
||||
#include <bsp/lpc24xx.h>
|
||||
|
||||
#include <limits.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif /* __cplusplus */
|
||||
|
||||
#define LPC_ETH_CONFIG_INTERRUPT LPC24XX_IRQ_ETHERNET
|
||||
|
||||
#define LPC_ETH_CONFIG_REG_BASE MAC_BASE_ADDR
|
||||
|
||||
#ifdef ARM_MULTILIB_ARCH_V4
|
||||
#define LPC_ETH_CONFIG_RX_UNIT_COUNT_DEFAULT 16
|
||||
#define LPC_ETH_CONFIG_RX_UNIT_COUNT_MAX 54
|
||||
|
||||
#define LPC_ETH_CONFIG_TX_UNIT_COUNT_DEFAULT 10
|
||||
#define LPC_ETH_CONFIG_TX_UNIT_COUNT_MAX 10
|
||||
|
||||
#define LPC_ETH_CONFIG_UNIT_MULTIPLE 1U
|
||||
|
||||
#define LPC24XX_ETH_RAM_BEGIN 0x7fe00000U
|
||||
#define LPC24XX_ETH_RAM_SIZE (16U * 1024U)
|
||||
#else
|
||||
#define LPC_ETH_CONFIG_RX_UNIT_COUNT_DEFAULT 16
|
||||
#define LPC_ETH_CONFIG_RX_UNIT_COUNT_MAX INT_MAX
|
||||
|
||||
#define LPC_ETH_CONFIG_TX_UNIT_COUNT_DEFAULT 32
|
||||
#define LPC_ETH_CONFIG_TX_UNIT_COUNT_MAX INT_MAX
|
||||
|
||||
#define LPC_ETH_CONFIG_UNIT_MULTIPLE 8U
|
||||
|
||||
#define LPC_ETH_CONFIG_USE_TRANSMIT_DMA
|
||||
|
||||
#define LPC24XX_ETH_RAM_BEGIN 0x20000000U
|
||||
#define LPC24XX_ETH_RAM_SIZE (32U * 1024U)
|
||||
#endif
|
||||
|
||||
#ifdef LPC24XX_ETHERNET_RMII
|
||||
#define LPC_ETH_CONFIG_RMII
|
||||
|
||||
static void lpc_eth_config_module_enable(void)
|
||||
{
|
||||
static const lpc24xx_pin_range pins [] = {
|
||||
#ifdef LPC24XX_PIN_ETHERNET_POWER_DOWN
|
||||
LPC24XX_PIN_ETHERNET_POWER_DOWN,
|
||||
#endif
|
||||
LPC24XX_PIN_ETHERNET_RMII_0,
|
||||
LPC24XX_PIN_ETHERNET_RMII_1,
|
||||
LPC24XX_PIN_ETHERNET_RMII_2,
|
||||
LPC24XX_PIN_ETHERNET_RMII_3,
|
||||
LPC24XX_PIN_TERMINAL
|
||||
};
|
||||
|
||||
lpc24xx_module_enable(LPC24XX_MODULE_ETHERNET, LPC24XX_MODULE_PCLK_DEFAULT);
|
||||
lpc24xx_pin_config(&pins [0], LPC24XX_PIN_SET_FUNCTION);
|
||||
|
||||
#ifdef LPC24XX_PIN_ETHERNET_POWER_DOWN
|
||||
{
|
||||
unsigned pin = lpc24xx_pin_get_first_index(&pins[0]);
|
||||
|
||||
lpc24xx_gpio_config(pin, LPC24XX_GPIO_OUTPUT);
|
||||
lpc24xx_gpio_set(pin);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
#else
|
||||
static void lpc_eth_config_module_enable(void)
|
||||
{
|
||||
static const lpc24xx_pin_range pins [] = {
|
||||
LPC24XX_PIN_ETHERNET_MII,
|
||||
LPC24XX_PIN_TERMINAL
|
||||
};
|
||||
|
||||
lpc24xx_module_enable(LPC24XX_MODULE_ETHERNET, LPC24XX_MODULE_PCLK_DEFAULT);
|
||||
lpc24xx_pin_config(&pins [0], LPC24XX_PIN_SET_FUNCTION);
|
||||
}
|
||||
#endif
|
||||
|
||||
static void lpc_eth_config_module_disable(void)
|
||||
{
|
||||
lpc24xx_module_disable(LPC24XX_MODULE_ETHERNET);
|
||||
}
|
||||
|
||||
static char *lpc_eth_config_alloc_table_area(size_t size)
|
||||
{
|
||||
if (size < LPC24XX_ETH_RAM_SIZE) {
|
||||
return (char *) LPC24XX_ETH_RAM_BEGIN;
|
||||
} else {
|
||||
return NULL;
|
||||
}
|
||||
}
|
||||
|
||||
static void lpc_eth_config_free_table_area(char *table_area)
|
||||
{
|
||||
/* Do nothing */
|
||||
}
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif /* __cplusplus */
|
||||
|
||||
#endif /* LIBBSP_ARM_LPC24XX_LPC_ETHERNET_CONFIG_H */
|
||||
207
bsps/arm/lpc24xx/include/bsp/lpc17xx.h
Normal file
207
bsps/arm/lpc24xx/include/bsp/lpc17xx.h
Normal file
@@ -0,0 +1,207 @@
|
||||
/**
|
||||
* @file
|
||||
*
|
||||
* @ingroup lpc24xx_regs
|
||||
*
|
||||
* @brief Register definitions.
|
||||
*/
|
||||
|
||||
/*
|
||||
* Copyright (c) 2011 embedded brains GmbH. All rights reserved.
|
||||
*
|
||||
* embedded brains GmbH
|
||||
* Obere Lagerstr. 30
|
||||
* 82178 Puchheim
|
||||
* Germany
|
||||
* <rtems@embedded-brains.de>
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rtems.org/license/LICENSE.
|
||||
*/
|
||||
|
||||
#ifndef LPC17XX_REGS_H
|
||||
#define LPC17XX_REGS_H
|
||||
|
||||
#include <bsp/utility.h>
|
||||
|
||||
#define LPC17XX_BASE 0x00
|
||||
|
||||
typedef struct {
|
||||
#define LPC17XX_WWDT_MOD_WDEN BSP_BIT32(0)
|
||||
#define LPC17XX_WWDT_MOD_WDRESET BSP_BIT32(1)
|
||||
#define LPC17XX_WWDT_MOD_WDTOF BSP_BIT32(2)
|
||||
#define LPC17XX_WWDT_MOD_WDINT BSP_BIT32(3)
|
||||
#define LPC17XX_WWDT_MOD_WDPROTECT BSP_BIT32(4)
|
||||
uint32_t mod;
|
||||
uint32_t tc;
|
||||
uint32_t feed;
|
||||
uint32_t tv;
|
||||
uint32_t reserved_10;
|
||||
uint32_t warnint;
|
||||
uint32_t window;
|
||||
uint32_t reserved_1c;
|
||||
} lpc17xx_wwdt;
|
||||
|
||||
#define LPC17XX_WWDT (*(volatile lpc17xx_wwdt *) (LPC17XX_BASE + 0x40000000))
|
||||
|
||||
typedef struct {
|
||||
#define LPC17XX_PLL_CON_PLLE BSP_BIT32(0)
|
||||
#define LPC17XX_PLL_SEL_MSEL(val) BSP_FLD32(val, 0, 4)
|
||||
#define LPC17XX_PLL_SEL_MSEL_GET(reg) BSP_FLD32GET(reg, 0, 4)
|
||||
#define LPC17XX_PLL_SEL_MSEL_SET(reg, val) BSP_FLD32SET(reg, val, 0, 4)
|
||||
#define LPC17XX_PLL_SEL_PSEL(val) BSP_FLD32(val, 5, 6)
|
||||
#define LPC17XX_PLL_SEL_PSEL_GET(reg) BSP_FLD32GET(reg, 5, 6)
|
||||
#define LPC17XX_PLL_SEL_PSEL_SET(reg, val) BSP_FLD32SET(reg, val, 5, 6)
|
||||
#define LPC17XX_PLL_STAT_PLLE BSP_BIT32(8)
|
||||
#define LPC17XX_PLL_STAT_PLOCK BSP_BIT32(10)
|
||||
uint32_t con;
|
||||
uint32_t cfg;
|
||||
uint32_t stat;
|
||||
uint32_t feed;
|
||||
} lpc17xx_pll;
|
||||
|
||||
typedef struct {
|
||||
uint32_t flashcfg;
|
||||
#define LPC17XX_SCB_FLASHCFG_FLASHTIM(val) BSP_FLD32(val, 12, 15)
|
||||
#define LPC17XX_SCB_FLASHCFG_FLASHTIM_GET(reg) BSP_FLD32GET(reg, 12, 15)
|
||||
#define LPC17XX_SCB_FLASHCFG_FLASHTIM_SET(reg, val) BSP_FLD32SET(reg, val, 12, 15)
|
||||
uint32_t reserved_04 [15];
|
||||
uint32_t memmap;
|
||||
#define LPC17XX_SCB_MEMMAP_MAP BSP_BIT32(0)
|
||||
uint32_t reserved_44 [15];
|
||||
lpc17xx_pll pll_0;
|
||||
uint32_t reserved_90 [4];
|
||||
lpc17xx_pll pll_1;
|
||||
uint32_t reserved_b0 [4];
|
||||
uint32_t pcon;
|
||||
#define LPC17XX_SCB_PCON_PM0 BSP_BIT32(0)
|
||||
#define LPC17XX_SCB_PCON_PM1 BSP_BIT32(1)
|
||||
#define LPC17XX_SCB_PCON_BODRPM BSP_BIT32(2)
|
||||
#define LPC17XX_SCB_PCON_BOGD BSP_BIT32(3)
|
||||
#define LPC17XX_SCB_PCON_BORD BSP_BIT32(4)
|
||||
#define LPC17XX_SCB_PCON_SMFLAG BSP_BIT32(8)
|
||||
#define LPC17XX_SCB_PCON_DSFLAG BSP_BIT32(9)
|
||||
#define LPC17XX_SCB_PCON_PDFLAG BSP_BIT32(10)
|
||||
#define LPC17XX_SCB_PCON_DPDFLAG BSP_BIT32(11)
|
||||
uint32_t pconp;
|
||||
#define LPC17XX_SCB_PCONP_LCD BSP_BIT32(0)
|
||||
#define LPC17XX_SCB_PCONP_TIMER_0 BSP_BIT32(1)
|
||||
#define LPC17XX_SCB_PCONP_TIMER_1 BSP_BIT32(2)
|
||||
#define LPC17XX_SCB_PCONP_UART_0 BSP_BIT32(3)
|
||||
#define LPC17XX_SCB_PCONP_UART_1 BSP_BIT32(4)
|
||||
#define LPC17XX_SCB_PCONP_PWM_0 BSP_BIT32(5)
|
||||
#define LPC17XX_SCB_PCONP_PWM_1 BSP_BIT32(6)
|
||||
#define LPC17XX_SCB_PCONP_I2C_0 BSP_BIT32(7)
|
||||
#define LPC17XX_SCB_PCONP_UART_4 BSP_BIT32(8)
|
||||
#define LPC17XX_SCB_PCONP_RTC BSP_BIT32(9)
|
||||
#define LPC17XX_SCB_PCONP_SSP_1 BSP_BIT32(10)
|
||||
#define LPC17XX_SCB_PCONP_EMC BSP_BIT32(11)
|
||||
#define LPC17XX_SCB_PCONP_ADC BSP_BIT32(12)
|
||||
#define LPC17XX_SCB_PCONP_CAN_0 BSP_BIT32(13)
|
||||
#define LPC17XX_SCB_PCONP_CAN_1 BSP_BIT32(14)
|
||||
#define LPC17XX_SCB_PCONP_GPIO BSP_BIT32(15)
|
||||
#define LPC17XX_SCB_PCONP_QEI BSP_BIT32(17)
|
||||
#define LPC17XX_SCB_PCONP_I2C_1 BSP_BIT32(18)
|
||||
#define LPC17XX_SCB_PCONP_SSP_2 BSP_BIT32(19)
|
||||
#define LPC17XX_SCB_PCONP_SSP_0 BSP_BIT32(20)
|
||||
#define LPC17XX_SCB_PCONP_TIMER_2 BSP_BIT32(21)
|
||||
#define LPC17XX_SCB_PCONP_TIMER_3 BSP_BIT32(22)
|
||||
#define LPC17XX_SCB_PCONP_UART_2 BSP_BIT32(23)
|
||||
#define LPC17XX_SCB_PCONP_UART_3 BSP_BIT32(24)
|
||||
#define LPC17XX_SCB_PCONP_I2C_2 BSP_BIT32(25)
|
||||
#define LPC17XX_SCB_PCONP_I2S BSP_BIT32(26)
|
||||
#define LPC17XX_SCB_PCONP_SDC BSP_BIT32(27)
|
||||
#define LPC17XX_SCB_PCONP_GPDMA BSP_BIT32(28)
|
||||
#define LPC17XX_SCB_PCONP_ENET BSP_BIT32(29)
|
||||
#define LPC17XX_SCB_PCONP_USB BSP_BIT32(30)
|
||||
#define LPC17XX_SCB_PCONP_MCPWM BSP_BIT32(31)
|
||||
uint32_t reserved_c8 [14];
|
||||
uint32_t emcclksel;
|
||||
#define LPC17XX_SCB_EMCCLKSEL_EMCDIV BSP_BIT32(0)
|
||||
uint32_t cclksel;
|
||||
#define LPC17XX_SCB_CCLKSEL_CCLKDIV(val) BSP_FLD32(val, 0, 4)
|
||||
#define LPC17XX_SCB_CCLKSEL_CCLKDIV_GET(reg) BSP_FLD32GET(reg, 0, 4)
|
||||
#define LPC17XX_SCB_CCLKSEL_CCLKDIV_SET(reg, val) BSP_FLD32SET(reg, val, 0, 4)
|
||||
#define LPC17XX_SCB_CCLKSEL_CCLKSEL BSP_BIT32(8)
|
||||
uint32_t usbclksel;
|
||||
#define LPC17XX_SCB_USBCLKSEL_USBDIV(val) BSP_FLD32(val, 0, 4)
|
||||
#define LPC17XX_SCB_USBCLKSEL_USBDIV_GET(reg) BSP_FLD32GET(reg, 0, 4)
|
||||
#define LPC17XX_SCB_USBCLKSEL_USBDIV_SET(reg, val) BSP_FLD32SET(reg, val, 0, 4)
|
||||
#define LPC17XX_SCB_USBCLKSEL_USBSEL(val) BSP_FLD32(val, 8, 9)
|
||||
#define LPC17XX_SCB_USBCLKSEL_USBSEL_GET(reg) BSP_FLD32GET(reg, 8, 9)
|
||||
#define LPC17XX_SCB_USBCLKSEL_USBSEL_SET(reg, val) BSP_FLD32SET(reg, val, 8, 9)
|
||||
uint32_t clksrcsel;
|
||||
#define LPC17XX_SCB_CLKSRCSEL_CLKSRC BSP_BIT32(0)
|
||||
uint32_t reserved_110 [12];
|
||||
uint32_t extint;
|
||||
uint32_t reserved_144;
|
||||
uint32_t extmode;
|
||||
uint32_t extpolar;
|
||||
uint32_t reserved_150 [12];
|
||||
uint32_t rsid;
|
||||
uint32_t reserved_184 [1];
|
||||
uint32_t matrixarb;
|
||||
uint32_t reserved_18c [5];
|
||||
uint32_t scs;
|
||||
#define LPC17XX_SCB_SCS_EMC_SHIFT_CTL BSP_BIT32(0)
|
||||
#define LPC17XX_SCB_SCS_EMC_RESET_DIS BSP_BIT32(1)
|
||||
#define LPC17XX_SCB_SCS_EMC_BURST_CTL BSP_BIT32(2)
|
||||
#define LPC17XX_SCB_SCS_MCIPWR BSP_BIT32(3)
|
||||
#define LPC17XX_SCB_SCS_OSC_RANGE_SEL BSP_BIT32(4)
|
||||
#define LPC17XX_SCB_SCS_OSC_ENABLE BSP_BIT32(5)
|
||||
#define LPC17XX_SCB_SCS_OSC_STATUS BSP_BIT32(6)
|
||||
uint32_t reserved_1a4;
|
||||
uint32_t pclksel;
|
||||
#define LPC17XX_SCB_PCLKSEL_PCLKDIV(val) BSP_FLD32(val, 0, 4)
|
||||
#define LPC17XX_SCB_PCLKSEL_PCLKDIV_GET(reg) BSP_FLD32GET(reg, 0, 4)
|
||||
#define LPC17XX_SCB_PCLKSEL_PCLKDIV_SET(reg, val) BSP_FLD32SET(reg, val, 0, 4)
|
||||
uint32_t reserved_1ac;
|
||||
uint32_t pboost;
|
||||
#define LPC17XX_SCB_PBOOST_BOOST BSP_BIT32(0)
|
||||
uint32_t reserved_1b4 [5];
|
||||
uint32_t clkoutcfg;
|
||||
#define LPC17XX_SCB_CLKOUTCFG_CLKOUTSEL(val) BSP_FLD32(val, 3, 0)
|
||||
#define LPC17XX_SCB_CLKOUTCFG_CLKOUTSEL_GET(reg) BSP_FLD32GET(reg, 3, 0)
|
||||
#define LPC17XX_SCB_CLKOUTCFG_CLKOUTSEL_SET(reg, val) BSP_FLD32SET(reg, val, 3, 0)
|
||||
#define LPC17XX_SCB_CLKOUTCFG_CLKOUTDIV(val) BSP_FLD32(val, 7, 4)
|
||||
#define LPC17XX_SCB_CLKOUTCFG_CLKOUTDIV_GET(reg) BSP_FLD32GET(reg, 7, 4)
|
||||
#define LPC17XX_SCB_CLKOUTCFG_CLKOUTDIV_SET(reg, val) BSP_FLD32SET(reg, val, 7, 4)
|
||||
#define LPC17XX_SCB_CLKOUTCFG_CLKOUT_EN BSP_BIT32(8)
|
||||
#define LPC17XX_SCB_CLKOUTCFG_CLKOUT_ACT BSP_BIT32(9)
|
||||
uint32_t rstcon0;
|
||||
uint32_t rstcon1;
|
||||
uint32_t reserved_1d4 [2];
|
||||
uint32_t emcdlyctl;
|
||||
#define LPC17XX_SCB_EMCDLYCTL_CMDDLY(val) BSP_FLD32(val, 0, 4)
|
||||
#define LPC17XX_SCB_EMCDLYCTL_CMDDLY_GET(reg) BSP_FLD32GET(reg, 0, 4)
|
||||
#define LPC17XX_SCB_EMCDLYCTL_CMDDLY_SET(reg, val) BSP_FLD32SET(reg, val, 0, 4)
|
||||
#define LPC17XX_SCB_EMCDLYCTL_FBCLKDLY(val) BSP_FLD32(val, 8, 12)
|
||||
#define LPC17XX_SCB_EMCDLYCTL_FBCLKDLY_GET(reg) BSP_FLD32GET(reg, 8, 12)
|
||||
#define LPC17XX_SCB_EMCDLYCTL_FBCLKDLY_SET(reg, val) BSP_FLD32SET(reg, val, 8, 12)
|
||||
#define LPC17XX_SCB_EMCDLYCTL_CLKOUT0DLY(val) BSP_FLD32(val, 16, 20)
|
||||
#define LPC17XX_SCB_EMCDLYCTL_CLKOUT0DLY_GET(reg) BSP_FLD32GET(reg, 16, 20)
|
||||
#define LPC17XX_SCB_EMCDLYCTL_CLKOUT0DLY_SET(reg, val) BSP_FLD32SET(reg, val, 16, 20)
|
||||
#define LPC17XX_SCB_EMCDLYCTL_CLKOUT1DLY(val) BSP_FLD32(val, 24, 28)
|
||||
#define LPC17XX_SCB_EMCDLYCTL_CLKOUT1DLY_GET(reg) BSP_FLD32GET(reg, 24, 28)
|
||||
#define LPC17XX_SCB_EMCDLYCTL_CLKOUT1DLY_SET(reg, val) BSP_FLD32SET(reg, val, 24, 28)
|
||||
uint32_t emccal;
|
||||
#define LPC17XX_SCB_EMCCAL_CALVALUE(val) BSP_FLD32(val, 0, 7)
|
||||
#define LPC17XX_SCB_EMCCAL_CALVALUE_GET(reg) BSP_FLD32GET(reg, 0, 7)
|
||||
#define LPC17XX_SCB_EMCCAL_CALVALUE_SET(reg, val) BSP_FLD32SET(reg, val, 0, 7)
|
||||
#define LPC17XX_SCB_EMCCAL_START BSP_BIT32(14)
|
||||
#define LPC17XX_SCB_EMCCAL_DONE BSP_BIT32(15)
|
||||
} lpc17xx_scb;
|
||||
|
||||
#define LPC17XX_SCB (*(volatile lpc17xx_scb *) (LPC17XX_BASE + 0x400fc000))
|
||||
|
||||
typedef struct {
|
||||
uint32_t reserved_00 [268435456];
|
||||
lpc17xx_wwdt wwdt;
|
||||
uint32_t reserved_40000020 [258040];
|
||||
lpc17xx_scb scb;
|
||||
} lpc17xx;
|
||||
|
||||
#define LPC17XX (*(volatile lpc17xx *) (LPC17XX_BASE))
|
||||
|
||||
#endif /* LPC17XX_REGS_H */
|
||||
2206
bsps/arm/lpc24xx/include/bsp/lpc24xx.h
Normal file
2206
bsps/arm/lpc24xx/include/bsp/lpc24xx.h
Normal file
File diff suppressed because it is too large
Load Diff
47
bsps/arm/lpc24xx/include/bsp/ssp.h
Normal file
47
bsps/arm/lpc24xx/include/bsp/ssp.h
Normal file
@@ -0,0 +1,47 @@
|
||||
/**
|
||||
* @file
|
||||
*
|
||||
* @ingroup lpc24xx_libi2c
|
||||
*
|
||||
* @brief LibI2C bus driver for the Synchronous Serial Port (SSP).
|
||||
*/
|
||||
|
||||
/*
|
||||
* Copyright (c) 2008
|
||||
* Embedded Brains GmbH
|
||||
* Obere Lagerstr. 30
|
||||
* D-82178 Puchheim
|
||||
* Germany
|
||||
* rtems@embedded-brains.de
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rtems.org/license/LICENSE.
|
||||
*/
|
||||
|
||||
#ifndef LIBBSP_ARM_LPC24XX_SSP_H
|
||||
#define LIBBSP_ARM_LPC24XX_SSP_H
|
||||
|
||||
#include <rtems/libi2c.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif /* __cplusplus */
|
||||
|
||||
/**
|
||||
* @ingroup lpc24xx_libi2c
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
|
||||
extern rtems_libi2c_bus_t * const lpc24xx_ssp_0;
|
||||
|
||||
extern rtems_libi2c_bus_t * const lpc24xx_ssp_1;
|
||||
|
||||
/** @} */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif /* __cplusplus */
|
||||
|
||||
#endif /* LIBBSP_ARM_LPC24XX_SSP_H */
|
||||
121
bsps/arm/lpc24xx/include/bsp/start-config.h
Normal file
121
bsps/arm/lpc24xx/include/bsp/start-config.h
Normal file
@@ -0,0 +1,121 @@
|
||||
/**
|
||||
* @file
|
||||
*
|
||||
* @ingroup lpc24xx
|
||||
*
|
||||
* @brief BSP start configuration.
|
||||
*/
|
||||
|
||||
/*
|
||||
* Copyright (c) 2011-2012 embedded brains GmbH. All rights reserved.
|
||||
*
|
||||
* embedded brains GmbH
|
||||
* Obere Lagerstr. 30
|
||||
* 82178 Puchheim
|
||||
* Germany
|
||||
* <rtems@embedded-brains.de>
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rtems.org/license/LICENSE.
|
||||
*/
|
||||
|
||||
#ifndef LIBBSP_ARM_LPC24XX_START_CONFIG_H
|
||||
#define LIBBSP_ARM_LPC24XX_START_CONFIG_H
|
||||
|
||||
#include <rtems/score/armv7m.h>
|
||||
|
||||
#include <bsp.h>
|
||||
#include <bsp/io.h>
|
||||
#include <bsp/start.h>
|
||||
#include <bsp/lpc-emc.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif /* __cplusplus */
|
||||
|
||||
/**
|
||||
* @brief Pico seconds @a ps to clock ticks for clock frequency @a f.
|
||||
*/
|
||||
#define LPC24XX_PS_TO_CLK(ps, f) \
|
||||
(((((uint64_t) (ps)) * ((uint64_t) (f))) + 1000000000000ULL - 1ULL) \
|
||||
/ 1000000000000ULL)
|
||||
|
||||
/**
|
||||
* @brief Pico seconds @a ps to EMCCLK clock ticks adjusted by @a m.
|
||||
*/
|
||||
#define LPC24XX_PS_TO_EMCCLK(ps, m) \
|
||||
(LPC24XX_PS_TO_CLK(ps, LPC24XX_EMCCLK) > (m) ? \
|
||||
LPC24XX_PS_TO_CLK(ps, LPC24XX_EMCCLK) - (m) : 0)
|
||||
|
||||
typedef struct {
|
||||
uint32_t refresh;
|
||||
uint32_t readconfig;
|
||||
uint32_t trp;
|
||||
uint32_t tras;
|
||||
uint32_t tsrex;
|
||||
uint32_t tapr;
|
||||
uint32_t tdal;
|
||||
uint32_t twr;
|
||||
uint32_t trc;
|
||||
uint32_t trfc;
|
||||
uint32_t txsr;
|
||||
uint32_t trrd;
|
||||
uint32_t tmrd;
|
||||
uint32_t emcdlyctl;
|
||||
} lpc24xx_emc_dynamic_config;
|
||||
|
||||
typedef struct {
|
||||
volatile lpc_emc_dynamic *chip_select;
|
||||
uint32_t address;
|
||||
uint32_t config;
|
||||
uint32_t rascas;
|
||||
uint32_t mode;
|
||||
} lpc24xx_emc_dynamic_chip_config;
|
||||
|
||||
typedef struct {
|
||||
volatile lpc_emc_static *chip_select;
|
||||
struct {
|
||||
uint32_t config;
|
||||
uint32_t waitwen;
|
||||
uint32_t waitoen;
|
||||
uint32_t waitrd;
|
||||
uint32_t waitpage;
|
||||
uint32_t waitwr;
|
||||
uint32_t waitrun;
|
||||
} config;
|
||||
} lpc24xx_emc_static_chip_config;
|
||||
|
||||
extern BSP_START_DATA_SECTION const lpc24xx_pin_range
|
||||
lpc24xx_start_config_pinsel [];
|
||||
|
||||
extern BSP_START_DATA_SECTION const lpc24xx_emc_dynamic_config
|
||||
lpc24xx_start_config_emc_dynamic [];
|
||||
|
||||
extern BSP_START_DATA_SECTION const lpc24xx_emc_dynamic_chip_config
|
||||
lpc24xx_start_config_emc_dynamic_chip [];
|
||||
|
||||
extern BSP_START_DATA_SECTION const size_t
|
||||
lpc24xx_start_config_emc_dynamic_chip_count;
|
||||
|
||||
extern BSP_START_DATA_SECTION const lpc24xx_emc_static_chip_config
|
||||
lpc24xx_start_config_emc_static_chip [];
|
||||
|
||||
extern BSP_START_DATA_SECTION const size_t
|
||||
lpc24xx_start_config_emc_static_chip_count;
|
||||
|
||||
#ifdef ARM_MULTILIB_ARCH_V7M
|
||||
|
||||
extern BSP_START_DATA_SECTION const ARMV7M_MPU_Region
|
||||
lpc24xx_start_config_mpu_region [];
|
||||
|
||||
extern BSP_START_DATA_SECTION const size_t
|
||||
lpc24xx_start_config_mpu_region_count;
|
||||
|
||||
#endif /* ARM_MULTILIB_ARCH_V7M */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif /* __cplusplus */
|
||||
|
||||
#endif /* LIBBSP_ARM_LPC24XX_START_CONFIG_H */
|
||||
89
bsps/arm/lpc24xx/include/bsp/system-clocks.h
Normal file
89
bsps/arm/lpc24xx/include/bsp/system-clocks.h
Normal file
@@ -0,0 +1,89 @@
|
||||
/**
|
||||
* @file
|
||||
*
|
||||
* @ingroup lpc24xx_clocks
|
||||
*
|
||||
* @brief System clocks.
|
||||
*/
|
||||
|
||||
/*
|
||||
* Copyright (c) 2008, 2009
|
||||
* embedded brains GmbH
|
||||
* Obere Lagerstr. 30
|
||||
* D-82178 Puchheim
|
||||
* Germany
|
||||
* <rtems@embedded-brains.de>
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rtems.org/license/LICENSE.
|
||||
*/
|
||||
|
||||
#ifndef LIBBSP_ARM_LPC24XX_SYSTEM_CLOCKS_H
|
||||
#define LIBBSP_ARM_LPC24XX_SYSTEM_CLOCKS_H
|
||||
|
||||
#include <bsp/lpc24xx.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif /* __cplusplus */
|
||||
|
||||
/**
|
||||
* @defgroup lpc24xx_clock System Clocks
|
||||
*
|
||||
* @ingroup lpc24xx
|
||||
*
|
||||
* @brief System clocks.
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Initializes the standard timer.
|
||||
*
|
||||
* This function uses Timer 1.
|
||||
*/
|
||||
void lpc24xx_timer_initialize(void);
|
||||
|
||||
/**
|
||||
* @brief Returns current standard timer value in CPU clocks.
|
||||
*
|
||||
* This function uses Timer 1.
|
||||
*/
|
||||
static inline unsigned lpc24xx_timer(void)
|
||||
{
|
||||
return T1TC;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Delay for @a us micro seconds.
|
||||
*
|
||||
* This function uses the standard timer and assumes that the CPU frequency is
|
||||
* in whole MHz numbers. The delay value @a us will be converted to CPU ticks
|
||||
* and there is no protection against integer overflows.
|
||||
*
|
||||
* This function uses Timer 1.
|
||||
*/
|
||||
void lpc24xx_micro_seconds_delay(unsigned us);
|
||||
|
||||
/**
|
||||
* @brief Returns the PLL output clock frequency in [Hz].
|
||||
*
|
||||
* Returns zero in case of an unexpected PLL input frequency.
|
||||
*/
|
||||
unsigned lpc24xx_pllclk(void);
|
||||
|
||||
/**
|
||||
* @brief Returns the CPU clock frequency in [Hz].
|
||||
*
|
||||
* Returns zero in case of an unexpected PLL input frequency.
|
||||
*/
|
||||
unsigned lpc24xx_cclk(void);
|
||||
|
||||
/** @} */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif /* __cplusplus */
|
||||
|
||||
#endif /* LIBBSP_ARM_LPC24XX_SYSTEM_CLOCKS_H */
|
||||
Reference in New Issue
Block a user