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changes to support GW_LCFM

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This commit is contained in:
Thomas Doerfler
2010-04-07 06:45:59 +00:00
parent 08013e8612
commit 2931336963
15 changed files with 271 additions and 61 deletions
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4
c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_address.c
View File

@@ -66,6 +66,10 @@ void *ppc_exc_vector_address(unsigned vector)
}
if (ppc_cpu_has_ivpr_and_ivor()) {
/*
* XXX: this directly matches the vector offsets in a e200z1,
* which has hardwired IVORs (IVOR0=0,IVOR1=0x10,IVOR2=0x20...)
*/
vector_offset >>= 4;
}

2
c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_categories.c
View File

@@ -275,6 +275,8 @@ const ppc_exc_categories *ppc_exc_categories_for_cpu(ppc_cpu_id_t cpu)
return &psim_category_table;
case PPC_8540:
return &e500_category_table;
case PPC_e200z0:
case PPC_e200z1:
case PPC_e200z6:
return &e200_category_table;
case PPC_5XX:

45
c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_initialize.c
View File

@@ -66,26 +66,28 @@ static void ppc_exc_initialize_e200(void)
/* Interupt vector prefix register */
MTIVPR(ppc_exc_vector_base);
/* Interupt vector offset register */
MTIVOR(0, 0); /* Critical input */
MTIVOR(1, ppc_exc_vector_address( ASM_MACH_VECTOR));
MTIVOR(2, ppc_exc_vector_address( ASM_PROT_VECTOR));
MTIVOR(3, ppc_exc_vector_address( ASM_ISI_VECTOR));
MTIVOR(4, ppc_exc_vector_address( ASM_EXT_VECTOR));
MTIVOR(5, ppc_exc_vector_address( ASM_ALIGN_VECTOR));
MTIVOR(6, ppc_exc_vector_address( ASM_PROG_VECTOR));
MTIVOR(7, ppc_exc_vector_address( ASM_FLOAT_VECTOR));
MTIVOR(8, ppc_exc_vector_address( ASM_SYS_VECTOR));
MTIVOR(9, 0); /* APU unavailable */
MTIVOR(10, ppc_exc_vector_address( ASM_BOOKE_DEC_VECTOR));
MTIVOR(11, ppc_exc_vector_address( ASM_BOOKE_FIT_VECTOR));
MTIVOR(12, ppc_exc_vector_address( ASM_BOOKE_WDOG_VECTOR));
MTIVOR(13, ppc_exc_vector_address( ASM_BOOKE_ITLBMISS_VECTOR));
MTIVOR(14, ppc_exc_vector_address( ASM_BOOKE_DTLBMISS_VECTOR));
MTIVOR(15, ppc_exc_vector_address( ASM_TRACE_VECTOR));
MTIVOR(32, ppc_exc_vector_address( ASM_E200_SPE_UNAVAILABLE_VECTOR));
MTIVOR(33, ppc_exc_vector_address( ASM_E200_SPE_DATA_VECTOR));
MTIVOR(34, ppc_exc_vector_address( ASM_E200_SPE_ROUND_VECTOR));
if (ppc_cpu_has_ivor()) {
/* Interupt vector offset register */
MTIVOR(0, 0); /* Critical input */
MTIVOR(1, ppc_exc_vector_address( ASM_MACH_VECTOR));
MTIVOR(2, ppc_exc_vector_address( ASM_PROT_VECTOR));
MTIVOR(3, ppc_exc_vector_address( ASM_ISI_VECTOR));
MTIVOR(4, ppc_exc_vector_address( ASM_EXT_VECTOR));
MTIVOR(5, ppc_exc_vector_address( ASM_ALIGN_VECTOR));
MTIVOR(6, ppc_exc_vector_address( ASM_PROG_VECTOR));
MTIVOR(7, ppc_exc_vector_address( ASM_FLOAT_VECTOR));
MTIVOR(8, ppc_exc_vector_address( ASM_SYS_VECTOR));
MTIVOR(9, 0); /* APU unavailable */
MTIVOR(10, ppc_exc_vector_address( ASM_BOOKE_DEC_VECTOR));
MTIVOR(11, ppc_exc_vector_address( ASM_BOOKE_FIT_VECTOR));
MTIVOR(12, ppc_exc_vector_address( ASM_BOOKE_WDOG_VECTOR));
MTIVOR(13, ppc_exc_vector_address( ASM_BOOKE_ITLBMISS_VECTOR));
MTIVOR(14, ppc_exc_vector_address( ASM_BOOKE_DTLBMISS_VECTOR));
MTIVOR(15, ppc_exc_vector_address( ASM_TRACE_VECTOR));
MTIVOR(32, ppc_exc_vector_address( ASM_E200_SPE_UNAVAILABLE_VECTOR));
MTIVOR(33, ppc_exc_vector_address( ASM_E200_SPE_DATA_VECTOR));
MTIVOR(34, ppc_exc_vector_address( ASM_E200_SPE_ROUND_VECTOR));
}
}
rtems_status_code ppc_exc_initialize(
@@ -140,7 +142,8 @@ rtems_status_code ppc_exc_initialize(
ppc_exc_msr_bits |= MSR_VE;
#endif
if (ppc_cpu_is(PPC_e200z6)) {
if (ppc_cpu_is(PPC_e200z1) ||
ppc_cpu_is(PPC_e200z6)) {
ppc_exc_initialize_e200();
} else if (ppc_cpu_is_bookE() == PPC_BOOKE_STD || ppc_cpu_is_bookE() == PPC_BOOKE_E500) {
ppc_exc_initialize_e500();