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Added altivec exception. Unfortunately, this doesn't fit

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the normal scheme of vector = exception # << 8. So we picked
	an unused vector number (currently 0xa) where we map the special
	vector 0xf20 (altivec).
This commit is contained in:
Till Straumann
2006-06-19 20:24:08 +00:00
parent df9cadc2ed
commit 261a1b27d1
3 changed files with 79 additions and 37 deletions
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8
c/src/lib/libcpu/powerpc/ChangeLog
View File

@@ -1,3 +1,11 @@
2006-06-19 Till Straumann <strauman@slac.stanford.edu>
* mpc6xx/exceptions/raw_exception.c, mpc6xx/exceptions/raw_exception.h:
Added altivec exception. Unfortunately, this doesn't fit
the normal scheme of vector = exception # << 8. So we picked
an unused vector number (currently 0xa) where we map the special
vector 0xf20 (altivec).
2006-06-19 Till Straumann <strauman@slac.stanford.edu>
* new-exceptions/cpu.c, new-exceptions/cpu_asm.S: Never

33
c/src/lib/libcpu/powerpc/mpc6xx/exceptions/raw_exception.c
View File

@@ -36,12 +36,29 @@ void * codemove(void *, const void *, unsigned int, unsigned long);
void* mpc60x_get_vector_addr(rtems_vector vector)
{
unsigned vaddr = ((unsigned)vector) << 8;
extern rtems_cpu_table Cpu_table;
if ( Cpu_table.exceptions_in_RAM )
return ((void*) (((unsigned) vector) << 8));
/* Special case; altivec unavailable doesn't fit :-( */
if ( ASM_VEC_VECTOR == vector )
vaddr = ASM_VEC_VECTOR_OFFSET;
return ((void*) (((unsigned) vector) << 8) + 0xfff00000);
if ( Cpu_table.exceptions_in_RAM )
return ((void*) vaddr);
return ((void*) (vaddr + 0xfff00000));
}
int altivec_vector_is_valid(rtems_vector vector)
{
switch(vector) {
case ASM_VEC_VECTOR:
case ASM_VEC_ASSIST_VECTOR:
return 1;
default:
break;
}
return 0;
}
int mpc750_vector_is_valid(rtems_vector vector)
@@ -160,16 +177,22 @@ int mpc60x_vector_is_valid(rtems_vector vector)
{
switch (current_ppc_cpu) {
case PPC_7400:
if ( altivec_vector_is_valid(vector) )
return 1;
/* else fall thru */
case PPC_750:
if (!mpc750_vector_is_valid(vector)) {
return 0;
}
break;
case PPC_7455: /* Kate Feng */
case PPC_7457:
if ( altivec_vector_is_valid(vector) )
return 1;
/* else fall thru */
case PPC_604:
case PPC_604e:
case PPC_604r:
case PPC_7455: /* Kate Feng */
case PPC_7457:
if (!mpc604_vector_is_valid(vector)) {
return 0;
}

11
c/src/lib/libcpu/powerpc/mpc6xx/exceptions/raw_exception.h
View File

@@ -39,6 +39,13 @@
#define ASM_PROG_VECTOR 0x07
#define ASM_FLOAT_VECTOR 0x08
#define ASM_DEC_VECTOR 0x09
/* Bummer: Altivec unavailable doesn't fit into this scheme... (0xf20).
* We'd like to avoid reserved vectors but OTOH we don't want to use
* just an available high number because tables (and copies) are of
* size LAST_VALID_EXC.
* So until there is a CPU that uses 0xA we'll just use that :-(
*/
#define ASM_VEC_VECTOR 0x0A
#define ASM_SYS_VECTOR 0x0C
#define ASM_TRACE_VECTOR 0x0D
#define ASM_PERFMON_VECTOR 0x0F
@@ -47,6 +54,7 @@
#define ASM_DSMISS_VECTOR 0x12
#define ASM_ADDR_VECTOR 0x13
#define ASM_SYSMGMT_VECTOR 0x14
#define ASM_VEC_ASSIST_VECTOR 0x16
#define ASM_ITM_VECTOR 0x17
#define LAST_VALID_EXC ASM_ITM_VECTOR
@@ -65,8 +73,11 @@
#define ASM_DEC_VECTOR_OFFSET (ASM_DEC_VECTOR << 8)
#define ASM_SYS_VECTOR_OFFSET (ASM_SYS_VECTOR << 8)
#define ASM_TRACE_VECTOR_OFFSET (ASM_TRACE_VECTOR << 8)
#define ASM_PERFMON_VECTOR_OFFSET (ASM_PERFMON_VECTOR << 8)
#define ASM_VEC_VECTOR_OFFSET (0xf20)
#define ASM_ADDR_VECTOR_OFFSET (ASM_ADDR_VECTOR << 8)
#define ASM_SYSMGMT_VECTOR_OFFSET (ASM_SYSMGMT_VECTOR << 8)
#define ASM_VEC_ASSIST_VECTOR_OFFSET (ASM_VEC_ASSIST_VECTOR << 8)
#define ASM_ITM_VECTOR_OFFSET (ASM_ITM_VECTOR << 8)