forked from Imagelibrary/rtems
Added altivec exception. Unfortunately, this doesn't fit
the normal scheme of vector = exception # << 8. So we picked an unused vector number (currently 0xa) where we map the special vector 0xf20 (altivec).
This commit is contained in:
@@ -1,3 +1,11 @@
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2006-06-19 Till Straumann <strauman@slac.stanford.edu>
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* mpc6xx/exceptions/raw_exception.c, mpc6xx/exceptions/raw_exception.h:
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Added altivec exception. Unfortunately, this doesn't fit
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the normal scheme of vector = exception # << 8. So we picked
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an unused vector number (currently 0xa) where we map the special
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vector 0xf20 (altivec).
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2006-06-19 Till Straumann <strauman@slac.stanford.edu>
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2006-06-19 Till Straumann <strauman@slac.stanford.edu>
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* new-exceptions/cpu.c, new-exceptions/cpu_asm.S: Never
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* new-exceptions/cpu.c, new-exceptions/cpu_asm.S: Never
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@@ -36,12 +36,29 @@ void * codemove(void *, const void *, unsigned int, unsigned long);
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void* mpc60x_get_vector_addr(rtems_vector vector)
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void* mpc60x_get_vector_addr(rtems_vector vector)
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{
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{
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unsigned vaddr = ((unsigned)vector) << 8;
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extern rtems_cpu_table Cpu_table;
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extern rtems_cpu_table Cpu_table;
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if ( Cpu_table.exceptions_in_RAM )
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/* Special case; altivec unavailable doesn't fit :-( */
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return ((void*) (((unsigned) vector) << 8));
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if ( ASM_VEC_VECTOR == vector )
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vaddr = ASM_VEC_VECTOR_OFFSET;
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return ((void*) (((unsigned) vector) << 8) + 0xfff00000);
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if ( Cpu_table.exceptions_in_RAM )
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return ((void*) vaddr);
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return ((void*) (vaddr + 0xfff00000));
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}
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int altivec_vector_is_valid(rtems_vector vector)
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{
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switch(vector) {
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case ASM_VEC_VECTOR:
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case ASM_VEC_ASSIST_VECTOR:
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return 1;
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default:
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break;
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}
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return 0;
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}
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}
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int mpc750_vector_is_valid(rtems_vector vector)
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int mpc750_vector_is_valid(rtems_vector vector)
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@@ -160,16 +177,22 @@ int mpc60x_vector_is_valid(rtems_vector vector)
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{
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{
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switch (current_ppc_cpu) {
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switch (current_ppc_cpu) {
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case PPC_7400:
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case PPC_7400:
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if ( altivec_vector_is_valid(vector) )
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return 1;
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/* else fall thru */
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case PPC_750:
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case PPC_750:
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if (!mpc750_vector_is_valid(vector)) {
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if (!mpc750_vector_is_valid(vector)) {
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return 0;
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return 0;
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}
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}
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break;
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break;
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case PPC_7455: /* Kate Feng */
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case PPC_7457:
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if ( altivec_vector_is_valid(vector) )
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return 1;
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/* else fall thru */
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case PPC_604:
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case PPC_604:
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case PPC_604e:
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case PPC_604e:
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case PPC_604r:
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case PPC_604r:
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case PPC_7455: /* Kate Feng */
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case PPC_7457:
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if (!mpc604_vector_is_valid(vector)) {
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if (!mpc604_vector_is_valid(vector)) {
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return 0;
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return 0;
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}
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}
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@@ -30,44 +30,55 @@
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* Exception Vectors as defined in the MCP750 manual
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* Exception Vectors as defined in the MCP750 manual
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*/
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*/
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#define ASM_RESET_VECTOR 0x01
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#define ASM_RESET_VECTOR 0x01
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#define ASM_MACH_VECTOR 0x02
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#define ASM_MACH_VECTOR 0x02
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#define ASM_PROT_VECTOR 0x03
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#define ASM_PROT_VECTOR 0x03
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#define ASM_ISI_VECTOR 0x04
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#define ASM_ISI_VECTOR 0x04
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#define ASM_EXT_VECTOR 0x05
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#define ASM_EXT_VECTOR 0x05
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#define ASM_ALIGN_VECTOR 0x06
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#define ASM_ALIGN_VECTOR 0x06
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#define ASM_PROG_VECTOR 0x07
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#define ASM_PROG_VECTOR 0x07
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#define ASM_FLOAT_VECTOR 0x08
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#define ASM_FLOAT_VECTOR 0x08
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#define ASM_DEC_VECTOR 0x09
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#define ASM_DEC_VECTOR 0x09
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#define ASM_SYS_VECTOR 0x0C
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/* Bummer: Altivec unavailable doesn't fit into this scheme... (0xf20).
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#define ASM_TRACE_VECTOR 0x0D
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* We'd like to avoid reserved vectors but OTOH we don't want to use
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#define ASM_PERFMON_VECTOR 0x0F
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* just an available high number because tables (and copies) are of
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#define ASM_IMISS_VECTOR 0x10
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* size LAST_VALID_EXC.
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#define ASM_DLMISS_VECTOR 0x11
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* So until there is a CPU that uses 0xA we'll just use that :-(
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#define ASM_DSMISS_VECTOR 0x12
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*/
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#define ASM_ADDR_VECTOR 0x13
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#define ASM_VEC_VECTOR 0x0A
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#define ASM_SYSMGMT_VECTOR 0x14
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#define ASM_SYS_VECTOR 0x0C
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#define ASM_ITM_VECTOR 0x17
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#define ASM_TRACE_VECTOR 0x0D
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#define ASM_PERFMON_VECTOR 0x0F
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#define ASM_IMISS_VECTOR 0x10
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#define ASM_DLMISS_VECTOR 0x11
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#define ASM_DSMISS_VECTOR 0x12
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#define ASM_ADDR_VECTOR 0x13
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#define ASM_SYSMGMT_VECTOR 0x14
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#define ASM_VEC_ASSIST_VECTOR 0x16
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#define ASM_ITM_VECTOR 0x17
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#define LAST_VALID_EXC ASM_ITM_VECTOR
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#define LAST_VALID_EXC ASM_ITM_VECTOR
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/*
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/*
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* Vector offsets as defined in the MCP750 manual
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* Vector offsets as defined in the MCP750 manual
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*/
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*/
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#define ASM_RESET_VECTOR_OFFSET (ASM_RESET_VECTOR << 8)
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#define ASM_RESET_VECTOR_OFFSET (ASM_RESET_VECTOR << 8)
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#define ASM_MACH_VECTOR_OFFSET (ASM_MACH_VECTOR << 8)
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#define ASM_MACH_VECTOR_OFFSET (ASM_MACH_VECTOR << 8)
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#define ASM_PROT_VECTOR_OFFSET (ASM_PROT_VECTOR << 8)
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#define ASM_PROT_VECTOR_OFFSET (ASM_PROT_VECTOR << 8)
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#define ASM_ISI_VECTOR_OFFSET (ASM_ISI_VECTOR << 8)
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#define ASM_ISI_VECTOR_OFFSET (ASM_ISI_VECTOR << 8)
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#define ASM_EXT_VECTOR_OFFSET (ASM_EXT_VECTOR << 8)
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#define ASM_EXT_VECTOR_OFFSET (ASM_EXT_VECTOR << 8)
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#define ASM_ALIGN_VECTOR_OFFSET (ASM_ALIGN_VECTOR << 8)
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#define ASM_ALIGN_VECTOR_OFFSET (ASM_ALIGN_VECTOR << 8)
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#define ASM_PROG_VECTOR_OFFSET (ASM_PROG_VECTOR << 8)
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#define ASM_PROG_VECTOR_OFFSET (ASM_PROG_VECTOR << 8)
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#define ASM_FLOAT_VECTOR_OFFSET (ASM_FLOAT_VECTOR << 8)
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#define ASM_FLOAT_VECTOR_OFFSET (ASM_FLOAT_VECTOR << 8)
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#define ASM_DEC_VECTOR_OFFSET (ASM_DEC_VECTOR << 8)
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#define ASM_DEC_VECTOR_OFFSET (ASM_DEC_VECTOR << 8)
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#define ASM_SYS_VECTOR_OFFSET (ASM_SYS_VECTOR << 8)
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#define ASM_SYS_VECTOR_OFFSET (ASM_SYS_VECTOR << 8)
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#define ASM_TRACE_VECTOR_OFFSET (ASM_TRACE_VECTOR << 8)
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#define ASM_TRACE_VECTOR_OFFSET (ASM_TRACE_VECTOR << 8)
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#define ASM_ADDR_VECTOR_OFFSET (ASM_ADDR_VECTOR << 8)
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#define ASM_PERFMON_VECTOR_OFFSET (ASM_PERFMON_VECTOR << 8)
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#define ASM_SYSMGMT_VECTOR_OFFSET (ASM_SYSMGMT_VECTOR << 8)
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#define ASM_VEC_VECTOR_OFFSET (0xf20)
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#define ASM_ITM_VECTOR_OFFSET (ASM_ITM_VECTOR << 8)
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#define ASM_ADDR_VECTOR_OFFSET (ASM_ADDR_VECTOR << 8)
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#define ASM_SYSMGMT_VECTOR_OFFSET (ASM_SYSMGMT_VECTOR << 8)
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#define ASM_VEC_ASSIST_VECTOR_OFFSET (ASM_VEC_ASSIST_VECTOR << 8)
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#define ASM_ITM_VECTOR_OFFSET (ASM_ITM_VECTOR << 8)
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#ifndef ASM
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#ifndef ASM
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