RTOS/rtems
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2007-10-05 Ray Xu <xr@trasin.net>

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* lpc22xx/clock/clockdrv.c, lpc22xx/irq/irq.c, lpc22xx/irq/irq.h: Now
	runs in Skyeye.
This commit is contained in:
Joel Sherrill
2007-10-05 18:58:02 +00:00
parent 5f3b50c779
commit 22f39fc0dc
4 changed files with 13 additions and 8 deletions
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5
c/src/lib/libcpu/arm/ChangeLog
View File

@@ -1,3 +1,8 @@
2007-10-05 Ray Xu <xr@trasin.net>
* lpc22xx/clock/clockdrv.c, lpc22xx/irq/irq.c, lpc22xx/irq/irq.h: Now
runs in Skyeye.
2007-09-12 Joel Sherrill <joel.sherrill@OARcorp.com>
PR 1257/bsps

7
c/src/lib/libcpu/arm/lpc22xx/clock/clockdrv.c
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@@ -52,7 +52,7 @@ rtems_irq_connect_data clock_isr_data = {LPC22xx_INTERRUPT_TIMER0,
#define Clock_driver_support_at_tick() \
do { \
if (!(T0IR & 0x01)) return; \
T0IR = 0x01; \
T0IR = 0x01; \
VICVectAddr = 0x00;\
} while(0)
@@ -85,12 +85,13 @@ rtems_irq_connect_data clock_isr_data = {LPC22xx_INTERRUPT_TIMER0,
#define Clock_driver_support_initialize_hardware() \
do { \
T0TCR &= 0; /* disable and clear timer 0, set to */ \
T0PC = 0; /* TC is incrementet on every pclk.*/ \
T0PC = 0; /* TC is incrementet on every pclk.*/ \
T0MR0 = ((LPC22xx_Fpclk/1000* BSP_Configuration.microseconds_per_tick) / 1000); /* initialize the timer period and prescaler */ \
/*T0PR = (((LPC22xx_Fpclk / 1000) * BSP_Configuration.microseconds_per_tick) / 1000-1); \ */ \
T0MCR |= 0x03; /* generate interrupt when T0MR0 match T0TC and Reset Timer Count*/ \
T0EMR = 0; /*No external match*/ \
T0EMR = 0; /*No external match*/ \
T0TCR = 1; /*enable timer0*/ \
T0IR|=0x01;/*enable interrupt, skyeye will check this*/\
} while (0)
/**

8
c/src/lib/libcpu/arm/lpc22xx/irq/irq.c
View File

@@ -37,7 +37,6 @@ int BSP_install_rtems_irq_handler (const rtems_irq_connect_data* irq)
rtems_interrupt_level level;
rtems_irq_hdl *bsp_tbl;
int *vic_cntl;
static int irq_counter = 0;
bsp_tbl = (rtems_irq_hdl *)VICVectAddrBase;
@@ -51,7 +50,7 @@ int BSP_install_rtems_irq_handler (const rtems_irq_connect_data* irq)
* Check if default handler is actually connected. If not issue an error.
*/
if (bsp_tbl[irq_counter] != default_int_handler) {
if (bsp_tbl[irq->name] != default_int_handler) {
return 0;
}
@@ -60,12 +59,12 @@ int BSP_install_rtems_irq_handler (const rtems_irq_connect_data* irq)
/*
* store the new handler
*/
bsp_tbl[irq_counter] = irq->hdl;
bsp_tbl[irq->name] = irq->hdl;
/* *(volatile unsigned long*)(VICVectAddr0+(irq->name * 4)&0x7c )= (uint32_t) irq->hdl;*/
/*
* Enable interrupt on device
*/
vic_cntl[irq_counter] = 0x20 | irq->name;
vic_cntl[irq->name] = 0x20 | irq->name;
VICIntEnable |= 1 << irq->name;
@@ -74,7 +73,6 @@ int BSP_install_rtems_irq_handler (const rtems_irq_connect_data* irq)
irq->on(irq);
}
irq_counter++;
rtems_interrupt_enable(level);

1
c/src/lib/libcpu/arm/lpc22xx/irq/irq.h
View File

@@ -54,6 +54,7 @@ extern void default_int_handler();
#define LPC22xx_INTERRUPT_EINT2 16 /* Externel Interrupt 2 */
#define LPC22xx_INTERRUPT_EINT3 17 /* Externel Interrupt 3 */
#define LPC22xx_INTERRUPT_ADC 18 /* AD Converter */
/* Following interrupt used by lpc229x */
#define LPC22xx_INTERRUPT_CANERR 19 /* CAN LUTerr interrupt */
#define LPC22xx_INTERRUPT_CAN1TX 20 /* CAN1 Tx interrupt */
#define LPC22xx_INTERRUPT_CAN1RX 21 /* CAN1 Rx interrupt */