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This commit is contained in:
Thomas Doerfler
2010-04-09 12:25:22 +00:00
parent 7a6f8d09fe
commit 22f107b6e4
24 changed files with 664 additions and 70 deletions
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6
c/src/lib/libbsp/arm/lpc24xx/ChangeLog
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@@ -1,3 +1,9 @@
2010-04-09 Sebastian Huber <sebastian.huber@embedded-brains.de>
* Makefile.am, configure.ac, include/lpc24xx.h, irq/irq.c,
make/custom/lpc24xx.inc, misc/io.c, startup/bspstart.c,
startup/bspstarthooks.c, startup/linkcmds.lpc2362: Changes throughout.
2010-03-29 Thomas Doerfler <Thomas.Doerfler@embedded-brains.de> 2010-03-29 Thomas Doerfler <Thomas.Doerfler@embedded-brains.de>
* configure.ac: make the lpc2362 a SMALL MEMORY BSP * configure.ac: make the lpc2362 a SMALL MEMORY BSP

8
c/src/lib/libbsp/arm/lpc24xx/Makefile.am
View File

@@ -86,7 +86,6 @@ libbsp_a_SOURCES += ../../shared/bootcard.c \
../../shared/bsplibc.c \ ../../shared/bsplibc.c \
../../shared/bsppost.c \ ../../shared/bsppost.c \
../../shared/bsppredriverhook.c \ ../../shared/bsppredriverhook.c \
../../shared/bsppretaskinghook.c \
../../shared/gnatinstallhandler.c \ ../../shared/gnatinstallhandler.c \
../../shared/sbrk.c \ ../../shared/sbrk.c \
../../shared/src/stackalloc.c \ ../../shared/src/stackalloc.c \
@@ -135,13 +134,8 @@ libbsp_a_SOURCES += ../../../libcpu/shared/src/cache_manager.c \
../../../libcpu/arm/shared/cache/cache_.h ../../../libcpu/arm/shared/cache/cache_.h
libbsp_a_CPPFLAGS += -I$(srcdir)/../../../libcpu/arm/shared/include libbsp_a_CPPFLAGS += -I$(srcdir)/../../../libcpu/arm/shared/include
# Start hooks (FIXME: This is brittle.) # Start hooks
libbsp_a_SOURCES += startup/bspstarthooks.c libbsp_a_SOURCES += startup/bspstarthooks.c
libbsp_a-bspstarthooks.o: startup/bspstarthooks.c
$(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(libbsp_a_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS:-mthumb=) \
-MT libbsp_a-bspstarthooks.o -MD -MP -MF $(DEPDIR)/libbsp_a-bspstarthooks.Tpo -c -o libbsp_a-bspstarthooks.o \
`test -f 'startup/bspstarthooks.c' || echo '$(srcdir)/'`startup/bspstarthooks.c
$(am__mv) $(DEPDIR)/libbsp_a-bspstarthooks.Tpo $(DEPDIR)/libbsp_a-bspstarthooks.Po
############################################################################### ###############################################################################
# Network # # Network #

25
c/src/lib/libbsp/arm/lpc24xx/configure.ac
View File

@@ -6,7 +6,7 @@
# #
AC_PREREQ(2.59) AC_PREREQ(2.59)
AC_INIT([rtems-c-src-lib-libbsp-arm-lpc247x],[_RTEMS_VERSION],[rtems-bugs@rtems.com]) AC_INIT([rtems-c-src-lib-libbsp-arm-lpc24xx],[_RTEMS_VERSION],[rtems-bugs@rtems.com])
AC_CONFIG_SRCDIR([bsp_specs]) AC_CONFIG_SRCDIR([bsp_specs])
RTEMS_TOP(../../../../../..) RTEMS_TOP(../../../../../..)
@@ -21,22 +21,25 @@ RTEMS_PROG_CCAS
RTEMS_CHECK_NETWORKING RTEMS_CHECK_NETWORKING
AM_CONDITIONAL(HAS_NETWORKING,test "$HAS_NETWORKING" = "yes") AM_CONDITIONAL(HAS_NETWORKING,test "$HAS_NETWORKING" = "yes")
RTEMS_BSPOPTS_SET([BSP_SMALL_MEMORY],[lpc2362],[TRUE]) RTEMS_BSPOPTS_SET([BSP_SMALL_MEMORY],[lpc2362],[1])
RTEMS_BSPOPTS_SET([BSP_SMALL_MEMORY],[*],[]) RTEMS_BSPOPTS_SET([BSP_SMALL_MEMORY],[*],[])
RTEMS_BSPOPTS_HELP([BSP_SMALL_MEMORY],[set to true fo low memory footprint]) RTEMS_BSPOPTS_HELP([BSP_SMALL_MEMORY],[disable testsuite samples with high memory demands])
RTEMS_BSPOPTS_SET([LPC24XX_OSCILLATOR_MAIN],[lpc2362],[3686400U])
RTEMS_BSPOPTS_SET([LPC24XX_OSCILLATOR_MAIN],[*],[12000000U]) RTEMS_BSPOPTS_SET([LPC24XX_OSCILLATOR_MAIN],[*],[12000000U])
RTEMS_BSPOPTS_HELP([LPC24XX_OSCILLATOR_MAIN],[main oscillator frequency in Hz]) RTEMS_BSPOPTS_HELP([LPC24XX_OSCILLATOR_MAIN],[main oscillator frequency in Hz])
RTEMS_BSPOPTS_SET([LPC24XX_OSCILLATOR_RTC],[*],[32768U]) RTEMS_BSPOPTS_SET([LPC24XX_OSCILLATOR_RTC],[*],[32768U])
RTEMS_BSPOPTS_HELP([LPC24XX_OSCILLATOR_RTC],[RTC oscillator frequency in Hz]) RTEMS_BSPOPTS_HELP([LPC24XX_OSCILLATOR_RTC],[RTC oscillator frequency in Hz])
RTEMS_BSPOPTS_SET([LPC24XX_CCLK],[lpc2362],[58982400U])
RTEMS_BSPOPTS_SET([LPC24XX_CCLK],[*],[72000000U]) RTEMS_BSPOPTS_SET([LPC24XX_CCLK],[*],[72000000U])
RTEMS_BSPOPTS_HELP([LPC24XX_CCLK],[CPU clock in Hz]) RTEMS_BSPOPTS_HELP([LPC24XX_CCLK],[CPU clock in Hz])
RTEMS_BSPOPTS_SET([LPC24XX_UART_BAUD],[*],[115200U]) RTEMS_BSPOPTS_SET([LPC24XX_UART_BAUD],[*],[115200U])
RTEMS_BSPOPTS_HELP([LPC24XX_UART_BAUD],[baud for UARTs]) RTEMS_BSPOPTS_HELP([LPC24XX_UART_BAUD],[baud for UARTs])
RTEMS_BSPOPTS_SET([LPC24XX_ETHERNET_RMII],[lpc24xx_ea],[1])
RTEMS_BSPOPTS_SET([LPC24XX_ETHERNET_RMII],[*],[]) RTEMS_BSPOPTS_SET([LPC24XX_ETHERNET_RMII],[*],[])
RTEMS_BSPOPTS_HELP([LPC24XX_ETHERNET_RMII],[enable RMII for Ethernet]) RTEMS_BSPOPTS_HELP([LPC24XX_ETHERNET_RMII],[enable RMII for Ethernet])
@@ -59,9 +62,11 @@ RTEMS_BSPOPTS_HELP([LPC24XX_CONFIG_CONSOLE],[configuration for console (UART 0)]
RTEMS_BSPOPTS_SET([LPC24XX_CONFIG_UART_1],[*],[]) RTEMS_BSPOPTS_SET([LPC24XX_CONFIG_UART_1],[*],[])
RTEMS_BSPOPTS_HELP([LPC24XX_CONFIG_UART_1],[configuration for UART 1]) RTEMS_BSPOPTS_HELP([LPC24XX_CONFIG_UART_1],[configuration for UART 1])
RTEMS_BSPOPTS_SET([LPC24XX_CONFIG_UART_2],[lpc2362],[0])
RTEMS_BSPOPTS_SET([LPC24XX_CONFIG_UART_2],[lpc24xx_ncs_*],[0]) RTEMS_BSPOPTS_SET([LPC24XX_CONFIG_UART_2],[lpc24xx_ncs_*],[0])
RTEMS_BSPOPTS_HELP([LPC24XX_CONFIG_UART_2],[configuration for UART 2]) RTEMS_BSPOPTS_HELP([LPC24XX_CONFIG_UART_2],[configuration for UART 2])
RTEMS_BSPOPTS_SET([LPC24XX_CONFIG_UART_3],[lpc2362],[0])
RTEMS_BSPOPTS_SET([LPC24XX_CONFIG_UART_3],[lpc24xx_ncs_*],[0]) RTEMS_BSPOPTS_SET([LPC24XX_CONFIG_UART_3],[lpc24xx_ncs_*],[0])
RTEMS_BSPOPTS_HELP([LPC24XX_CONFIG_UART_3],[configuration for UART 3]) RTEMS_BSPOPTS_HELP([LPC24XX_CONFIG_UART_3],[configuration for UART 3])
@@ -74,6 +79,20 @@ RTEMS_BSPOPTS_HELP([LPC24XX_CONFIG_I2C_1],[configuration for I2C 1])
RTEMS_BSPOPTS_SET([LPC24XX_CONFIG_I2C_2],[*],[]) RTEMS_BSPOPTS_SET([LPC24XX_CONFIG_I2C_2],[*],[])
RTEMS_BSPOPTS_HELP([LPC24XX_CONFIG_I2C_2],[configuration for I2C 2]) RTEMS_BSPOPTS_HELP([LPC24XX_CONFIG_I2C_2],[configuration for I2C 2])
RTEMS_BSPOPTS_SET([LPC24XX_HEAP_EXTEND],[lpc2362],[1])
RTEMS_BSPOPTS_HELP([LPC24XX_HEAP_EXTEND],[enable heap extend by Ethernet and USB regions])
RTEMS_BSPOPTS_SET([LPC24XX_STOP_GPDMA],[*],[1])
RTEMS_BSPOPTS_HELP([LPC24XX_STOP_GPDMA],[stop general purpose DMA at start-up to avoid DMA interference])
RTEMS_BSPOPTS_SET([LPC24XX_STOP_ETHERNET],[lpc2362],[])
RTEMS_BSPOPTS_SET([LPC24XX_STOP_ETHERNET],[*],[1])
RTEMS_BSPOPTS_HELP([LPC24XX_STOP_ETHERNET],[stop Ethernet controller at start-up to avoid DMA interference])
RTEMS_BSPOPTS_SET([LPC24XX_STOP_USB],[lpc2362],[])
RTEMS_BSPOPTS_SET([LPC24XX_STOP_USB],[*],[1])
RTEMS_BSPOPTS_HELP([LPC24XX_STOP_USB],[stop USB controller at start-up to avoid DMA interference])
RTEMS_BSPOPTS_SET([BSP_START_RESET_VECTOR],[lpc24xx_ncs_rom_ext],[0x80000040]) RTEMS_BSPOPTS_SET([BSP_START_RESET_VECTOR],[lpc24xx_ncs_rom_ext],[0x80000040])
RTEMS_BSPOPTS_HELP([BSP_START_RESET_VECTOR],[reset vector address for BSP start]) RTEMS_BSPOPTS_HELP([BSP_START_RESET_VECTOR],[reset vector address for BSP start])

6
c/src/lib/libbsp/arm/lpc24xx/include/lpc24xx.h
View File

@@ -1970,6 +1970,12 @@ typedef struct {
#define LPC24XX_FIO ((volatile lpc24xx_fio *) FIO_BASE_ADDR) #define LPC24XX_FIO ((volatile lpc24xx_fio *) FIO_BASE_ADDR)
/* PCONP */
#define PCONP_GPDMA (1U << 29)
#define PCONP_ETHERNET (1U << 30)
#define PCONP_USB (1U << 31)
/** @} */ /** @} */
#endif /* LIBBSP_ARM_LPC24XX_LPC24XX_H */ #endif /* LIBBSP_ARM_LPC24XX_LPC24XX_H */

4
c/src/lib/libbsp/arm/lpc24xx/irq/irq.c
View File

@@ -110,8 +110,10 @@ rtems_status_code bsp_interrupt_facility_initialize(void)
/* Reset priority mask register */ /* Reset priority mask register */
VICSWPrioMask = 0xffff; VICSWPrioMask = 0xffff;
/* Acknowledge interrupt */ /* Acknowledge interrupts for all priorities */
for (i = LPC24XX_IRQ_PRIORITY_VALUE_MIN; i <= LPC24XX_IRQ_PRIORITY_VALUE_MAX; ++i) {
VICVectAddr = 0; VICVectAddr = 0;
}
/* Install the IRQ exception handler */ /* Install the IRQ exception handler */
_CPU_ISR_install_vector(ARM_EXCEPTION_IRQ, arm_exc_interrupt, NULL); _CPU_ISR_install_vector(ARM_EXCEPTION_IRQ, arm_exc_interrupt, NULL);

3
c/src/lib/libbsp/arm/lpc24xx/make/custom/lpc24xx.inc
View File

@@ -8,6 +8,7 @@ include $(RTEMS_ROOT)/make/custom/default.cfg
RTEMS_CPU = arm RTEMS_CPU = arm
CPU_CFLAGS = -mcpu=arm7tdmi-s -mstructure-size-boundary=8 -mthumb CPU_CFLAGS = -mcpu=arm7tdmi-s -mthumb -mstructure-size-boundary=8 \
-Wextra -Wno-unused -Wpointer-arith -Wcast-qual -Wconversion -Wmissing-prototypes
CFLAGS_OPTIMIZE_V = -Os -g CFLAGS_OPTIMIZE_V = -Os -g

9
c/src/lib/libbsp/arm/lpc24xx/misc/io.c
View File

@@ -77,6 +77,7 @@ static const lpc24xx_io_entry lpc24xx_io_config_table [] = {
/* ADC */ /* ADC */
LPC24XX_IO_ENTRY(LPC24XX_MODULE_ADC, 0, 0, 12, 0, 13, LPC24XX_IO_ALTERNATE_2), LPC24XX_IO_ENTRY(LPC24XX_MODULE_ADC, 0, 0, 12, 0, 13, LPC24XX_IO_ALTERNATE_2),
LPC24XX_IO_ENTRY(LPC24XX_MODULE_ADC, 1, 0, 23, 0, 25, LPC24XX_IO_ALTERNATE_0),
/* I2C */ /* I2C */
LPC24XX_IO_ENTRY(LPC24XX_MODULE_I2C_0, 0, 0, 27, 0, 28, LPC24XX_IO_ALTERNATE_0), LPC24XX_IO_ENTRY(LPC24XX_MODULE_I2C_0, 0, 0, 27, 0, 28, LPC24XX_IO_ALTERNATE_0),
@@ -103,8 +104,14 @@ static const lpc24xx_io_entry lpc24xx_io_config_table [] = {
LPC24XX_IO_ENTRY(LPC24XX_MODULE_USB, 0, 0, 29, 0, 30, LPC24XX_IO_ALTERNATE_0), LPC24XX_IO_ENTRY(LPC24XX_MODULE_USB, 0, 0, 29, 0, 30, LPC24XX_IO_ALTERNATE_0),
LPC24XX_IO_ENTRY(LPC24XX_MODULE_USB, 0, 1, 19, 1, 19, LPC24XX_IO_ALTERNATE_1), LPC24XX_IO_ENTRY(LPC24XX_MODULE_USB, 0, 1, 19, 1, 19, LPC24XX_IO_ALTERNATE_1),
/* SPI */
LPC24XX_IO_ENTRY(LPC24XX_MODULE_SPI, 0, 0, 15, 0, 18, LPC24XX_IO_ALTERNATE_2),
/* PWM */
LPC24XX_IO_ENTRY(LPC24XX_MODULE_PWM_1, 0, 2, 0, 2, 0, LPC24XX_IO_ALTERNATE_0),
/* Terminate */ /* Terminate */
LPC24XX_IO_ENTRY(LPC24XX_MODULE_COUNT, 0, 0, 0, 0, 0, 0), LPC24XX_IO_ENTRY(LPC24XX_MODULE_COUNT, 0, 0, 0, 0, 0, 0)
}; };
static rtems_status_code lpc24xx_io_iterate( static rtems_status_code lpc24xx_io_iterate(

30
c/src/lib/libbsp/arm/lpc24xx/startup/bspstart.c
View File

@@ -30,6 +30,36 @@
#include <bsp/stackalloc.h> #include <bsp/stackalloc.h>
#include <bsp/system-clocks.h> #include <bsp/system-clocks.h>
#ifdef LPC24XX_HEAP_EXTEND
LINKER_SYMBOL(lpc24xx_region_heap_0_begin);
LINKER_SYMBOL(lpc24xx_region_heap_0_size);
LINKER_SYMBOL(lpc24xx_region_heap_0_end);
LINKER_SYMBOL(lpc24xx_region_heap_1_begin);
LINKER_SYMBOL(lpc24xx_region_heap_1_size);
LINKER_SYMBOL(lpc24xx_region_heap_1_end);
extern Heap_Control *RTEMS_Malloc_Heap;
#endif
void bsp_pretasking_hook(void)
{
#ifdef LPC24XX_HEAP_EXTEND
_Heap_Extend(
RTEMS_Malloc_Heap,
lpc24xx_region_heap_0_begin,
(uintptr_t) lpc24xx_region_heap_0_size,
NULL
);
_Heap_Extend(
RTEMS_Malloc_Heap,
lpc24xx_region_heap_1_begin,
(uintptr_t) lpc24xx_region_heap_1_size,
NULL
);
#endif
}
void bsp_start(void) void bsp_start(void)
{ {
/* Initialize Timer 1 */ /* Initialize Timer 1 */

60
c/src/lib/libbsp/arm/lpc24xx/startup/bspstarthooks.c
View File

@@ -28,6 +28,10 @@
#define BSP_START_SECTION __attribute__((section(".bsp_start"))) #define BSP_START_SECTION __attribute__((section(".bsp_start")))
#if defined(LPC24XX_EMC_MICRON) || defined(LPC24XX_EMC_NUMONYX)
#define LPC24XX_EMC_INIT
#endif
#ifdef LPC24XX_EMC_MICRON #ifdef LPC24XX_EMC_MICRON
static void BSP_START_SECTION lpc24xx_ram_test_32(void) static void BSP_START_SECTION lpc24xx_ram_test_32(void)
{ {
@@ -114,15 +118,17 @@ static void BSP_START_SECTION lpc24xx_init_emc_0(void)
numonyx.waitrun = 0xf; numonyx.waitrun = 0xf;
#endif #endif
#ifdef LPC24XX_EMC_INIT
/* Set pin functions for EMC */ /* Set pin functions for EMC */
PINSEL5 = (PINSEL5 & 0xf000f000) | 0x05550555; PINSEL5 = (PINSEL5 & 0xf000f000) | 0x05550555;
PINSEL6 = 0x55555555; PINSEL6 = 0x55555555;
PINSEL8 = 0x55555555; PINSEL8 = 0x55555555;
PINSEL9 = (PINSEL9 & 0x0f000000) | 0x50555555; PINSEL9 = (PINSEL9 & 0x0f000000) | 0x50555555;
#endif
#ifdef LPC24XX_EMC_NUMONYX #ifdef LPC24XX_EMC_NUMONYX
/* Static Memory 1 settings */ /* Static Memory 1 settings */
bsp_start_memcpy_arm( bsp_start_memcpy(
(int *) EMC_STA_BASE_1, (int *) EMC_STA_BASE_1,
(const int *) &numonyx, (const int *) &numonyx,
sizeof(numonyx) sizeof(numonyx)
@@ -135,8 +141,10 @@ static void BSP_START_SECTION lpc24xx_init_emc_0(void)
*/ */
static void BSP_START_SECTION lpc24xx_init_emc_1(void) static void BSP_START_SECTION lpc24xx_init_emc_1(void)
{ {
#ifdef LPC24XX_EMC_INIT
/* Use normal memory map */ /* Use normal memory map */
EMC_CTRL = CLEAR_FLAG(EMC_CTRL, 0x2); EMC_CTRL = CLEAR_FLAG(EMC_CTRL, 0x2);
#endif
#ifdef LPC24XX_EMC_MICRON #ifdef LPC24XX_EMC_MICRON
/* Check if we need to initialize it */ /* Check if we need to initialize it */
@@ -326,7 +334,13 @@ static void BSP_START_SECTION lpc24xx_init_pll(void)
} }
/* Set PLL */ /* Set PLL */
#if LPC24XX_OSCILLATOR_MAIN == 12000000U
lpc24xx_set_pll(1, 0, 11, 3); lpc24xx_set_pll(1, 0, 11, 3);
#elif LPC24XX_OSCILLATOR_MAIN == 3686400U
lpc24xx_set_pll(1, 0, 47, 5);
#else
#error "unexpected main oscillator frequency"
#endif
} }
static void BSP_START_SECTION lpc24xx_clear_bss(void) static void BSP_START_SECTION lpc24xx_clear_bss(void)
@@ -355,9 +369,18 @@ void BSP_START_SECTION bsp_start_hook_1(void)
/* Re-map interrupt vectors to internal RAM */ /* Re-map interrupt vectors to internal RAM */
MEMMAP = SET_MEMMAP_MAP(MEMMAP, 2); MEMMAP = SET_MEMMAP_MAP(MEMMAP, 2);
/* Set memory accelerator module (MAM) */ /* Fully enable memory accelerator module functions (MAM) */
MAMCR = 0; MAMCR = 0;
MAMTIM = 4; #if LPC24XX_CCLK <= 20000000U
MAMTIM = 0x1;
#elif LPC24XX_CCLK <= 40000000U
MAMTIM = 0x2;
#elif LPC24XX_CCLK <= 60000000U
MAMTIM = 0x3;
#else
MAMTIM = 0x4;
#endif
MAMCR = 0x2;
/* Enable fast IO for ports 0 and 1 */ /* Enable fast IO for ports 0 and 1 */
SCS = SET_FLAG(SCS, 0x1); SCS = SET_FLAG(SCS, 0x1);
@@ -377,29 +400,52 @@ void BSP_START_SECTION bsp_start_hook_1(void)
/* Initialize EMC hook 1 */ /* Initialize EMC hook 1 */
lpc24xx_init_emc_1(); lpc24xx_init_emc_1();
#ifdef LPC24XX_STOP_GPDMA
if ((PCONP & PCONP_GPDMA) != 0) {
GPDMA_CONFIG = 0;
PCONP &= ~PCONP_GPDMA;
}
#endif
#ifdef LPC24XX_STOP_ETHERNET
if ((PCONP & PCONP_ETHERNET) != 0) {
MAC_COMMAND = 0x38;
MAC_MAC1 = 0xcf00;
MAC_MAC1 = 0;
PCONP &= ~PCONP_ETHERNET;
}
#endif
#ifdef LPC24XX_STOP_USB
if ((PCONP & PCONP_USB) != 0) {
OTG_CLK_CTRL = 0;
PCONP &= ~PCONP_USB;
}
#endif
/* Copy .text section */ /* Copy .text section */
bsp_start_memcpy_arm( bsp_start_memcpy(
(int *) bsp_section_text_begin, (int *) bsp_section_text_begin,
(const int *) bsp_section_text_load_begin, (const int *) bsp_section_text_load_begin,
(size_t) bsp_section_text_size (size_t) bsp_section_text_size
); );
/* Copy .rodata section */ /* Copy .rodata section */
bsp_start_memcpy_arm( bsp_start_memcpy(
(int *) bsp_section_rodata_begin, (int *) bsp_section_rodata_begin,
(const int *) bsp_section_rodata_load_begin, (const int *) bsp_section_rodata_load_begin,
(size_t) bsp_section_rodata_size (size_t) bsp_section_rodata_size
); );
/* Copy .data section */ /* Copy .data section */
bsp_start_memcpy_arm( bsp_start_memcpy(
(int *) bsp_section_data_begin, (int *) bsp_section_data_begin,
(const int *) bsp_section_data_load_begin, (const int *) bsp_section_data_load_begin,
(size_t) bsp_section_data_size (size_t) bsp_section_data_size
); );
/* Copy .fast section */ /* Copy .fast section */
bsp_start_memcpy_arm( bsp_start_memcpy(
(int *) bsp_section_fast_begin, (int *) bsp_section_fast_begin,
(const int *) bsp_section_fast_load_begin, (const int *) bsp_section_fast_load_begin,
(size_t) bsp_section_fast_size (size_t) bsp_section_fast_size

12
c/src/lib/libbsp/arm/lpc24xx/startup/linkcmds.lpc2362
View File

@@ -48,12 +48,20 @@ REGION_ALIAS ("REGION_TEXT", ROM_INT);
REGION_ALIAS ("REGION_TEXT_LOAD", ROM_INT); REGION_ALIAS ("REGION_TEXT_LOAD", ROM_INT);
REGION_ALIAS ("REGION_RODATA", ROM_INT); REGION_ALIAS ("REGION_RODATA", ROM_INT);
REGION_ALIAS ("REGION_RODATA_LOAD", ROM_INT); REGION_ALIAS ("REGION_RODATA_LOAD", ROM_INT);
REGION_ALIAS ("REGION_DATA", RAM_ETH); REGION_ALIAS ("REGION_DATA", RAM_INT);
REGION_ALIAS ("REGION_DATA_LOAD", ROM_INT); REGION_ALIAS ("REGION_DATA_LOAD", ROM_INT);
REGION_ALIAS ("REGION_FAST", RAM_INT); REGION_ALIAS ("REGION_FAST", RAM_INT);
REGION_ALIAS ("REGION_FAST_LOAD", ROM_INT); REGION_ALIAS ("REGION_FAST_LOAD", ROM_INT);
REGION_ALIAS ("REGION_BSS", RAM_ETH); REGION_ALIAS ("REGION_BSS", RAM_INT);
REGION_ALIAS ("REGION_WORK", RAM_INT); REGION_ALIAS ("REGION_WORK", RAM_INT);
REGION_ALIAS ("REGION_STACK", RAM_INT); REGION_ALIAS ("REGION_STACK", RAM_INT);
lpc24xx_region_heap_0_begin = ORIGIN (RAM_ETH);
lpc24xx_region_heap_0_size = LENGTH (RAM_ETH);
lpc24xx_region_heap_0_end = lpc24xx_region_heap_0_begin + lpc24xx_region_heap_0_size;
lpc24xx_region_heap_1_begin = ORIGIN (RAM_USB);
lpc24xx_region_heap_1_size = LENGTH (RAM_USB);
lpc24xx_region_heap_1_end = lpc24xx_region_heap_1_begin + lpc24xx_region_heap_1_size;
INCLUDE linkcmds.base INCLUDE linkcmds.base

8
c/src/lib/libbsp/arm/lpc32xx/ChangeLog
View File

@@ -1,3 +1,11 @@
2010-04-09 Sebastian Huber <sebastian.huber@embedded-brains.de>
* console/hsu.c: New file.
* Makefile.am, configure.ac, preinstall.am, console/console-config.c,
include/bsp.h, include/bspopts.h.in, include/lpc-clock-config.h,
include/lpc-ethernet-config.h, include/lpc32xx.h, include/mmu.h,
startup/bspstart.c, startup/bspstarthooks.c: Changes throughout.
2010-03-03 Sebastian Huber <sebastian.huber@embedded-brains.de> 2010-03-03 Sebastian Huber <sebastian.huber@embedded-brains.de>
* README, include/lpc32xx.h, irq/irq.c, startup/bspstarthooks.c: * README, include/lpc32xx.h, irq/irq.c, startup/bspstarthooks.c:

11
c/src/lib/libbsp/arm/lpc32xx/Makefile.am
View File

@@ -37,6 +37,7 @@ include_bsp_HEADERS += ../../shared/tod.h
include_bsp_HEADERS += ../shared/include/linker-symbols.h include_bsp_HEADERS += ../shared/include/linker-symbols.h
include_bsp_HEADERS += ../shared/include/start.h include_bsp_HEADERS += ../shared/include/start.h
include_bsp_HEADERS += ../shared/lpc/include/lpc-timer.h include_bsp_HEADERS += ../shared/lpc/include/lpc-timer.h
include_bsp_HEADERS += ../shared/lpc/include/lpc-dma.h
include_bsp_HEADERS += include/irq-config.h include_bsp_HEADERS += include/irq-config.h
include_bsp_HEADERS += include/irq.h include_bsp_HEADERS += include/irq.h
include_bsp_HEADERS += include/mmu.h include_bsp_HEADERS += include/mmu.h
@@ -99,7 +100,8 @@ libbsp_a_SOURCES += ../../shared/src/irq-generic.c \
# Console # Console
libbsp_a_SOURCES += ../../shared/console.c \ libbsp_a_SOURCES += ../../shared/console.c \
console/console-config.c console/console-config.c \
console/hsu.c
# Clock # Clock
libbsp_a_SOURCES += ../shared/lpc/clock/lpc-clock-config.c \ libbsp_a_SOURCES += ../shared/lpc/clock/lpc-clock-config.c \
@@ -121,13 +123,8 @@ libbsp_a_SOURCES += ../../../libcpu/shared/src/cache_manager.c \
../../../libcpu/arm/shared/cache/cache_.h ../../../libcpu/arm/shared/cache/cache_.h
libbsp_a_CPPFLAGS += -I$(srcdir)/../../../libcpu/arm/shared/include libbsp_a_CPPFLAGS += -I$(srcdir)/../../../libcpu/arm/shared/include
# Start hooks (FIXME: This is brittle.) # Start hooks
libbsp_a_SOURCES += startup/bspstarthooks.c libbsp_a_SOURCES += startup/bspstarthooks.c
libbsp_a-bspstarthooks.o: startup/bspstarthooks.c
$(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(libbsp_a_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS:-mthumb=) \
-MT libbsp_a-bspstarthooks.o -MD -MP -MF $(DEPDIR)/libbsp_a-bspstarthooks.Tpo -c -o libbsp_a-bspstarthooks.o \
`test -f 'startup/bspstarthooks.c' || echo '$(srcdir)/'`startup/bspstarthooks.c
$(am__mv) $(DEPDIR)/libbsp_a-bspstarthooks.Tpo $(DEPDIR)/libbsp_a-bspstarthooks.Po
############################################################################### ###############################################################################
# Network # # Network #

19
c/src/lib/libbsp/arm/lpc32xx/configure.ac
View File

@@ -33,11 +33,20 @@ RTEMS_BSPOPTS_HELP([LPC32XX_ARM_CLK],[ARM clock in Hz])
RTEMS_BSPOPTS_SET([LPC32XX_HCLK],[*],[104000000U]) RTEMS_BSPOPTS_SET([LPC32XX_HCLK],[*],[104000000U])
RTEMS_BSPOPTS_HELP([LPC32XX_HCLK],[AHB bus clock in Hz]) RTEMS_BSPOPTS_HELP([LPC32XX_HCLK],[AHB bus clock in Hz])
RTEMS_BSPOPTS_SET([LPC32XX_PERIPH_CLK],[*],[13000000U])
RTEMS_BSPOPTS_HELP([LPC32XX_PERIPH_CLK],[peripheral clock in Hz])
RTEMS_BSPOPTS_SET([LPC32XX_ETHERNET_RMII],[*],[1]) RTEMS_BSPOPTS_SET([LPC32XX_ETHERNET_RMII],[*],[1])
RTEMS_BSPOPTS_HELP([LPC32XX_ETHERNET_RMII],[enable RMII for Ethernet]) RTEMS_BSPOPTS_HELP([LPC32XX_ETHERNET_RMII],[enable RMII for Ethernet])
RTEMS_BSPOPTS_SET([LPC32XX_PERIPH_CLK],[*],[13000000U]) RTEMS_BSPOPTS_SET([LPC32XX_UART_1_BAUD],[*],[])
RTEMS_BSPOPTS_HELP([LPC32XX_PERIPH_CLK],[peripheral clock in Hz]) RTEMS_BSPOPTS_HELP([LPC32XX_UART_1_BAUD],[baud for UART 1])
RTEMS_BSPOPTS_SET([LPC32XX_UART_2_BAUD],[*],[])
RTEMS_BSPOPTS_HELP([LPC32XX_UART_2_BAUD],[baud for UART 2])
RTEMS_BSPOPTS_SET([LPC32XX_UART_7_BAUD],[*],[])
RTEMS_BSPOPTS_HELP([LPC32XX_UART_7_BAUD],[baud for UART 7])
RTEMS_BSPOPTS_SET([LPC32XX_CONFIG_U3CLK],[*],[]) RTEMS_BSPOPTS_SET([LPC32XX_CONFIG_U3CLK],[*],[])
RTEMS_BSPOPTS_HELP([LPC32XX_CONFIG_U3CLK],[clock configuration for UART 3]) RTEMS_BSPOPTS_HELP([LPC32XX_CONFIG_U3CLK],[clock configuration for UART 3])
@@ -54,6 +63,12 @@ RTEMS_BSPOPTS_HELP([LPC32XX_CONFIG_U6CLK],[clock configuration for UART 6])
RTEMS_BSPOPTS_SET([LPC32XX_CONFIG_UART_CLKMODE],[*],[0x00000200U]) RTEMS_BSPOPTS_SET([LPC32XX_CONFIG_UART_CLKMODE],[*],[0x00000200U])
RTEMS_BSPOPTS_HELP([LPC32XX_CONFIG_UART_CLKMODE],[clock mode configuration for UARTs]) RTEMS_BSPOPTS_HELP([LPC32XX_CONFIG_UART_CLKMODE],[clock mode configuration for UARTs])
RTEMS_BSPOPTS_SET([LPC32XX_DISABLE_READ_WRITE_DATA_CACHE],[*],[])
RTEMS_BSPOPTS_HELP([LPC32XX_DISABLE_READ_WRITE_DATA_CACHE],[disable cache for read-write data sections])
RTEMS_BSPOPTS_SET([LPC32XX_DISABLE_READ_ONLY_PROTECTION],[*],[])
RTEMS_BSPOPTS_HELP([LPC32XX_DISABLE_READ_ONLY_PROTECTION],[disable MMU protection of read-only sections])
RTEMS_BSPOPTS_SET([BSP_START_RESET_VECTOR],[*],[]) RTEMS_BSPOPTS_SET([BSP_START_RESET_VECTOR],[*],[])
RTEMS_BSPOPTS_HELP([BSP_START_RESET_VECTOR],[reset vector address for BSP start]) RTEMS_BSPOPTS_HELP([BSP_START_RESET_VECTOR],[reset vector address for BSP start])

65
c/src/lib/libbsp/arm/lpc32xx/console/console-config.c
View File

@@ -26,6 +26,8 @@
#include <bsp/lpc32xx.h> #include <bsp/lpc32xx.h>
#include <bsp/irq.h> #include <bsp/irq.h>
extern console_fns lpc32xx_hsu_fns;
static uint8_t lpc32xx_uart_get_register(uint32_t addr, uint8_t i) static uint8_t lpc32xx_uart_get_register(uint32_t addr, uint8_t i)
{ {
volatile uint32_t *reg = (volatile uint32_t *) addr; volatile uint32_t *reg = (volatile uint32_t *) addr;
@@ -129,6 +131,69 @@ console_tbl Console_Port_Tbl [] = {
.ulIntVector = LPC32XX_IRQ_UART_6 .ulIntVector = LPC32XX_IRQ_UART_6
}, },
#endif #endif
#ifdef LPC32XX_UART_1_BAUD
{
.sDeviceName = "/dev/ttyS1",
.deviceType = SERIAL_CUSTOM,
.pDeviceFns = &lpc32xx_hsu_fns,
.deviceProbe = NULL,
.pDeviceFlow = NULL,
.ulMargin = 16,
.ulHysteresis = 8,
.pDeviceParams = (void *) LPC32XX_UART_1_BAUD,
.ulCtrlPort1 = LPC32XX_BASE_UART_1,
.ulCtrlPort2 = 0,
.ulDataPort = 0,
.getRegister = NULL,
.setRegister = NULL,
.getData = NULL,
.setData = NULL,
.ulClock = 16,
.ulIntVector = LPC32XX_IRQ_UART_1
},
#endif
#ifdef LPC32XX_UART_2_BAUD
{
.sDeviceName = "/dev/ttyS2",
.deviceType = SERIAL_CUSTOM,
.pDeviceFns = &lpc32xx_hsu_fns,
.deviceProbe = NULL,
.pDeviceFlow = NULL,
.ulMargin = 16,
.ulHysteresis = 8,
.pDeviceParams = (void *) LPC32XX_UART_2_BAUD,
.ulCtrlPort1 = LPC32XX_BASE_UART_2,
.ulCtrlPort2 = 0,
.ulDataPort = 0,
.getRegister = NULL,
.setRegister = NULL,
.getData = NULL,
.setData = NULL,
.ulClock = 16,
.ulIntVector = LPC32XX_IRQ_UART_2
},
#endif
#ifdef LPC32XX_UART_7_BAUD
{
.sDeviceName = "/dev/ttyS7",
.deviceType = SERIAL_CUSTOM,
.pDeviceFns = &lpc32xx_hsu_fns,
.deviceProbe = NULL,
.pDeviceFlow = NULL,
.ulMargin = 16,
.ulHysteresis = 8,
.pDeviceParams = (void *) LPC32XX_UART_7_BAUD,
.ulCtrlPort1 = LPC32XX_BASE_UART_7,
.ulCtrlPort2 = 0,
.ulDataPort = 0,
.getRegister = NULL,
.setRegister = NULL,
.getData = NULL,
.setData = NULL,
.ulClock = 16,
.ulIntVector = LPC32XX_IRQ_UART_7
},
#endif
}; };
#define LPC32XX_UART_COUNT \ #define LPC32XX_UART_COUNT \

202
c/src/lib/libbsp/arm/lpc32xx/console/hsu.c Normal file
View File

@@ -0,0 +1,202 @@
/**
* @file
*
* @ingroup lpc32xx
*
* @brief High speed UART driver (14-clock).
*/
/*
* Copyright (c) 2010
* embedded brains GmbH
* Obere Lagerstr. 30
* D-82178 Puchheim
* Germany
* <rtems@embedded-brains.de>
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
*/
#include <rtems.h>
#include <rtems/libio.h>
#include <rtems/termiostypes.h>
#include <libchip/serial.h>
#include <libchip/sersupp.h>
#include <bsp.h>
#include <bsp/lpc32xx.h>
#include <bsp/irq.h>
typedef struct {
uint32_t fifo;
uint32_t level;
uint32_t iir;
uint32_t ctrl;
uint32_t rate;
} lpc32xx_hsu;
#define HSU_FIFO_SIZE 64
#define HSU_LEVEL_RX_MASK 0xffU
#define HSU_LEVEL_TX_MASK 0xff00U
#define HSU_LEVEL_TX_SHIFT 8
#define HSU_RX_DATA_MASK 0xffU
#define HSU_RX_EMPTY (1U << 8)
#define HSU_RX_ERROR (1U << 9)
#define HSU_RX_BREAK (1U << 10)
#define HSU_IIR_TX (1U << 0)
#define HSU_IIR_RX_TRIG (1U << 1)
#define HSU_IIR_RX_TIMEOUT (1U << 2)
#define HSU_CTRL_INTR_DISABLED 0x1280fU
#define HSU_CTRL_RX_INTR_ENABLED 0x1284fU
#define HSU_CTRL_RX_AND_TX_INTR_ENABLED 0x1286fU
/* We are interested in RX timeout, RX trigger and TX trigger interrupts */
#define HSU_IIR_MASK 0x7U
static int lpc32xx_hsu_first_open(int major, int minor, void *arg)
{
rtems_libio_open_close_args_t *oca = arg;
struct rtems_termios_tty *tty = oca->iop->data1;
console_tbl *ct = &Console_Port_Tbl [minor];
console_data *cd = &Console_Port_Data [minor];
volatile lpc32xx_hsu *hsu = (volatile lpc32xx_hsu *) ct->ulCtrlPort1;
cd->termios_data = tty;
rtems_termios_set_initial_baud(tty, (int32_t) ct->pDeviceParams);
hsu->ctrl = HSU_CTRL_RX_INTR_ENABLED;
return 0;
}
static int lpc32xx_hsu_write(int minor, const char *buf, int len)
{
console_tbl *ct = &Console_Port_Tbl [minor];
console_data *cd = &Console_Port_Data [minor];
volatile lpc32xx_hsu *hsu = (volatile lpc32xx_hsu *) ct->ulCtrlPort1;
int tx_level = (hsu->level & HSU_LEVEL_TX_MASK) >> HSU_LEVEL_TX_SHIFT;
int tx_free = HSU_FIFO_SIZE - tx_level;
int i = 0;
int out = len > tx_free ? tx_free : len;
for (i = 0; i < out; ++i) {
hsu->fifo = buf [i];
}
if (len > 0) {
cd->pDeviceContext = (void *) out;
cd->bActive = true;
hsu->ctrl = HSU_CTRL_RX_AND_TX_INTR_ENABLED;
}
return 0;
}
static void lpc32xx_hsu_interrupt_handler(void *arg)
{
int minor = (int) arg;
console_tbl *ct = &Console_Port_Tbl [minor];
console_data *cd = &Console_Port_Data [minor];
volatile lpc32xx_hsu *hsu = (volatile lpc32xx_hsu *) ct->ulCtrlPort1;
/* Iterate until no more interrupts are pending */
do {
int chars_to_dequeue = (int) cd->pDeviceContext;
int rv = 0;
int i = 0;
char buf [HSU_FIFO_SIZE];
/* Enqueue received characters */
while (i < HSU_FIFO_SIZE) {
uint32_t in = hsu->fifo;
if ((in & HSU_RX_EMPTY) == 0) {
if ((in & HSU_RX_BREAK) == 0) {
buf [i] = in & HSU_RX_DATA_MASK;
++i;
}
} else {
break;
}
}
rtems_termios_enqueue_raw_characters(cd->termios_data, buf, i);
/* Dequeue transmitted characters */
cd->pDeviceContext = 0;
rv = rtems_termios_dequeue_characters(cd->termios_data, chars_to_dequeue);
if (rv == 0) {
/* Nothing to transmit */
cd->bActive = false;
hsu->ctrl = HSU_CTRL_RX_INTR_ENABLED;
hsu->iir = HSU_IIR_TX;
}
} while ((hsu->iir & HSU_IIR_MASK) != 0);
}
static void lpc32xx_hsu_initialize(int minor)
{
console_tbl *ct = &Console_Port_Tbl [minor];
console_data *cd = &Console_Port_Data [minor];
volatile lpc32xx_hsu *hsu = (volatile lpc32xx_hsu *) ct->ulCtrlPort1;
hsu->ctrl = HSU_CTRL_INTR_DISABLED;
cd->bActive = false;
cd->pDeviceContext = 0;
/* Drain FIFOs */
while (hsu->level != 0) {
hsu->fifo;
}
rtems_interrupt_handler_install(
ct->ulIntVector,
"HSU",
RTEMS_INTERRUPT_UNIQUE,
lpc32xx_hsu_interrupt_handler,
(void *) minor
);
}
static int lpc32xx_hsu_set_attributes(int minor, const struct termios *term)
{
console_tbl *ct = &Console_Port_Tbl [minor];
volatile lpc32xx_hsu *hsu = (volatile lpc32xx_hsu *) ct->ulCtrlPort1;
int baud_flags = term->c_cflag & CBAUD;
if (baud_flags != 0) {
int32_t baud = rtems_termios_baud_to_number(baud_flags);
if (baud > 0) {
uint32_t baud_divisor = 14 * (uint32_t) baud;
uint32_t rate = LPC32XX_PERIPH_CLK / baud_divisor;
uint32_t remainder = LPC32XX_PERIPH_CLK - rate * baud_divisor;
if (2 * remainder >= baud_divisor) {
++rate;
}
hsu->rate = rate - 1;
}
}
return 0;
}
console_fns lpc32xx_hsu_fns = {
.deviceProbe = libchip_serial_default_probe,
.deviceFirstOpen = lpc32xx_hsu_first_open,
.deviceLastClose = NULL,
.deviceRead = NULL,
.deviceWrite = lpc32xx_hsu_write,
.deviceInitialize = lpc32xx_hsu_initialize,
.deviceWritePolled = NULL,
.deviceSetAttributes = lpc32xx_hsu_set_attributes,
.deviceOutputUsesInterrupts = true
};

20
c/src/lib/libbsp/arm/lpc32xx/include/bsp.h
View File

@@ -28,6 +28,9 @@
#include <rtems/console.h> #include <rtems/console.h>
#include <rtems/clockdrv.h> #include <rtems/clockdrv.h>
#include <bsp/lpc32xx.h>
#include <bsp/lpc-timer.h>
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif /* __cplusplus */ #endif /* __cplusplus */
@@ -88,8 +91,25 @@ int lpc_eth_attach_detach(
*/ */
void *lpc32xx_idle(uintptr_t ignored); void *lpc32xx_idle(uintptr_t ignored);
#define LPC32XX_STANDARD_TIMER ((volatile lpc_timer *) LPC32XX_BASE_TIMER_1)
static inline unsigned lpc32xx_timer(void)
{
volatile lpc_timer *timer = LPC32XX_STANDARD_TIMER;
return timer->tc;
}
/** @} */ /** @} */
/**
* @defgroup lpc LPC Support
*
* @ingroup lpc32xx
*
* @brief LPC support package.
*/
#endif /* ASM */ #endif /* ASM */
#ifdef __cplusplus #ifdef __cplusplus

15
c/src/lib/libbsp/arm/lpc32xx/include/bspopts.h.in
View File

@@ -33,6 +33,12 @@
/* clock mode configuration for UARTs */ /* clock mode configuration for UARTs */
#undef LPC32XX_CONFIG_UART_CLKMODE #undef LPC32XX_CONFIG_UART_CLKMODE
/* disable MMU protection of read-only sections */
#undef LPC32XX_DISABLE_READ_ONLY_PROTECTION
/* disable cache for read-write data sections */
#undef LPC32XX_DISABLE_READ_WRITE_DATA_CACHE
/* enable RMII for Ethernet */ /* enable RMII for Ethernet */
#undef LPC32XX_ETHERNET_RMII #undef LPC32XX_ETHERNET_RMII
@@ -48,6 +54,15 @@
/* peripheral clock in Hz */ /* peripheral clock in Hz */
#undef LPC32XX_PERIPH_CLK #undef LPC32XX_PERIPH_CLK
/* baud for UART 1 */
#undef LPC32XX_UART_1_BAUD
/* baud for UART 2 */
#undef LPC32XX_UART_2_BAUD
/* baud for UART 7 */
#undef LPC32XX_UART_7_BAUD
/* Define to the address where bug reports for this package should be sent. */ /* Define to the address where bug reports for this package should be sent. */
#undef PACKAGE_BUGREPORT #undef PACKAGE_BUGREPORT

14
c/src/lib/libbsp/arm/lpc32xx/include/lpc-clock-config.h
View File

@@ -1,7 +1,7 @@
/** /**
* @file * @file
* *
* @ingroup lpc32xx * @ingroup lpc_clock
* *
* @brief Clock driver configuration. * @brief Clock driver configuration.
*/ */
@@ -30,6 +30,16 @@
extern "C" { extern "C" {
#endif /* __cplusplus */ #endif /* __cplusplus */
/**
* @defgroup lpc_clock Clock Support
*
* @ingroup lpc
*
* @brief Clock support.
*
* @{
*/
#define LPC_CLOCK_INTERRUPT LPC32XX_IRQ_TIMER_0 #define LPC_CLOCK_INTERRUPT LPC32XX_IRQ_TIMER_0
#define LPC_CLOCK_TIMER_BASE LPC32XX_BASE_TIMER_0 #define LPC_CLOCK_TIMER_BASE LPC32XX_BASE_TIMER_0
@@ -38,6 +48,8 @@ extern "C" {
#define LPC_CLOCK_MODULE_ENABLE() #define LPC_CLOCK_MODULE_ENABLE()
/** @} */
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif /* __cplusplus */ #endif /* __cplusplus */

14
c/src/lib/libbsp/arm/lpc32xx/include/lpc-ethernet-config.h
View File

@@ -1,7 +1,7 @@
/** /**
* @file * @file
* *
* @ingroup lpc32xx * @ingroup lpc_eth
* *
* @brief Ethernet driver configuration. * @brief Ethernet driver configuration.
*/ */
@@ -35,6 +35,16 @@
extern "C" { extern "C" {
#endif /* __cplusplus */ #endif /* __cplusplus */
/**
* @defgroup lpc_eth Ethernet Support
*
* @ingroup lpc
*
* @brief Ethernet support.
*
* @{
*/
#define LPC_ETH_CONFIG_INTERRUPT LPC32XX_IRQ_ETHERNET #define LPC_ETH_CONFIG_INTERRUPT LPC32XX_IRQ_ETHERNET
#define LPC_ETH_CONFIG_REG_BASE LPC32XX_BASE_ETHERNET #define LPC_ETH_CONFIG_REG_BASE LPC32XX_BASE_ETHERNET
@@ -74,6 +84,8 @@ static void lpc_eth_config_free_table_area(char *table_area)
free(table_area, (int) 0xdeadbeef); free(table_area, (int) 0xdeadbeef);
} }
/** @} */
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif /* __cplusplus */ #endif /* __cplusplus */

101
c/src/lib/libbsp/arm/lpc32xx/include/lpc32xx.h
View File

@@ -1,7 +1,7 @@
/** /**
* @file * @file
* *
* @ingroup lpc32xx * @ingroup lpc32xx_reg
* *
* @brief Register base addresses. * @brief Register base addresses.
*/ */
@@ -22,6 +22,22 @@
#ifndef LIBBSP_ARM_LPC32XX_LPC32XX_H #ifndef LIBBSP_ARM_LPC32XX_LPC32XX_H
#define LIBBSP_ARM_LPC32XX_LPC32XX_H #define LIBBSP_ARM_LPC32XX_LPC32XX_H
/**
* @defgroup lpc32xx_reg Register Definitions
*
* @ingroup lpc32xx
*
* @brief Register definitions.
*
* @{
*/
/**
* @name Register Base Addresses
*
* @{
*/
#define LPC32XX_BASE_ADC 0x40048000 #define LPC32XX_BASE_ADC 0x40048000
#define LPC32XX_BASE_SYSCON 0x40004000 #define LPC32XX_BASE_SYSCON 0x40004000
#define LPC32XX_BASE_DEBUG_CTRL 0x40040000 #define LPC32XX_BASE_DEBUG_CTRL 0x40040000
@@ -81,6 +97,14 @@
#define LPC32XX_BASE_USB_OTG_I2C 0x31020300 #define LPC32XX_BASE_USB_OTG_I2C 0x31020300
#define LPC32XX_BASE_WDT 0x4003c000 #define LPC32XX_BASE_WDT 0x4003c000
/** @} */
/**
* @name Miscanellanous Registers
*
* @{
*/
#define LPC32XX_U3CLK (*(volatile uint32_t *) 0x400040d0) #define LPC32XX_U3CLK (*(volatile uint32_t *) 0x400040d0)
#define LPC32XX_U4CLK (*(volatile uint32_t *) 0x400040d4) #define LPC32XX_U4CLK (*(volatile uint32_t *) 0x400040d4)
#define LPC32XX_U5CLK (*(volatile uint32_t *) 0x400040d8) #define LPC32XX_U5CLK (*(volatile uint32_t *) 0x400040d8)
@@ -91,7 +115,6 @@
#define LPC32XX_UART_LOOP (*(volatile uint32_t *) 0x40054008) #define LPC32XX_UART_LOOP (*(volatile uint32_t *) 0x40054008)
#define LPC32XX_SW_INT (*(volatile uint32_t *) 0x400040a8) #define LPC32XX_SW_INT (*(volatile uint32_t *) 0x400040a8)
#define LPC32XX_MAC_CLK_CTRL (*(volatile uint32_t *) 0x40004090) #define LPC32XX_MAC_CLK_CTRL (*(volatile uint32_t *) 0x40004090)
#define LPC32XX_USB_CTRL (*(volatile uint32_t *) 0x40004064)
#define LPC32XX_USB_DIV (*(volatile uint32_t *) 0x4000401c) #define LPC32XX_USB_DIV (*(volatile uint32_t *) 0x4000401c)
#define LPC32XX_OTG_CLK_CTRL (*(volatile uint32_t *) 0x31020ff4) #define LPC32XX_OTG_CLK_CTRL (*(volatile uint32_t *) 0x31020ff4)
#define LPC32XX_OTG_CLK_STAT (*(volatile uint32_t *) 0x31020ff8) #define LPC32XX_OTG_CLK_STAT (*(volatile uint32_t *) 0x31020ff8)
@@ -102,5 +125,79 @@
#define LPC32XX_I2C_CTL (*(volatile uint32_t *) 0x31020308) #define LPC32XX_I2C_CTL (*(volatile uint32_t *) 0x31020308)
#define LPC32XX_I2C_CLKHI (*(volatile uint32_t *) 0x3102030c) #define LPC32XX_I2C_CLKHI (*(volatile uint32_t *) 0x3102030c)
#define LPC32XX_I2C_CLKLO (*(volatile uint32_t *) 0x31020310) #define LPC32XX_I2C_CLKLO (*(volatile uint32_t *) 0x31020310)
#define LPC32XX_PWR_CTRL (*(volatile uint32_t *) 0x40004044)
#define LPC32XX_OSC_CTRL (*(volatile uint32_t *) 0x4000404c)
#define LPC32XX_SYSCLK_CTRL (*(volatile uint32_t *) 0x40004050)
#define LPC32XX_PLL397_CTRL (*(volatile uint32_t *) 0x40004048)
#define LPC32XX_HCLKPLL_CTRL (*(volatile uint32_t *) 0x40004058)
#define LPC32XX_HCLKDIV_CTRL (*(volatile uint32_t *) 0x40004040)
#define LPC32XX_TEST_CLK (*(volatile uint32_t *) 0x400040a4)
#define LPC32XX_AUTOCLK_CTRL (*(volatile uint32_t *) 0x400040ec)
#define LPC32XX_START_ER_PIN (*(volatile uint32_t *) 0x40004030)
#define LPC32XX_START_ER_INT (*(volatile uint32_t *) 0x40004020)
#define LPC32XX_P0_INTR_ER (*(volatile uint32_t *) 0x40004018)
#define LPC32XX_START_SR_PIN (*(volatile uint32_t *) 0x40004038)
#define LPC32XX_START_SR_INT (*(volatile uint32_t *) 0x40004028)
#define LPC32XX_START_RSR_PIN (*(volatile uint32_t *) 0x40004034)
#define LPC32XX_START_RSR_INT (*(volatile uint32_t *) 0x40004024)
#define LPC32XX_START_APR_PIN (*(volatile uint32_t *) 0x4000403c)
#define LPC32XX_START_APR_INT (*(volatile uint32_t *) 0x4000402c)
#define LPC32XX_USB_CTRL (*(volatile uint32_t *) 0x40004064)
#define LPC32XX_USBDIV_CTRL (*(volatile uint32_t *) 0x4000401c)
#define LPC32XX_MS_CTRL (*(volatile uint32_t *) 0x40004080)
#define LPC32XX_DMACLK_CTRL (*(volatile uint32_t *) 0x400040e8)
#define LPC32XX_FLASHCLK_CTRL (*(volatile uint32_t *) 0x400040c8)
#define LPC32XX_MACCLK_CTRL (*(volatile uint32_t *) 0x40004090)
#define LPC32XX_LCDCLK_CTRL (*(volatile uint32_t *) 0x40004054)
#define LPC32XX_I2S_CTRL (*(volatile uint32_t *) 0x4000407c)
#define LPC32XX_SSP_CTRL (*(volatile uint32_t *) 0x40004078)
#define LPC32XX_SPI_CTRL (*(volatile uint32_t *) 0x400040c4)
#define LPC32XX_I2CCLK_CTRL (*(volatile uint32_t *) 0x400040ac)
#define LPC32XX_TIMCLK_CTRL1 (*(volatile uint32_t *) 0x400040c0)
#define LPC32XX_TIMCLK_CTRL (*(volatile uint32_t *) 0x400040bc)
#define LPC32XX_ADCLK_CTRL (*(volatile uint32_t *) 0x400040b4)
#define LPC32XX_ADCLK_CTRL1 (*(volatile uint32_t *) 0x40004060)
#define LPC32XX_KEYCLK_CTRL (*(volatile uint32_t *) 0x400040b0)
#define LPC32XX_PWMCLK_CTRL (*(volatile uint32_t *) 0x400040b8)
#define LPC32XX_UARTCLK_CTRL (*(volatile uint32_t *) 0x400040e4)
#define LPC32XX_POS0_IRAM_CTRl (*(volatile uint32_t *) 0x40004110)
#define LPC32XX_POS1_IRAM_CTRl (*(volatile uint32_t *) 0x40004114)
/** @} */
/**
* @name GPIO Registers
*
* @{
*/
#define LPC32XX_P0_INP_STATE (*(volatile uint32_t *) 0x40028040)
#define LPC32XX_P0_OUTP_SET (*(volatile uint32_t *) 0x40028044)
#define LPC32XX_P0_OUTP_CLR (*(volatile uint32_t *) 0x40028048)
#define LPC32XX_P0_DIR_SET (*(volatile uint32_t *) 0x40028050)
#define LPC32XX_P0_DIR_CLR (*(volatile uint32_t *) 0x40028054)
#define LPC32XX_P0_DIR_STATE (*(volatile uint32_t *) 0x40028058)
#define LPC32XX_P0_OUTP_STATE (*(volatile uint32_t *) 0x4002804c)
#define LPC32XX_P1_INP_STATE (*(volatile uint32_t *) 0x40028060)
#define LPC32XX_P1_OUTP_SET (*(volatile uint32_t *) 0x40028064)
#define LPC32XX_P1_OUTP_CLR (*(volatile uint32_t *) 0x40028068)
#define LPC32XX_P1_DIR_SET (*(volatile uint32_t *) 0x40028070)
#define LPC32XX_P1_DIR_CLR (*(volatile uint32_t *) 0x40028074)
#define LPC32XX_P1_DIR_STATE (*(volatile uint32_t *) 0x40028078)
#define LPC32XX_P1_OUTP_STATE (*(volatile uint32_t *) 0x4002806c)
#define LPC32XX_P2_INP_STATE (*(volatile uint32_t *) 0x4002801c)
#define LPC32XX_P2_OUTP_SET (*(volatile uint32_t *) 0x40028020)
#define LPC32XX_P2_OUTP_CLR (*(volatile uint32_t *) 0x40028024)
#define LPC32XX_P2_DIR_SET (*(volatile uint32_t *) 0x40028010)
#define LPC32XX_P2_DIR_CLR (*(volatile uint32_t *) 0x40028014)
#define LPC32XX_P2_DIR_STATE (*(volatile uint32_t *) 0x40028018)
#define LPC32XX_P3_INP_STATE (*(volatile uint32_t *) 0x40028000)
#define LPC32XX_P3_OUTP_SET (*(volatile uint32_t *) 0x40028004)
#define LPC32XX_P3_OUTP_CLR (*(volatile uint32_t *) 0x40028008)
#define LPC32XX_P3_OUTP_STATE (*(volatile uint32_t *) 0x4002800c)
/** @} */
/** @} */
#endif /* LIBBSP_ARM_LPC32XX_LPC32XX_H */ #endif /* LIBBSP_ARM_LPC32XX_LPC32XX_H */

14
c/src/lib/libbsp/arm/lpc32xx/include/mmu.h
View File

@@ -1,7 +1,7 @@
/** /**
* @file * @file
* *
* @ingroup lpc32xx * @ingroup lpc32xx_mmu
* *
* @brief MMU API. * @brief MMU API.
*/ */
@@ -28,6 +28,16 @@
extern "C" { extern "C" {
#endif /* __cplusplus */ #endif /* __cplusplus */
/**
* @defgroup lpc32xx_mmu MMU Support
*
* @ingroup lpc32xx
*
* @brief MMU support.
*
* @{
*/
#define LPC32XX_MMU_CLIENT_DOMAIN 15U #define LPC32XX_MMU_CLIENT_DOMAIN 15U
#define LPC32XX_MMU_READ_ONLY \ #define LPC32XX_MMU_READ_ONLY \
@@ -45,6 +55,8 @@ extern "C" {
#define LPC32XX_MMU_READ_WRITE_CACHED \ #define LPC32XX_MMU_READ_WRITE_CACHED \
(LPC32XX_MMU_READ_WRITE | ARM_MMU_SECT_C | ARM_MMU_SECT_B) (LPC32XX_MMU_READ_WRITE | ARM_MMU_SECT_C | ARM_MMU_SECT_B)
/** @} */
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif /* __cplusplus */ #endif /* __cplusplus */

4
c/src/lib/libbsp/arm/lpc32xx/preinstall.am
View File

@@ -94,6 +94,10 @@ $(PROJECT_INCLUDE)/bsp/lpc-timer.h: ../shared/lpc/include/lpc-timer.h $(PROJECT_
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/lpc-timer.h $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/lpc-timer.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/lpc-timer.h PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/lpc-timer.h
$(PROJECT_INCLUDE)/bsp/lpc-dma.h: ../shared/lpc/include/lpc-dma.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/lpc-dma.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/lpc-dma.h
$(PROJECT_INCLUDE)/bsp/irq-config.h: include/irq-config.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) $(PROJECT_INCLUDE)/bsp/irq-config.h: include/irq-config.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-config.h $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-config.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-config.h PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-config.h

38
c/src/lib/libbsp/arm/lpc32xx/startup/bspstart.c
View File

@@ -43,18 +43,39 @@
#define CONSOLE_FDR (*(volatile uint32_t *) (LPC32XX_BASE_UART_5 + 0x28)) #define CONSOLE_FDR (*(volatile uint32_t *) (LPC32XX_BASE_UART_5 + 0x28))
#define CONSOLE_TER (*(volatile uint32_t *) (LPC32XX_BASE_UART_5 + 0x30)) #define CONSOLE_TER (*(volatile uint32_t *) (LPC32XX_BASE_UART_5 + 0x30))
static void lpc32xx_timer_initialize(void)
{
volatile lpc_timer *timer = LPC32XX_STANDARD_TIMER;
LPC32XX_TIMCLK_CTRL1 = (1U << 2) | (1U << 3);
timer->tcr = LPC_TIMER_TCR_RST;
timer->ctcr = 0x0;
timer->pr = 0x0;
timer->ir = 0xff;
timer->mcr = 0x0;
timer->ccr = 0x0;
timer->tcr = LPC_TIMER_TCR_EN;
}
void bsp_start(void) void bsp_start(void)
{ {
uint32_t uartclk_ctrl = 0;
#ifdef LPC32XX_CONFIG_U3CLK #ifdef LPC32XX_CONFIG_U3CLK
uartclk_ctrl |= 1U << 0;
LPC32XX_U3CLK = LPC32XX_CONFIG_U3CLK; LPC32XX_U3CLK = LPC32XX_CONFIG_U3CLK;
#endif #endif
#ifdef LPC32XX_CONFIG_U4CLK #ifdef LPC32XX_CONFIG_U4CLK
uartclk_ctrl |= 1U << 1;
LPC32XX_U4CLK = LPC32XX_CONFIG_U4CLK; LPC32XX_U4CLK = LPC32XX_CONFIG_U4CLK;
#endif #endif
#ifdef LPC32XX_CONFIG_U5CLK #ifdef LPC32XX_CONFIG_U5CLK
uartclk_ctrl |= 1U << 2;
LPC32XX_U5CLK = LPC32XX_CONFIG_U5CLK; LPC32XX_U5CLK = LPC32XX_CONFIG_U5CLK;
#endif #endif
#ifdef LPC32XX_CONFIG_U6CLK #ifdef LPC32XX_CONFIG_U6CLK
uartclk_ctrl |= 1U << 3;
LPC32XX_U6CLK = LPC32XX_CONFIG_U6CLK; LPC32XX_U6CLK = LPC32XX_CONFIG_U6CLK;
#endif #endif
@@ -62,6 +83,7 @@ void bsp_start(void)
LPC32XX_UART_CLKMODE = LPC32XX_CONFIG_UART_CLKMODE; LPC32XX_UART_CLKMODE = LPC32XX_CONFIG_UART_CLKMODE;
#endif #endif
LPC32XX_UARTCLK_CTRL = uartclk_ctrl;
LPC32XX_UART_CTRL = 0x0; LPC32XX_UART_CTRL = 0x0;
LPC32XX_UART_LOOP = 0x0; LPC32XX_UART_LOOP = 0x0;
@@ -74,28 +96,16 @@ void bsp_start(void)
CONSOLE_LCR = 0x3; CONSOLE_LCR = 0x3;
CONSOLE_FCR = 0x7; CONSOLE_FCR = 0x7;
#if 0
/* FIXME */
printk("LPC32XX_U3CLK %08x\n", LPC32XX_U3CLK);
printk("LPC32XX_U4CLK %08x\n", LPC32XX_U4CLK);
printk("LPC32XX_U5CLK %08x\n", LPC32XX_U5CLK);
printk("LPC32XX_U6CLK %08x\n", LPC32XX_U6CLK);
printk("LPC32XX_IRDACLK %08x\n", LPC32XX_IRDACLK);
printk("LPC32XX_UART_CTRL %08x\n", LPC32XX_UART_CTRL);
printk("LPC32XX_UART_CLKMODE %08x\n", LPC32XX_UART_CLKMODE);
printk("LPC32XX_UART_LOOP %08x\n", LPC32XX_UART_LOOP);
#endif
/* Interrupts */
if (bsp_interrupt_initialize() != RTEMS_SUCCESSFUL) { if (bsp_interrupt_initialize() != RTEMS_SUCCESSFUL) {
_CPU_Fatal_halt(0xe); _CPU_Fatal_halt(0xe);
} }
/* Task stacks */
bsp_stack_initialize( bsp_stack_initialize(
bsp_section_stack_begin, bsp_section_stack_begin,
(uintptr_t) bsp_section_stack_size (uintptr_t) bsp_section_stack_size
); );
lpc32xx_timer_initialize();
} }
#define UART_LSR_THRE 0x00000020U #define UART_LSR_THRE 0x00000020U

28
c/src/lib/libbsp/arm/lpc32xx/startup/bspstarthooks.c
View File

@@ -27,14 +27,20 @@
#include <bsp/mmu.h> #include <bsp/mmu.h>
#include <bsp/linker-symbols.h> #include <bsp/linker-symbols.h>
#define LPC32XX_DISABLE_READ_WRITE_DATA_CACHE
#ifdef LPC32XX_DISABLE_READ_WRITE_DATA_CACHE #ifdef LPC32XX_DISABLE_READ_WRITE_DATA_CACHE
#define LPC32XX_MMU_READ_WRITE_DATA LPC32XX_MMU_READ_WRITE #define LPC32XX_MMU_READ_WRITE_DATA LPC32XX_MMU_READ_WRITE
#else #else
#define LPC32XX_MMU_READ_WRITE_DATA LPC32XX_MMU_READ_WRITE_CACHED #define LPC32XX_MMU_READ_WRITE_DATA LPC32XX_MMU_READ_WRITE_CACHED
#endif #endif
#ifdef LPC32XX_DISABLE_READ_ONLY_PROTECTION
#define LPC32XX_MMU_READ_ONLY_DATA LPC32XX_MMU_READ_WRITE_CACHED
#define LPC32XX_MMU_CODE LPC32XX_MMU_READ_WRITE_CACHED
#else
#define LPC32XX_MMU_READ_ONLY_DATA LPC32XX_MMU_READ_ONLY_CACHED
#define LPC32XX_MMU_CODE LPC32XX_MMU_READ_ONLY_CACHED
#endif
#define BSP_START_SECTION __attribute__((section(".bsp_start"))) #define BSP_START_SECTION __attribute__((section(".bsp_start")))
#define BSP_START_DATA_SECTION __attribute__((section(".bsp_start_data"))) #define BSP_START_DATA_SECTION __attribute__((section(".bsp_start_data")))
@@ -61,7 +67,7 @@ static const BSP_START_DATA_SECTION lpc32xx_mmu_config
{ {
.begin = (uint32_t) bsp_section_start_begin, .begin = (uint32_t) bsp_section_start_begin,
.end = (uint32_t) bsp_section_start_end, .end = (uint32_t) bsp_section_start_end,
.flags = LPC32XX_MMU_READ_WRITE_CACHED .flags = LPC32XX_MMU_CODE
}, { }, {
.begin = (uint32_t) bsp_section_vector_begin, .begin = (uint32_t) bsp_section_vector_begin,
.end = (uint32_t) bsp_section_vector_end, .end = (uint32_t) bsp_section_vector_end,
@@ -69,11 +75,11 @@ static const BSP_START_DATA_SECTION lpc32xx_mmu_config
}, { }, {
.begin = (uint32_t) bsp_section_text_begin, .begin = (uint32_t) bsp_section_text_begin,
.end = (uint32_t) bsp_section_text_end, .end = (uint32_t) bsp_section_text_end,
.flags = LPC32XX_MMU_READ_WRITE_CACHED .flags = LPC32XX_MMU_CODE
}, { }, {
.begin = (uint32_t) bsp_section_rodata_begin, .begin = (uint32_t) bsp_section_rodata_begin,
.end = (uint32_t) bsp_section_rodata_end, .end = (uint32_t) bsp_section_rodata_end,
.flags = LPC32XX_MMU_READ_WRITE_CACHED .flags = LPC32XX_MMU_READ_ONLY_DATA
}, { }, {
.begin = (uint32_t) bsp_section_data_begin, .begin = (uint32_t) bsp_section_data_begin,
.end = (uint32_t) bsp_section_data_end, .end = (uint32_t) bsp_section_data_end,
@@ -81,7 +87,7 @@ static const BSP_START_DATA_SECTION lpc32xx_mmu_config
}, { }, {
.begin = (uint32_t) bsp_section_fast_begin, .begin = (uint32_t) bsp_section_fast_begin,
.end = (uint32_t) bsp_section_fast_end, .end = (uint32_t) bsp_section_fast_end,
.flags = LPC32XX_MMU_READ_WRITE_CACHED .flags = LPC32XX_MMU_CODE
}, { }, {
.begin = (uint32_t) bsp_section_bss_begin, .begin = (uint32_t) bsp_section_bss_begin,
.end = (uint32_t) bsp_section_bss_end, .end = (uint32_t) bsp_section_bss_end,
@@ -93,7 +99,7 @@ static const BSP_START_DATA_SECTION lpc32xx_mmu_config
}, { }, {
.begin = (uint32_t) bsp_section_stack_begin, .begin = (uint32_t) bsp_section_stack_begin,
.end = (uint32_t) bsp_section_stack_end, .end = (uint32_t) bsp_section_stack_end,
.flags = LPC32XX_MMU_READ_WRITE_CACHED .flags = LPC32XX_MMU_READ_WRITE_DATA
}, { }, {
.begin = 0x0U, .begin = 0x0U,
.end = 0x100000U, .end = 0x100000U,
@@ -177,7 +183,7 @@ void BSP_START_SECTION bsp_start_hook_1(void)
/* Copy .text section */ /* Copy .text section */
arm_cp15_instruction_cache_invalidate(); arm_cp15_instruction_cache_invalidate();
bsp_start_memcpy_arm( bsp_start_memcpy(
(int *) bsp_section_text_begin, (int *) bsp_section_text_begin,
(const int *) bsp_section_text_load_begin, (const int *) bsp_section_text_load_begin,
(size_t) bsp_section_text_size (size_t) bsp_section_text_size
@@ -185,7 +191,7 @@ void BSP_START_SECTION bsp_start_hook_1(void)
/* Copy .rodata section */ /* Copy .rodata section */
arm_cp15_instruction_cache_invalidate(); arm_cp15_instruction_cache_invalidate();
bsp_start_memcpy_arm( bsp_start_memcpy(
(int *) bsp_section_rodata_begin, (int *) bsp_section_rodata_begin,
(const int *) bsp_section_rodata_load_begin, (const int *) bsp_section_rodata_load_begin,
(size_t) bsp_section_rodata_size (size_t) bsp_section_rodata_size
@@ -193,7 +199,7 @@ void BSP_START_SECTION bsp_start_hook_1(void)
/* Copy .data section */ /* Copy .data section */
arm_cp15_instruction_cache_invalidate(); arm_cp15_instruction_cache_invalidate();
bsp_start_memcpy_arm( bsp_start_memcpy(
(int *) bsp_section_data_begin, (int *) bsp_section_data_begin,
(const int *) bsp_section_data_load_begin, (const int *) bsp_section_data_load_begin,
(size_t) bsp_section_data_size (size_t) bsp_section_data_size
@@ -201,7 +207,7 @@ void BSP_START_SECTION bsp_start_hook_1(void)
/* Copy .fast section */ /* Copy .fast section */
arm_cp15_instruction_cache_invalidate(); arm_cp15_instruction_cache_invalidate();
bsp_start_memcpy_arm( bsp_start_memcpy(
(int *) bsp_section_fast_begin, (int *) bsp_section_fast_begin,
(const int *) bsp_section_fast_load_begin, (const int *) bsp_section_fast_load_begin,
(size_t) bsp_section_fast_size (size_t) bsp_section_fast_size