forked from Imagelibrary/rtems
Added in_cksum_sparc.h to optimize IP checksum calculations for SPARC.
This commit is contained in:
Jiri Gaisler
committed by
Joel Sherrill
Joel Sherrill
parent
cb6b9bab29
commit
1f4ee306d3
@@ -61,6 +61,10 @@
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#include "in_cksum_nios2.h"
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#include "in_cksum_nios2.h"
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#elif (defined(__GNUC__) && defined(__sparc))
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#include "in_cksum_sparc.h"
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#else
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#else
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#include <stdio.h> /* for puts */
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#include <stdio.h> /* for puts */
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308
cpukit/libnetworking/netinet/in_cksum_sparc.h
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308
cpukit/libnetworking/netinet/in_cksum_sparc.h
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@@ -0,0 +1,308 @@
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/* $NetBSD: in_cksum.c,v 1.12.10.4 2005/12/11 10:28:36 christos Exp $ */
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/*
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* Copyright (c) 1995 Matthew R. Green.
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* Copyright (c) 1992, 1993
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* The Regents of the University of California. All rights reserved.
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*
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* All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, and it's contributors.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* @(#)in_cksum.c 8.1 (Berkeley) 6/11/93
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*/
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/*
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* Copyright (c) 1995 Zubin Dittia.
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* Copyright (c) 1994, 1998 Charles M. Hannum.
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*
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* All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, and it's contributors.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* @(#)in_cksum.c 8.1 (Berkeley) 6/11/93
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*/
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#include <sys/cdefs.h>
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/mbuf.h>
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#include <netinet/in.h>
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#include <netinet/in_systm.h>
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#include <netinet/ip.h>
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#include <netinet/ip_var.h>
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/*
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* Checksum routine for Internet Protocol family headers.
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*
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* This routine is very heavily used in the network
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* code and should be modified for each CPU to be as fast as possible.
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*
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* SPARC version.
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*/
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/*
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* The checksum computation code here is significantly faster than its
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* vanilla C counterpart (by significantly, I mean 2-3 times faster if
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* the data is in cache, and 1.5-2 times faster if the data is not in
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* cache).
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* We optimize on three fronts:
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* 1. By using the add-with-carry (addxcc) instruction, we can use
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* 32-bit operations instead of 16-bit operations.
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* 2. By unrolling the main loop to reduce branch overheads.
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* 3. By doing a sequence of load,load,add,add,load,load,add,add,
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* we can avoid the extra stall cycle which is incurred if the
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* instruction immediately following a load tries to use the
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* target register of the load.
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* Another possible optimization is to replace a pair of 32-bit loads
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* with a single 64-bit load (ldd) instruction, but I found that although
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* this improves performance somewhat on Sun4c machines, it actually
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* reduces performance considerably on Sun4m machines (I don't know why).
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* So I chose to leave it out.
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*
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* Zubin Dittia (zubin@dworkin.wustl.edu)
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*/
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#define Asm __asm __volatile
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#define ADD64 Asm(" ld [%4+ 0],%1; ld [%4+ 4],%2; \
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addcc %0,%1,%0; addxcc %0,%2,%0; \
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ld [%4+ 8],%1; ld [%4+12],%2; \
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addxcc %0,%1,%0; addxcc %0,%2,%0; \
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ld [%4+16],%1; ld [%4+20],%2; \
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addxcc %0,%1,%0; addxcc %0,%2,%0; \
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ld [%4+24],%1; ld [%4+28],%2; \
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addxcc %0,%1,%0; addxcc %0,%2,%0; \
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ld [%4+32],%1; ld [%4+36],%2; \
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addxcc %0,%1,%0; addxcc %0,%2,%0; \
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ld [%4+40],%1; ld [%4+44],%2; \
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addxcc %0,%1,%0; addxcc %0,%2,%0; \
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ld [%4+48],%1; ld [%4+52],%2; \
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addxcc %0,%1,%0; addxcc %0,%2,%0; \
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ld [%4+56],%1; ld [%4+60],%2; \
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addxcc %0,%1,%0; addxcc %0,%2,%0; \
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addxcc %0,0,%0" \
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: "=r" (sum), "=&r" (tmp1), "=&r" (tmp2)\
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: "0" (sum), "r" (w))
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#define ADD32 Asm(" ld [%4+ 0],%1; ld [%4+ 4],%2; \
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addcc %0,%1,%0; addxcc %0,%2,%0; \
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ld [%4+ 8],%1; ld [%4+12],%2; \
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addxcc %0,%1,%0; addxcc %0,%2,%0; \
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ld [%4+16],%1; ld [%4+20],%2; \
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addxcc %0,%1,%0; addxcc %0,%2,%0; \
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ld [%4+24],%1; ld [%4+28],%2; \
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addxcc %0,%1,%0; addxcc %0,%2,%0; \
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addxcc %0,0,%0" \
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: "=r" (sum), "=&r" (tmp1), "=&r" (tmp2)\
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: "0" (sum), "r" (w))
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#define ADD16 Asm(" ld [%4+ 0],%1; ld [%4+ 4],%2; \
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addcc %0,%1,%0; addxcc %0,%2,%0; \
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ld [%4+ 8],%1; ld [%4+12],%2; \
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addxcc %0,%1,%0; addxcc %0,%2,%0; \
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addxcc %0,0,%0" \
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: "=r" (sum), "=&r" (tmp1), "=&r" (tmp2)\
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: "0" (sum), "r" (w))
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#define ADD8 Asm(" ld [%4+ 0],%1; ld [%4+ 4],%2; \
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addcc %0,%1,%0; addxcc %0,%2,%0; \
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addxcc %0,0,%0" \
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: "=r" (sum), "=&r" (tmp1), "=&r" (tmp2)\
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: "0" (sum), "r" (w))
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#define ADD4 Asm(" ld [%3+ 0],%1; \
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addcc %0,%1,%0; \
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addxcc %0,0,%0" \
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: "=r" (sum), "=&r" (tmp1) \
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: "0" (sum), "r" (w))
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#define REDUCE {sum = (sum & 0xffff) + (sum >> 16);}
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#define ADDCARRY {if (sum > 0xffff) sum -= 0xffff;}
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#define ROL {sum = sum << 8;} /* depends on recent REDUCE */
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#define ADDBYTE {ROL; sum += *w; byte_swapped ^= 1;}
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#define ADDSHORT {sum += *(u_short *)w;}
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#define ADVANCE(n) {w += n; mlen -= n;}
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static __inline__ int
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in_cksum_internal(struct mbuf *m, int off, int len, u_int sum)
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{
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u_char *w;
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int mlen = 0;
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int byte_swapped = 0;
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/*
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* Declare two temporary registers for use by the asm code. We
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* allow the compiler to pick which specific machine registers to
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* use, instead of hard-coding this in the asm code above.
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*/
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u_int tmp1, tmp2;
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for (; m && len; m = m->m_next) {
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if (m->m_len == 0)
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continue;
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w = mtod(m, u_char *) + off;
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mlen = m->m_len - off;
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off = 0;
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if (len < mlen)
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mlen = len;
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len -= mlen;
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/*
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* Ensure that we're aligned on a word boundary here so
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* that we can do 32 bit operations below.
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*/
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if ((3 & (long)w) != 0) {
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REDUCE;
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if ((1 & (long)w) != 0 && mlen >= 1) {
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ADDBYTE;
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ADVANCE(1);
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}
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if ((2 & (long)w) != 0 && mlen >= 2) {
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ADDSHORT;
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ADVANCE(2);
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}
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}
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/*
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* Do as many 32 bit operations as possible using the
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* 64/32/16/8/4 macro's above, using as many as possible of
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* these.
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*/
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while (mlen >= 64) {
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ADD64;
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ADVANCE(64);
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}
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if (mlen >= 32) {
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ADD32;
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ADVANCE(32);
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}
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if (mlen >= 16) {
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ADD16;
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ADVANCE(16);
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}
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if (mlen >= 8) {
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ADD8;
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ADVANCE(8);
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}
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if (mlen >= 4) {
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ADD4;
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ADVANCE(4)
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}
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if (mlen == 0)
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continue;
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REDUCE;
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if (mlen >= 2) {
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ADDSHORT;
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ADVANCE(2);
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}
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if (mlen == 1) {
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ADDBYTE;
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}
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}
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if (byte_swapped) {
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REDUCE;
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ROL;
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}
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REDUCE;
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ADDCARRY;
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return (0xffff ^ sum);
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}
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int
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in_cksum(struct mbuf *m, int len)
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{
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return (in_cksum_internal(m, 0, len, 0));
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}
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int
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in4_cksum(struct mbuf *m, uint8_t nxt, int off, int len)
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{
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u_char *w;
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u_int sum = 0;
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struct ipovly ipov;
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/*
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* Declare two temporary registers for use by the asm code. We
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* allow the compiler to pick which specific machine registers to
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* use, instead of hard-coding this in the asm code above.
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*/
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u_int tmp1, tmp2;
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if (nxt != 0) {
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/* pseudo header */
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memset(&ipov, 0, sizeof(ipov));
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ipov.ih_len = htons(len);
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ipov.ih_pr = nxt;
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ipov.ih_src = mtod(m, struct ip *)->ip_src;
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ipov.ih_dst = mtod(m, struct ip *)->ip_dst;
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w = (u_char *)&ipov;
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/* assumes sizeof(ipov) == 20 */
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ADD16;
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w += 16;
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ADD4;
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}
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/* skip unnecessary part */
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while (m && off > 0) {
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if (m->m_len > off)
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break;
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off -= m->m_len;
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m = m->m_next;
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}
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return (in_cksum_internal(m, off, len, sum));
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}
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Reference in New Issue
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