forked from Imagelibrary/rtems
2008-08-20 Sebastian Huber <sebastian.huber@embedded-brains.de>
* mpc55xx/fec/fec.c: Added copyright information. * mpc55xx/dspi/dspi.c, mpc55xx/edma/edma.c, mpc55xx/esci/esci.c: Fixed nexted extern declarations. Fixed integer conversion warnings. * shared/include/cpuIdent.c: Added missing initializers.
This commit is contained in:
@@ -1,3 +1,10 @@
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2008-08-20 Sebastian Huber <sebastian.huber@embedded-brains.de>
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* mpc55xx/fec/fec.c: Added copyright information.
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* mpc55xx/dspi/dspi.c, mpc55xx/edma/edma.c, mpc55xx/esci/esci.c:
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Fixed nexted extern declarations. Fixed integer conversion warnings.
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* shared/include/cpuIdent.c: Added missing initializers.
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2008-08-20 Ralf Corsépius <ralf.corsepius@rtems.org>
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* mpc8260/clock/clock.c, mpc8260/console-generic/console-generic.c:
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@@ -317,12 +317,13 @@ static rtems_status_code mpc55xx_dspi_send_addr( rtems_libi2c_bus_t *bus, uint32
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return RTEMS_SUCCESSFUL;
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}
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/* FIXME, TODO */
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extern uint32_t bsp_clock_speed;
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static int mpc55xx_dspi_set_transfer_mode( rtems_libi2c_bus_t *bus, const rtems_libi2c_tfr_mode_t *mode)
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{
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mpc55xx_dspi_bus_entry *e = (mpc55xx_dspi_bus_entry *) bus;
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union DSPI_CTAR_tag ctar = MPC55XX_ZERO_FLAGS;
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// FIXME, TODO
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extern uint32_t bsp_clock_speed;
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uint32_t scaler = bsp_clock_speed / mode->baudrate;
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mpc55xx_dspi_baudrate_scaler_entry bse = mpc55xx_dspi_search_baudrate_scaler( scaler, 0, MPC55XX_DSPI_BAUDRATE_SCALER_TABLE_SIZE / 2, MPC55XX_DSPI_BAUDRATE_SCALER_TABLE_SIZE);
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@@ -337,11 +338,6 @@ static int mpc55xx_dspi_set_transfer_mode( rtems_libi2c_bus_t *bus, const rtems_
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ctar.B.PBR = bse.pbr;
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ctar.B.BR = bse.br;
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// ctar.B.PCSSCK = bse.pbr;
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// ctar.B.CSSCK = bse.br;
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// ctar.B.PASC = bse.pbr;
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// ctar.B.ASC = bse.br;
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ctar.B.PCSSCK = 0;
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ctar.B.CSSCK = 0;
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ctar.B.PASC = 0;
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@@ -425,8 +421,8 @@ static int mpc55xx_dspi_read_write( rtems_libi2c_bus_t *bus, unsigned char *in,
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}
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if (n > MPC55XX_DSPI_EDMA_MAGIC_SIZE) {
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n_nc = mpc55xx_non_cache_aligned_size( in);
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n_c = mpc55xx_cache_aligned_size( in, n);
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n_nc = (int) mpc55xx_non_cache_aligned_size( in);
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n_c = (int) mpc55xx_cache_aligned_size( in, (size_t) n);
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if (n_c > EDMA_TCD_BITER_LINKED_SIZE) {
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SYSLOG_WARNING( "Buffer size out of range, cannot use eDMA\n");
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n_nc = n;
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@@ -462,8 +458,7 @@ static int mpc55xx_dspi_read_write( rtems_libi2c_bus_t *bus, unsigned char *in,
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/* Read */
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if (r < n_nc && sr.B.RXCTR != 0) {
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pop_data.R = ppc_read_word( pop);
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in [r] = pop_data.B.RXDATA;
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// printk( "[%03u]: 0x%02x -> 0x%02x\n", r, out [r], in [r]);
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in [r] = (unsigned char) pop_data.B.RXDATA;
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++r;
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}
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}
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@@ -484,7 +479,6 @@ static int mpc55xx_dspi_read_write( rtems_libi2c_bus_t *bus, unsigned char *in,
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/* Read */
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if (r < n_nc && sr.B.RXCTR != 0) {
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pop_data.R = ppc_read_word( pop);
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// printk( "[%03u]: 0x%02x -> 0x%02x\n", r, out [r], in [r]);
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++r;
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}
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}
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@@ -505,8 +499,7 @@ static int mpc55xx_dspi_read_write( rtems_libi2c_bus_t *bus, unsigned char *in,
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/* Read */
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if (r < n_nc && sr.B.RXCTR != 0) {
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pop_data.R = ppc_read_word( pop);
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in [r] = pop_data.B.RXDATA;
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// printk( "[%03u]: 0x%02x -> 0x%02x\n", r, out [r], in [r]);
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in [r] = (unsigned char) pop_data.B.RXDATA;
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++r;
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}
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}
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@@ -521,8 +514,8 @@ static int mpc55xx_dspi_read_write( rtems_libi2c_bus_t *bus, unsigned char *in,
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struct tcd_t tcd_receive = MPC55XX_EDMA_TCD_DEFAULT;
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/* Cache operations */
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rtems_cache_flush_multiple_data_lines( out_c, n_c);
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rtems_cache_invalidate_multiple_data_lines( in_c, n_c);
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rtems_cache_flush_multiple_data_lines( out_c, (size_t) n_c);
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rtems_cache_invalidate_multiple_data_lines( in_c, (size_t) n_c);
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/* Set transmit TCD */
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if (out == NULL) {
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@@ -31,7 +31,7 @@
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#include <rtems/status-checks.h>
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#define MPC55XX_EDMA_CHANNEL_NUMBER 64
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#define MPC55XX_EDMA_INVALID_CHANNEL -1
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#define MPC55XX_EDMA_INVALID_CHANNEL UINT8_MAX
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#define MPC55XX_EDMA_IS_CHANNEL_INVALID( i) ((i) < 0 || (i) >= MPC55XX_EDMA_CHANNEL_NUMBER)
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#define MPC55XX_EDMA_IRQ_PRIORITY MPC55XX_INTC_MIN_PRIORITY
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@@ -67,7 +67,7 @@ static void mpc55xx_edma_irq_handler( rtems_vector_number vector, void *data)
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SYSLOG_WARNING_SC( sc, "Transfer update semaphore release");
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}
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static void mpc55xx_edma_irq_update_error_table( uint8_t *link_table, uint8_t *error_table, uint8_t channel)
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static void mpc55xx_edma_irq_update_error_table( uint8_t *link_table, uint8_t *error_table, int channel)
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{
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int i = 0;
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error_table [channel] = 1;
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@@ -82,8 +82,8 @@ static void mpc55xx_edma_irq_error_handler( rtems_vector_number vector, void *da
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{
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rtems_status_code sc = RTEMS_SUCCESSFUL;
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uint8_t channel_start = *((uint8_t *) data);
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uint8_t channel_end = channel_start + 32;
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uint8_t i = 0;
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uint8_t channel_end = (uint8_t) (channel_start + 32);
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int i = 0;
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uint32_t mask = 0x1;
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uint32_t error_register = 0;
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uint8_t channel_link_table [MPC55XX_EDMA_CHANNEL_NUMBER];
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@@ -100,7 +100,7 @@ static void mpc55xx_edma_irq_error_handler( rtems_vector_number vector, void *da
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/* Fill channel link table */
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for (i = 0; i < MPC55XX_EDMA_CHANNEL_NUMBER; ++i) {
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if (EDMA.TCD [i].BITERE_LINK && EDMA.TCD [i].CITER != EDMA.TCD [i].BITER) {
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channel_link_table [i] = EDMA_TCD_BITER_LINK( i);
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channel_link_table [i] = (uint8_t) EDMA_TCD_BITER_LINK( i);
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} else if (EDMA.TCD [i].MAJORE_LINK && EDMA.TCD [i].CITER == EDMA.TCD [i].BITER) {
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channel_link_table [i] = EDMA.TCD [i].MAJORLINKCH;
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} else {
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@@ -135,7 +135,7 @@ static void mpc55xx_edma_irq_error_handler( rtems_vector_number vector, void *da
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/* Clear the error interrupt requests */
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for (i = 0; i < MPC55XX_EDMA_CHANNEL_NUMBER; ++i) {
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if (channel_error_table [i]) {
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EDMA.CER.R = i;
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EDMA.CER.R = (uint8_t) i;
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}
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}
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}
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@@ -146,9 +146,9 @@ rtems_status_code mpc55xx_edma_enable_hardware_requests( int channel, bool enabl
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return RTEMS_INVALID_NUMBER;
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}
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if (enable) {
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EDMA.SERQR.R = channel;
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EDMA.SERQR.R = (uint8_t) channel;
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} else {
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EDMA.CERQR.R = channel;
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EDMA.CERQR.R = (uint8_t) channel;
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}
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return RTEMS_SUCCESSFUL;
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}
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@@ -257,6 +257,9 @@ static int mpc55xx_esci_termios_write( int minor, const char *out, int n)
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return 0;
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}
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/* FIXME, TODO */
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extern uint32_t bsp_clock_speed;
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/**
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* @brief Sets attributes of port @a minor according to termios attributes @a t.
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*
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@@ -337,9 +340,6 @@ static int mpc55xx_esci_termios_set_attributes( int minor, const struct termios
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default: br = 0; break;
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}
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if (br > 0) {
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// FIXME, TODO
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extern uint32_t bsp_clock_speed;
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br = bsp_clock_speed / (16 * br);
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br = (br > 8191) ? 8191 : br;
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} else {
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@@ -452,7 +452,7 @@ rtems_device_driver console_initialize( rtems_device_major_number major, rtems_d
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rtems_status_code sc = RTEMS_SUCCESSFUL;
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int console_done = 0;
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int termios_do_init = 1;
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int i = 0;
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rtems_device_minor_number i = 0;
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mpc55xx_esci_driver_entry *e = NULL;
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for (i = 0; i < MPC55XX_ESCI_NUMBER; ++i) {
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@@ -488,7 +488,7 @@ rtems_device_driver console_initialize( rtems_device_major_number major, rtems_d
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CHECK_SC( sc, "Install IRQ handler");
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}
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}
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mpc55xx_esci_termios_set_attributes( minor, &mpc55xx_esci_termios_default);
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mpc55xx_esci_termios_set_attributes( (int) i, &mpc55xx_esci_termios_default);
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}
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return RTEMS_SUCCESSFUL;
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@@ -613,7 +613,7 @@ rtems_device_driver console_control( rtems_device_major_number major, rtems_devi
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*
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* The correct value will be set by mpc55xx_esci_output_char_init().
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*/
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static unsigned mpc55xx_esci_output_char_minor = 0;
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static int mpc55xx_esci_output_char_minor = 0;
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/**
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* @name BSP Character Output
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@@ -637,7 +637,7 @@ static void mpc55xx_esci_output_char_nop( char c)
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static void mpc55xx_esci_output_char_init( char c)
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{
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int console_found = 0;
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unsigned i = 0;
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int i = 0;
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for (i = 0; i < MPC55XX_ESCI_NUMBER; ++i) {
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if (mpc55xx_esci_driver_table [i].console) {
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console_found = 1;
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@@ -3,17 +3,17 @@
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*
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* @ingroup mpc55xx
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*
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* @brief Device driver for the Fast Ethernet Controller
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*
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* @par Copyright
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* Copyright (c) 2008<br>
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* Embedded Brains GmbH<br>
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* Obere Lagerstr. 30<br>
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* D-82178 Puchheim<br>
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* Germany<br>
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* rtems@embedded-brains.de<br>
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* @brief Empty file.
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*/
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/*
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* Copyright (c) 2008
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* Embedded Brains GmbH
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* Obere Lagerstr. 30
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* D-82178 Puchheim
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* Germany
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* rtems@embedded-brains.de
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*
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* @par License
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* The license and distribution terms for this file may be found in the file
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* LICENSE in this distribution or at http://www.rtems.com/license/LICENSE.
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*/
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@@ -49,16 +49,16 @@ rtems_status_code mpc83xx_gtm_initialize( int timer, int clock)
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MPC83XX_GTM_VARIABLES( timer);
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uint8_t mask = 0xf << (low * 4);
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uint8_t flags = 0x3 << (low * 4);
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uint16_t reg = 0;
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unsigned mask = 0xfU << (low * 4);
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unsigned flags = 0x3U << (low * 4);
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uint8_t reg = 0;
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MPC83XX_GTM_CHECK_INDEX( timer);
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rtems_interrupt_disable( level);
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reg = mpc83xx.gtm [module].gtcfr [high].reg;
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mpc83xx.gtm [module].gtcfr [high].reg = (reg & ~mask) | flags;
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mpc83xx.gtm [module].gtcfr [high].reg = (uint8_t) ((reg & ~mask) | flags);
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mpc83xx.gtm [module].gt_tim_regs [high].gtmdr [low] = 0;
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@@ -25,7 +25,18 @@ SPR_RO(PVR)
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ppc_cpu_id_t current_ppc_cpu = PPC_UNKNOWN;
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ppc_cpu_revision_t current_ppc_revision = 0xff;
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ppc_feature_t current_ppc_features = {0};
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ppc_feature_t current_ppc_features = {
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.has_altivec = 0,
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.has_fpu = 0,
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.has_hw_ptbl_lkup = 0,
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.is_bookE = 0,
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.has_16byte_clne = 0,
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.is_60x = 0,
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.has_8_bats = 0,
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.has_epic = 0,
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.has_shadowed_gprs = 0,
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.has_ivpr_and_ivor = 0
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};
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char *get_ppc_cpu_type_name(ppc_cpu_id_t cpu)
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{
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