This code was in the tree but not actually being compiled. There

were a number of minor problems which had to be fixed to get it
to compile including modifying the compile rule to handle C++ comments,
changing the syntax of the include statement, and getting rid of "%"
as part of register names.
This commit is contained in:
Joel Sherrill
1997-07-09 23:41:20 +00:00
parent 8fabc27347
commit 1d320bac21
34 changed files with 140 additions and 140 deletions

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@@ -137,7 +137,7 @@
//BINDEC idnt 2,1 | Motorola 040 Floating Point Software Package //BINDEC idnt 2,1 | Motorola 040 Floating Point Software Package
.include "fpsp.defs" #include "fpsp.defs"
|section 8 |section 8

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@@ -68,7 +68,7 @@
|section 8 |section 8
.include "fpsp.defs" #include "fpsp.defs"
.global binstr .global binstr
binstr: binstr:

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@@ -160,7 +160,7 @@
|section 8 |section 8
.include "fpsp.defs" #include "fpsp.defs"
|xref fpsp_fmt_error |xref fpsp_fmt_error

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@@ -77,7 +77,7 @@
|section 8 |section 8
.include "fpsp.defs" #include "fpsp.defs"
// //
// PTENRN, PTENRM, and PTENRP are arrays of powers of 10 rounded // PTENRN, PTENRM, and PTENRP are arrays of powers of 10 rounded

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@@ -30,7 +30,7 @@ DO_FUNC: //idnt 2,1 | Motorola 040 Floating Point Software Package
|section 8 |section 8
.include "fpsp.defs" #include "fpsp.defs"
|xref t_dz2 |xref t_dz2
|xref t_operr |xref t_operr

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@@ -37,7 +37,7 @@ GEN_EXCEPT: //idnt 2,1 | Motorola 040 Floating Point Software Package
|section 8 |section 8
.include "fpsp.defs" #include "fpsp.defs"
|xref real_trace |xref real_trace
|xref fpsp_done |xref fpsp_done

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@@ -62,7 +62,7 @@ GET_OP: //idnt 2,1 | Motorola 040 Floating Point Software Package
|section 8 |section 8
.include "fpsp.defs" #include "fpsp.defs"
.global PIRN,PIRZRM,PIRP .global PIRN,PIRZRM,PIRP
.global SMALRN,SMALRZRM,SMALRP .global SMALRN,SMALRZRM,SMALRP

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@@ -20,7 +20,7 @@ KERNEL_EX: //idnt 2,1 | Motorola 040 Floating Point Software Package
|section 8 |section 8
.include "fpsp.defs" #include "fpsp.defs"
mns_inf: .long 0xffff0000,0x00000000,0x00000000 mns_inf: .long 0xffff0000,0x00000000,0x00000000
pls_inf: .long 0x7fff0000,0x00000000,0x00000000 pls_inf: .long 0x7fff0000,0x00000000,0x00000000

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@@ -24,7 +24,7 @@ RES_FUNC: //idnt 2,1 | Motorola 040 Floating Point Software Package
|section 8 |section 8
.include "fpsp.defs" #include "fpsp.defs"
sp_bnds: .short 0x3f81,0x407e sp_bnds: .short 0x3f81,0x407e
.short 0x3f6a,0x0000 .short 0x3f6a,0x0000

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@@ -16,7 +16,7 @@
|section 8 |section 8
.include "fpsp.defs" #include "fpsp.defs"
// //
// round --- round result according to precision/mode // round --- round result according to precision/mode

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@@ -45,7 +45,7 @@
//SKELETON idnt 2,1 | Motorola 040 Floating Point Software Package //SKELETON idnt 2,1 | Motorola 040 Floating Point Software Package
.include "fpsp.defs" #include "fpsp.defs"
// //
// Divide by Zero exception // Divide by Zero exception
@@ -54,11 +54,11 @@
// //
.global SYM(_fpspEntry_dz) .global SYM(_fpspEntry_dz)
SYM(_fpspEntry_dz): SYM(_fpspEntry_dz):
link %a6,#-LOCAL_SIZE link a6,#-LOCAL_SIZE
fsave -(%sp) fsave -(sp)
bclrb #E1,E_BYTE(%a6) bclrb #E1,E_BYTE(a6)
frestore (%sp)+ frestore (sp)+
unlk %a6 unlk a6
jmp ([SYM(M68040FPSPUserExceptionHandlers)+3*4],za0) jmp ([SYM(M68040FPSPUserExceptionHandlers)+3*4],za0)
// //
@@ -85,32 +85,32 @@ SYM(_fpspEntry_dz):
.global SYM(_fpspEntry_inex) .global SYM(_fpspEntry_inex)
.global real_inex .global real_inex
SYM(_fpspEntry_inex): SYM(_fpspEntry_inex):
link %a6,#-LOCAL_SIZE link a6,#-LOCAL_SIZE
fsave -(%sp) fsave -(sp)
cmpib #VER_40,(%sp) //test version number cmpib #VER_40,(sp) //test version number
bnes not_fmt40 bnes not_fmt40
fmovel %fpsr,-(%sp) fmovel fpsr,-(sp)
btstb #E1,E_BYTE(%a6) //test for E1 set btstb #E1,E_BYTE(a6) //test for E1 set
beqs not_b1232 beqs not_b1232
btstb #snan_bit,2(%sp) //test for snan btstb #snan_bit,2(sp) //test for snan
beq inex_ckofl beq inex_ckofl
addl #4,%sp addl #4,sp
frestore (%sp)+ frestore (sp)+
unlk %a6 unlk a6
bra snan bra snan
inex_ckofl: inex_ckofl:
btstb #ovfl_bit,2(%sp) //test for ovfl btstb #ovfl_bit,2(sp) //test for ovfl
beq inex_ckufl beq inex_ckufl
addl #4,%sp addl #4,sp
frestore (%sp)+ frestore (sp)+
unlk %a6 unlk a6
bra SYM(_fpspEntry_ovfl) bra SYM(_fpspEntry_ovfl)
inex_ckufl: inex_ckufl:
btstb #unfl_bit,2(%sp) //test for unfl btstb #unfl_bit,2(sp) //test for unfl
beq not_b1232 beq not_b1232
addl #4,%sp addl #4,sp
frestore (%sp)+ frestore (sp)+
unlk %a6 unlk a6
bra SYM(_fpspEntry_unfl) bra SYM(_fpspEntry_unfl)
// //
@@ -118,31 +118,31 @@ inex_ckufl:
// real_inex. // real_inex.
// //
not_b1232: not_b1232:
addl #4,%sp addl #4,sp
frestore (%sp)+ frestore (sp)+
unlk %a6 unlk a6
real_inex: real_inex:
link %a6,#-LOCAL_SIZE link a6,#-LOCAL_SIZE
fsave -(%sp) fsave -(sp)
not_fmt40: not_fmt40:
bclrb #E3,E_BYTE(%a6) //clear and test E3 flag bclrb #E3,E_BYTE(a6) //clear and test E3 flag
beqs inex_cke1 beqs inex_cke1
// //
// Clear dirty bit on dest resister in the frame before branching // Clear dirty bit on dest resister in the frame before branching
// to b1238_fix. // to b1238_fix.
// //
moveml %d0/%d1,USER_DA(%a6) moveml d0/d1,USER_DA(a6)
bfextu CMDREG1B(%a6){#6:#3},%d0 //get dest reg no bfextu CMDREG1B(a6){#6:#3},d0 //get dest reg no
bclrb %d0,FPR_DIRTY_BITS(%a6) //clr dest dirty bit bclrb d0,FPR_DIRTY_BITS(a6) //clr dest dirty bit
bsrl b1238_fix //test for bug1238 case bsrl b1238_fix //test for bug1238 case
moveml USER_DA(%a6),%d0/%d1 moveml USER_DA(a6),d0/d1
bras inex_done bras inex_done
inex_cke1: inex_cke1:
bclrb #E1,E_BYTE(%a6) bclrb #E1,E_BYTE(a6)
inex_done: inex_done:
frestore (%sp)+ frestore (sp)+
unlk %a6 unlk a6
jmp ([SYM(M68040FPSPUserExceptionHandlers)+2*4],za0) jmp ([SYM(M68040FPSPUserExceptionHandlers)+2*4],za0)
// //
@@ -153,14 +153,14 @@ inex_done:
SYM(_fpspEntry_ovfl): SYM(_fpspEntry_ovfl):
jmp fpsp_ovfl jmp fpsp_ovfl
real_ovfl: real_ovfl:
link %a6,#-LOCAL_SIZE link a6,#-LOCAL_SIZE
fsave -(%sp) fsave -(sp)
bclrb #E3,E_BYTE(%a6) //clear and test E3 flag bclrb #E3,E_BYTE(a6) //clear and test E3 flag
bnes ovfl_done bnes ovfl_done
bclrb #E1,E_BYTE(%a6) bclrb #E1,E_BYTE(a6)
ovfl_done: ovfl_done:
frestore (%sp)+ frestore (sp)+
unlk %a6 unlk a6
jmp ([SYM(M68040FPSPUserExceptionHandlers)+6*4],za0) jmp ([SYM(M68040FPSPUserExceptionHandlers)+6*4],za0)
// //
@@ -171,14 +171,14 @@ ovfl_done:
SYM(_fpspEntry_unfl): SYM(_fpspEntry_unfl):
jmp fpsp_unfl jmp fpsp_unfl
real_unfl: real_unfl:
link %a6,#-LOCAL_SIZE link a6,#-LOCAL_SIZE
fsave -(%sp) fsave -(sp)
bclrb #E3,E_BYTE(%a6) //clear and test E3 flag bclrb #E3,E_BYTE(a6) //clear and test E3 flag
bnes unfl_done bnes unfl_done
bclrb #E1,E_BYTE(%a6) bclrb #E1,E_BYTE(a6)
unfl_done: unfl_done:
frestore (%sp)+ frestore (sp)+
unlk %a6 unlk a6
jmp ([SYM(M68040FPSPUserExceptionHandlers)+4*4],za0) jmp ([SYM(M68040FPSPUserExceptionHandlers)+4*4],za0)
// //
@@ -190,11 +190,11 @@ SYM(_fpspEntry_snan):
snan: snan:
jmp fpsp_snan jmp fpsp_snan
real_snan: real_snan:
link %a6,#-LOCAL_SIZE link a6,#-LOCAL_SIZE
fsave -(%sp) fsave -(sp)
bclrb #E1,E_BYTE(%a6) //snan is always an E1 exception bclrb #E1,E_BYTE(a6) //snan is always an E1 exception
frestore (%sp)+ frestore (sp)+
unlk %a6 unlk a6
jmp ([SYM(M68040FPSPUserExceptionHandlers)+7*4],za0) jmp ([SYM(M68040FPSPUserExceptionHandlers)+7*4],za0)
// //
@@ -205,11 +205,11 @@ real_snan:
SYM(_fpspEntry_operr): SYM(_fpspEntry_operr):
jmp fpsp_operr jmp fpsp_operr
real_operr: real_operr:
link %a6,#-LOCAL_SIZE link a6,#-LOCAL_SIZE
fsave -(%sp) fsave -(sp)
bclrb #E1,E_BYTE(%a6) //operr is always an E1 exception bclrb #E1,E_BYTE(a6) //operr is always an E1 exception
frestore (%sp)+ frestore (sp)+
unlk %a6 unlk a6
jmp ([SYM(M68040FPSPUserExceptionHandlers)+5*4],za0) jmp ([SYM(M68040FPSPUserExceptionHandlers)+5*4],za0)
// //
@@ -222,14 +222,14 @@ real_operr:
SYM(_fpspEntry_bsun): SYM(_fpspEntry_bsun):
jmp fpsp_bsun jmp fpsp_bsun
real_bsun: real_bsun:
link %a6,#-LOCAL_SIZE link a6,#-LOCAL_SIZE
fsave -(%sp) fsave -(sp)
bclrb #E1,E_BYTE(%a6) //bsun is always an E1 exception bclrb #E1,E_BYTE(a6) //bsun is always an E1 exception
fmovel %FPSR,-(%sp) fmovel fpsr,-(sp)
bclrb #nan_bit,(%sp) bclrb #nan_bit,(sp)
fmovel (%sp)+,%FPSR fmovel (sp)+,fpsr
frestore (%sp)+ frestore (sp)+
unlk %a6 unlk a6
jmp ([SYM(M68040FPSPUserExceptionHandlers)+1*4],za0) jmp ([SYM(M68040FPSPUserExceptionHandlers)+1*4],za0)
// //
@@ -253,11 +253,11 @@ real_fline:
SYM(_fpspEntry_unsupp): SYM(_fpspEntry_unsupp):
jmp fpsp_unsupp jmp fpsp_unsupp
real_unsupp: real_unsupp:
link %a6,#-LOCAL_SIZE link a6,#-LOCAL_SIZE
fsave -(%sp) fsave -(sp)
bclrb #E1,E_BYTE(%a6) //unsupp is always an E1 exception bclrb #E1,E_BYTE(a6) //unsupp is always an E1 exception
frestore (%sp)+ frestore (sp)+
unlk %a6 unlk a6
jmp ([SYM(M68040FPSPUserExceptionHandlers)+8*4],za0) jmp ([SYM(M68040FPSPUserExceptionHandlers)+8*4],za0)
// //
@@ -309,21 +309,21 @@ fpsp_done:
// //
.global mem_write .global mem_write
mem_write: mem_write:
btstb #5,EXC_SR(%a6) //check for supervisor state btstb #5,EXC_SR(a6) //check for supervisor state
beqs user_write beqs user_write
super_write: super_write:
moveb (%a0)+,(%a1)+ moveb (a0)+,(a1)+
subql #1,%d0 subql #1,d0
bnes super_write bnes super_write
rts rts
user_write: user_write:
movel %d1,-(%sp) //preserve d1 just in case movel d1,-(sp) //preserve d1 just in case
movel %d0,-(%sp) movel d0,-(sp)
movel %a1,-(%sp) movel a1,-(sp)
movel %a0,-(%sp) movel a0,-(sp)
jsr copyout jsr copyout
addw #12,%sp addw #12,sp
movel (%sp)+,%d1 movel (sp)+,d1
rts rts
// //
// mem_read --- read from user or supervisor address space // mem_read --- read from user or supervisor address space
@@ -346,21 +346,21 @@ user_write:
// //
.global mem_read .global mem_read
mem_read: mem_read:
btstb #5,EXC_SR(%a6) //check for supervisor state btstb #5,EXC_SR(a6) //check for supervisor state
beqs user_read beqs user_read
super_read: super_read:
moveb (%a0)+,(%a1)+ moveb (a0)+,(a1)+
subql #1,%d0 subql #1,d0
bnes super_read bnes super_read
rts rts
user_read: user_read:
movel %d1,-(%sp) //preserve d1 just in case movel d1,-(sp) //preserve d1 just in case
movel %d0,-(%sp) movel d0,-(sp)
movel %a1,-(%sp) movel a1,-(sp)
movel %a0,-(%sp) movel a0,-(sp)
jsr copyin jsr copyin
addw #12,%sp addw #12,sp
movel (%sp)+,%d1 movel (sp)+,d1
rts rts
// //
@@ -369,29 +369,29 @@ user_read:
// and copyin overwrites SFC. // and copyin overwrites SFC.
// //
copyout: copyout:
movel 4(%sp),%a0 // source movel 4(sp),a0 // source
movel 8(%sp),%a1 // destination movel 8(sp),a1 // destination
movel 12(%sp),%d0 // count movel 12(sp),d0 // count
subl #1,%d0 // dec count by 1 for dbra subl #1,d0 // dec count by 1 for dbra
movel #1,%d1 movel #1,d1
movec %d1,%DFC // set dfc for user data space movec d1,dfc // set dfc for user data space
moreout: moreout:
moveb (%a0)+,%d1 // fetch supervisor byte moveb (a0)+,d1 // fetch supervisor byte
movesb %d1,(%a1)+ // write user byte movesb d1,(a1)+ // write user byte
dbf %d0,moreout dbf d0,moreout
rts rts
copyin: copyin:
movel 4(%sp),%a0 // source movel 4(sp),a0 // source
movel 8(%sp),%a1 // destination movel 8(sp),a1 // destination
movel 12(%sp),%d0 // count movel 12(sp),d0 // count
subl #1,%d0 // dec count by 1 for dbra subl #1,d0 // dec count by 1 for dbra
movel #1,%d1 movel #1,d1
movec %d1,%SFC // set sfc for user space movec d1,sfc // set sfc for user space
morein: morein:
movesb (%a0)+,%d1 // fetch user byte movesb (a0)+,d1 // fetch user byte
moveb %d1,(%a1)+ // write supervisor byte moveb d1,(a1)+ // write supervisor byte
dbf %d0,morein dbf d0,morein
rts rts
|end |end

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@@ -51,7 +51,7 @@
|section 8 |section 8
.include "fpsp.defs" #include "fpsp.defs"
BOUNDS1: .long 0x3FFB8000,0x4002FFFF BOUNDS1: .long 0x3FFB8000,0x4002FFFF

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@@ -29,7 +29,7 @@
|section 8 |section 8
.include "fpsp.defs" #include "fpsp.defs"
|xref t_ovfl2 |xref t_ovfl2
|xref t_unfl |xref t_unfl

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@@ -339,7 +339,7 @@
|section 8 |section 8
.include "fpsp.defs" #include "fpsp.defs"
L2: .long 0x3FDC0000,0x82E30865,0x4361C4C6,0x00000000 L2: .long 0x3FDC0000,0x82E30865,0x4361C4C6,0x00000000

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@@ -32,7 +32,7 @@
|section 8 |section 8
.include "fpsp.defs" #include "fpsp.defs"
|xref nrm_set |xref nrm_set

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@@ -59,7 +59,7 @@
|section 8 |section 8
.include "fpsp.defs" #include "fpsp.defs"
|xref dnrm_lp |xref dnrm_lp
|xref nrm_set |xref nrm_set

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@@ -71,7 +71,7 @@
|section 8 |section 8
.include "fpsp.defs" #include "fpsp.defs"
BOUNDS1: .long 0x3FFEF07D,0x3FFF8841 BOUNDS1: .long 0x3FFEF07D,0x3FFF8841
BOUNDS2: .long 0x3FFE8000,0x3FFFC000 BOUNDS2: .long 0x3FFE8000,0x3FFFC000

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@@ -23,7 +23,7 @@
|section 8 |section 8
.include "fpsp.defs" #include "fpsp.defs"
|xref nrm_set |xref nrm_set
|xref round |xref round

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@@ -74,7 +74,7 @@ SREM_MOD: //idnt 2,1 | Motorola 040 Floating Point Software Package
|section 8 |section 8
.include "fpsp.defs" #include "fpsp.defs"
.set Mod_Flag,L_SCR3 .set Mod_Flag,L_SCR3
.set SignY,FP_SCR3+4 .set SignY,FP_SCR3+4

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@@ -91,7 +91,7 @@
|section 8 |section 8
.include "fpsp.defs" #include "fpsp.defs"
BOUNDS1: .long 0x3FD78000,0x4004BC7E BOUNDS1: .long 0x3FD78000,0x4004BC7E
TWOBYPI: .long 0x3FE45F30,0x6DC9C883 TWOBYPI: .long 0x3FE45F30,0x6DC9C883

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@@ -58,7 +58,7 @@
|section 8 |section 8
.include "fpsp.defs" #include "fpsp.defs"
BOUNDS1: .long 0x3FD78000,0x4004BC7E BOUNDS1: .long 0x3FD78000,0x4004BC7E
TWOBYPI: .long 0x3FE45F30,0x6DC9C883 TWOBYPI: .long 0x3FE45F30,0x6DC9C883

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@@ -57,7 +57,7 @@
|section 8 |section 8
.include "fpsp.defs" #include "fpsp.defs"
.set X,FP_SCR5 .set X,FP_SCR5
.set XDCARE,X+2 .set XDCARE,X+2

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@@ -28,7 +28,7 @@ STO_RES: //idnt 2,1 | Motorola 040 Floating Point Software Package
|section 8 |section 8
.include "fpsp.defs" #include "fpsp.defs"
.global sto_cos .global sto_cos
sto_cos: sto_cos:

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@@ -84,7 +84,7 @@
|section 8 |section 8
.include "fpsp.defs" #include "fpsp.defs"
BOUNDS1: .long 0x3FB98000,0x400D80C0 // ... 2^(-70),16480 BOUNDS1: .long 0x3FB98000,0x400D80C0 // ... 2^(-70),16480
BOUNDS2: .long 0x3FB98000,0x400B9B07 // ... 2^(-70),16480 LOG2/LOG10 BOUNDS2: .long 0x3FB98000,0x400B9B07 // ... 2^(-70),16480 LOG2/LOG10

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@@ -24,7 +24,7 @@
|section 8 |section 8
.include "fpsp.defs" #include "fpsp.defs"
|xref mem_read |xref mem_read

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@@ -21,7 +21,7 @@ X_BSUN: //idnt 2,1 | Motorola 040 Floating Point Software Package
|section 8 |section 8
.include "fpsp.defs" #include "fpsp.defs"
|xref real_bsun |xref real_bsun

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@@ -21,7 +21,7 @@ X_FLINE: //idnt 2,1 | Motorola 040 Floating Point Software Package
|section 8 |section 8
.include "fpsp.defs" #include "fpsp.defs"
|xref real_fline |xref real_fline
|xref fpsp_unimp |xref fpsp_unimp

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@@ -51,7 +51,7 @@ X_OPERR: //idnt 2,1 | Motorola 040 Floating Point Software Package
|section 8 |section 8
.include "fpsp.defs" #include "fpsp.defs"
|xref mem_write |xref mem_write
|xref real_operr |xref real_operr

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@@ -43,7 +43,7 @@ X_OVFL: //idnt 2,1 | Motorola 040 Floating Point Software Package
|section 8 |section 8
.include "fpsp.defs" #include "fpsp.defs"
|xref ovf_r_x2 |xref ovf_r_x2
|xref ovf_r_x3 |xref ovf_r_x3

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@@ -30,7 +30,7 @@ X_SNAN: //idnt 2,1 | Motorola 040 Floating Point Software Package
|section 8 |section 8
.include "fpsp.defs" #include "fpsp.defs"
|xref get_fline |xref get_fline
|xref mem_write |xref mem_write

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@@ -22,7 +22,7 @@ X_STORE: //idnt 2,1 | Motorola 040 Floating Point Software Package
fpreg_mask: fpreg_mask:
.byte 0x80,0x40,0x20,0x10,0x08,0x04,0x02,0x01 .byte 0x80,0x40,0x20,0x10,0x08,0x04,0x02,0x01
.include "fpsp.defs" #include "fpsp.defs"
|xref mem_write |xref mem_write
|xref get_fline |xref get_fline

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@@ -29,7 +29,7 @@ X_UNFL: //idnt 2,1 | Motorola 040 Floating Point Software Package
|section 8 |section 8
.include "fpsp.defs" #include "fpsp.defs"
|xref denorm |xref denorm
|xref round |xref round

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@@ -30,7 +30,7 @@ X_UNIMP: //idnt 2,1 | Motorola 040 Floating Point Software Package
|section 8 |section 8
.include "fpsp.defs" #include "fpsp.defs"
|xref get_op |xref get_op
|xref do_func |xref do_func

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@@ -31,7 +31,7 @@ X_UNSUPP: //idnt 2,1 | Motorola 040 Floating Point Software Package
|section 8 |section 8
.include "fpsp.defs" #include "fpsp.defs"
|xref get_op |xref get_op
|xref res_func |xref res_func